JP2018506171A - Easy-to-manufacture electrical components and methods for manufacturing electrical components - Google Patents
Easy-to-manufacture electrical components and methods for manufacturing electrical components Download PDFInfo
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- JP2018506171A JP2018506171A JP2017530257A JP2017530257A JP2018506171A JP 2018506171 A JP2018506171 A JP 2018506171A JP 2017530257 A JP2017530257 A JP 2017530257A JP 2017530257 A JP2017530257 A JP 2017530257A JP 2018506171 A JP2018506171 A JP 2018506171A
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Abstract
感受性が高い部品構造体を有するチップ用の簡易に製造される電気部品が提供される。部品はチップの下側に接合構造体及び配線接続構造体と、少なくともポリマー層を有する支持基板とを備える。An easily manufactured electrical component for a chip having a sensitive component structure is provided. The component includes a bonding structure and a wiring connection structure on the lower side of the chip, and a support substrate having at least a polymer layer.
Description
本発明は、簡易に製造可能な電気部品及びそのような部品の簡易な製造方法に関する。 The present invention relates to an electric component that can be easily manufactured and a simple manufacturing method of such a component.
電気部品、例えば電気若しくは電子モジュール又はいわゆる部品パッケージ若しくはモジュールパッケージは、一般に、1又は複数のチップと、1又は複数の十分な機械的安定性を有する支持基板と、チップ間、つまりチップと支持基板との間を電気的に配線接続するストリップ導体とを備える。その場合、電気部品の中には、機械的又は電気機械的機能を果たすためのチップを更に有するものもある。半導体技術のみに基づく集積回路を備えるチップは外的影響に対してまだ比較的感受性が低い一方、機械的にアクティブなチップを感受性が高い部品構造体に基づいて一体化するのは問題がある。 Electrical components, such as electrical or electronic modules or so-called component packages or module packages, generally comprise one or more chips, a support substrate having one or more sufficient mechanical stability, and between the chips, i.e. the chip and the support substrate. And a strip conductor that is electrically connected to each other. In that case, some electrical components further have a chip for performing a mechanical or electromechanical function. While chips with integrated circuits based solely on semiconductor technology are still relatively insensitive to external influences, it is problematic to integrate mechanically active chips based on sensitive component structures.
米国特許第8,227,904号、米国特許公開第2009/0101998号、又は独国特許公開第102010006132号から、互いに配線接続されたチップを有する電気部品は公知である。そのような部品の製造は高価であり、高い製造コストや、最適化されていない耐久性に反映される。 From U.S. Pat. No. 8,227,904, U.S. Pat. Publication No. 2009/0101998 or DE-A-102000006132, electrical components having chips interconnected to one another are known. The manufacture of such parts is expensive and is reflected in high manufacturing costs and unoptimized durability.
従って、本発明の課題は、複数のチップ、特に機械的にアクティブなチップとその間の電気配線接続を備えることができ、チップに適切で保護する環境を与え、簡易な方法で製造可能で、長寿命である電気部品を提供することにある。よって、そのような部品の簡易な製造方法も提供されることになる。 The object of the present invention is therefore to provide a plurality of chips, in particular mechanically active chips and electrical wiring connections between them, giving the chip a suitable and protective environment, which can be manufactured in a simple manner and long It is to provide an electrical component that has a lifetime. Therefore, a simple method for manufacturing such a component is also provided.
これらの課題は独立請求項に記載の部品又は方法により解決される。従属請求項は部品又は方法の有利な形態を記載する。 These problems are solved by the parts or methods described in the independent claims. The dependent claims describe advantageous forms of the part or the method.
電気部品は少なくとも1つのポリマー層を有する支持基板を備える。部品は接合構造体と金属配線接続構造体とを有する第1チップを更に備える。接合構造体も金属配線接続構造体もチップの下側に配置される。第1チップは支持基板上に配置される。接合構造体はポリマー層上に載置されるか、又はポリマー層内を完全に貫通することなく突出する。配線接続構造体はポリマー層を貫通する。 The electrical component comprises a support substrate having at least one polymer layer. The component further includes a first chip having a joint structure and a metal wiring connection structure. Both the junction structure and the metal wiring connection structure are arranged on the lower side of the chip. The first chip is disposed on the support substrate. The bonded structure is placed on the polymer layer or protrudes without completely penetrating the polymer layer. The wiring connection structure penetrates the polymer layer.
また、チップの下側に異なる構造体を有する電気部品が提供される。接合構造体は一般に、チップの下側から測定して、配線接続構造体よりも小さい高さを有する。このように、配線接続構造体はチップ下の支持基板のポリマー層を貫通して、電気配線接続に用いられることが可能である一方、接合構造体は、チップと支持基板との間の機械的接合を確立する。 An electrical component having a different structure on the lower side of the chip is also provided. The junction structure generally has a smaller height than the wiring connection structure as measured from below the chip. In this way, the wiring connection structure penetrates the polymer layer of the support substrate under the chip and can be used for electrical wiring connection, while the bonding structure is a mechanical structure between the chip and the support substrate. Establish a bond.
支持基板の一部としてのポリマー層は製造時に、比較的柔らかいか、又は完全に液状になる場合があるため、支持基板のこの層に電気めっきスルーホールを得ることができ、チップはその下側のその構造体が、最上層として柔らかいポリマー層を有する支持基板上に単に十分な強度で押圧されることで、続いてポリマー層が硬化される。そして、ポリマー層の下に位置する更なる層の1つが除去される場合でも、支持基板の下側におけるチップとの電気接続はすでに存在している。 Since the polymer layer as part of the support substrate may be relatively soft or completely liquid at the time of manufacture, an electroplating through hole can be obtained in this layer of the support substrate, with the chip on its underside The structure is then pressed with sufficient strength onto a support substrate having a soft polymer layer as the top layer, which subsequently cures the polymer layer. And even if one of the additional layers located under the polymer layer is removed, an electrical connection with the chip on the underside of the support substrate already exists.
例えば、接合構造体が周囲を環状に閉鎖されたフレーム構造を形成している場合等に、接合構造体のトポロジーに応じて、簡単な方法で、閉鎖された中空空間を第1チップと支持基板との間の隙間に更に得ることができる。 For example, when the joining structure forms a frame structure whose periphery is closed in an annular shape, the closed hollow space can be formed into a first chip and a supporting substrate by a simple method according to the topology of the joining structure. Can be further obtained in the gap between the two.
その場合、更に、第1チップはMEMS(Micro−Electro−Mechanical System)チップ、NEMS(Nano−Electro−Mechanical System)チップ、ICチップ、光電子チップ、アクチュエータチップ、又は単にパッシブ回路素子を備えるチップであってよい。その上、第1チップは複合チップであってもよく、上記チップカテゴリーの異なる回路構造体又は部品を備えることができる。 In that case, the first chip is a MEMS (Micro-Electro-Mechanical System) chip, a NEMS (Nano-Electro-Mechanical System) chip, an IC chip, an optoelectronic chip, an actuator chip, or a chip that simply includes passive circuit elements. It's okay. In addition, the first chip may be a composite chip, and may include circuit structures or components having different chip categories.
基板層を通過して達する接続を有する部品が簡素なため、製造時における欠陥の可能性が低下するため、部品の寿命が長くなる。 Since parts with connections that reach through the substrate layer are simple, the possibility of defects during manufacturing is reduced and the life of the parts is increased.
その場合、更に、部品はただ1つ又は少数のチップを備えることに限定されない。むしろ、部品は第2チップ、つまり、例えば上記カテゴリーの感受性が高く、脆弱なチップであってよい、複数の更なるチップを有してよい。 In that case, furthermore, the component is not limited to comprising only one or a few chips. Rather, the component may have a second chip, i.e. a plurality of further chips, which may be, for example, sensitive and fragile chips of the above categories.
更に、支持基板は上記ポリマー層の他に、ポリマー層の下に配置される層を備えてよい。その場合、層は1又は複数の層から成ってよく、半導体内蔵基板(SESUB)、回路基板、LTCC(Low−Temperature Co−fired Ceramics)基板、HTCC(High−Temperature Co−fired Ceramics)基板、有機支持薄片、無機支持薄片、金属薄片、単結晶基板、多結晶基板、半導体基板、セラミック基板、又はガラス基板であってよい。また、これらの基本的に支持材として適切な材料の複合層は、少なくとも部品の製造時は、ポリマー層の下に配置されてよい。 In addition to the polymer layer, the support substrate may include a layer disposed under the polymer layer. In this case, the layer may be composed of one or a plurality of layers, such as a semiconductor embedded substrate (SESUB), a circuit substrate, an LTCC (Low-Temperature Co-fired Ceramics) substrate, an HTCC (High-Temperature Co-fired Ceramics) substrate, an organic It may be a support flake, inorganic support flake, metal flake, single crystal substrate, polycrystalline substrate, semiconductor substrate, ceramic substrate, or glass substrate. Also, a composite layer of these essentially suitable materials as a support may be placed under the polymer layer, at least during the manufacture of the part.
更に、部品は第1チップと支持基板との間の隙間を有してよい。例えばMEMS部品構造体等の感受性が高い構造体は、支持基板と接触することなく、第1チップの下側に配置される。その場合、有利には平らである接合構造体がポリマー層上にある時、接合構造体の構造の高さは、ほぼ第1チップの下側とポリマー層の上側との間の距離を示す。接合構造体は特にチップと支持基板との間に中空空間を形成するために使用されるため、そして密閉された密な中空空間は多くの適用例において有利であることから、ポリマー層に若干の起伏がある場合においても密閉を確保するために、接合構造体は多少ポリマー層に突出できる。それとともに、ポリマー層の起伏はチップと支持基板との可能最短均等距離を決定する。この距離は例えば5μmであってよい。その場合、ポリマー層の厚さは10μmと50μmとの間であってよい。従って、接合構造体の構造の高さは5μm又は5μmよりも数パーセント大きいことになる。配線接続構造体の構造の高さは、(ほぼ)、チップと支持基板との距離とポリマー層の厚さとを加えたものになる。 Furthermore, the component may have a gap between the first chip and the support substrate. For example, a highly sensitive structure such as a MEMS component structure is disposed below the first chip without contacting the support substrate. In that case, when the bonding structure, which is advantageously flat, is on the polymer layer, the height of the structure of the bonding structure approximately indicates the distance between the lower side of the first chip and the upper side of the polymer layer. Since the bonded structure is used in particular to form a hollow space between the chip and the support substrate, and since a sealed dense hollow space is advantageous in many applications, there is some In order to ensure sealing even in the presence of undulations, the bonded structure can protrude somewhat into the polymer layer. At the same time, the relief of the polymer layer determines the shortest possible uniform distance between the chip and the support substrate. This distance may be 5 μm, for example. In that case, the thickness of the polymer layer may be between 10 μm and 50 μm. Therefore, the height of the structure of the bonding structure is 5 μm or several percent larger than 5 μm. The height of the structure of the wiring connection structure is (almost) the sum of the distance between the chip and the support substrate and the thickness of the polymer layer.
第1チップの下側の(感受性が高い)部品構造体は、例えば、SAW構造体(SAW=Surface Acoustic Wave=表面弾性波)、BAW構造体(Bulk Acoustic Wave=バルク弾性波)又はマイクロホンチップの電気音響トランスデューサ構造体であってよい。一般に、そのような構造体は、自在に揺動可能であるよう、隣接する表面に対して若干の距離を必要とする。 The lower (highly sensitive) component structure of the first chip is, for example, a SAW structure (SAW = Surface Acoustic Wave = surface acoustic wave), a BAW structure (Bulk Acoustic Wave = bulk elastic wave) or a microphone chip. It may be an electroacoustic transducer structure. In general, such structures require some distance relative to adjacent surfaces so that they can swing freely.
よって、更に、第1チップと支持基板との間の隙間は側方においてチップの下側にフレームとして形成された接合構造体により画定されてよい。それとともに、このフレーム、チップ、及び支持基板は中空空間を取り囲む。フレームは長方形の形状を有してよい。例えば3、5、6、7、8、若しくはそれ以上の角を有する多角形等、フレームの直線的接合要素によって接合される他の形状、又は湾曲部を有するフレームが同様に可能である。 Accordingly, the gap between the first chip and the support substrate may be further defined by a joint structure formed as a frame on the lower side of the chip on the side. At the same time, the frame, the chip, and the support substrate surround the hollow space. The frame may have a rectangular shape. Other shapes joined by the linear joining elements of the frame, such as polygons with 3, 5, 6, 7, 8, or more corners, or frames with curved portions are possible as well.
フレームの他に、接合構造体はその上、例えばスペーサとしてフレーム内部又はフレーム外部に配置され、チップに力が加わってもチップと支持基板との間に均等な距離を確保する更なる要素を有してよい。そのようなスペーサは特にいわゆるピラーであってよい。 In addition to the frame, the joining structure is additionally arranged inside the frame or outside the frame, for example as a spacer, and has additional elements that ensure an even distance between the chip and the support substrate even when force is applied to the chip. You can do it. Such a spacer may in particular be a so-called pillar.
第1チップの下側の接合構造体は主要構成要素としてポリマー、Cu(銅)、Al(アルミニウム)、Ag(銀)、若しくはAu(金)又は更なる金属を含んでよい。同様に、配線接続構造体は例えば金属の主要構成要素としてCu、Al、Ag、若しくはAu、又はこれらの金属からなる導電性金属ナノ粒子を含有するポリマーを含んでよい。 The bonding structure on the lower side of the first chip may comprise polymer, Cu (copper), Al (aluminum), Ag (silver), or Au (gold) or further metal as a main component. Similarly, the wiring connection structure may include, for example, a polymer containing Cu, Al, Ag, or Au as a main component of metal, or conductive metal nanoparticles made of these metals.
主要構成要素としての金属の中で、特にCuが接合構造体にも配線接続構造体にも有利なのは、Cuは標準CMOSプロセスと適合し、良好な電気伝導性を有し、良好な機械的剛性値を有し、そして製造工程において十分に長い間酸化性雰囲気に対して耐えるからである。 Among metals as main components, Cu is particularly advantageous for both junction structure and wiring connection structure. Cu is compatible with standard CMOS process, has good electrical conductivity, and good mechanical rigidity. Because it has a value and withstands an oxidizing atmosphere for a sufficiently long time in the manufacturing process.
非金属主要構成要素の中で、ポリマーは、ポリマープリンタを用いた噴射により良好な水平方向の分解能とともに正確に位置合わせされ、十分な厚さで製造されえるという点で有利である。噴射するポリマー材料が例えば金属ナノ粒子の形で金属を含有する場合、その上3次元プロファイルを有する導電性構造体がプリントされる。 Among the non-metallic main components, the polymer is advantageous in that it can be accurately aligned with good horizontal resolution and produced with sufficient thickness by jetting with a polymer printer. If the polymer material to be sprayed contains a metal, for example in the form of metal nanoparticles, then a conductive structure having a three-dimensional profile is printed.
配線接続構造体はチップと支持基板との間に1又は複数のバンプ接合体若しくは金属ピラー又はチップ及び/又は支持基板にめっきスルーホールを有してよい。 The wiring connection structure may have one or a plurality of bump bonded bodies or metal pillars or a plated through hole in the chip and / or the support substrate between the chip and the support substrate.
更に、接合構造体は円形若しくは長方形の断面を有する支持体(ピラー)又は支持フレームを含んでよい。 Furthermore, the joining structure may include a support (pillar) or a support frame having a circular or rectangular cross section.
特に、チップが支持基板上で製造工程において型材によって囲まれる場合、高圧がチップに加わることがある。チップと支持基板との間の接合構造体の一部として支持要素を備えることで、チップの位置や特に場合によっては感受性が高い電気配線接続構造体を安定させることができる。 In particular, when the chip is surrounded by a mold material in the manufacturing process on the support substrate, a high pressure may be applied to the chip. By providing the support element as a part of the bonding structure between the chip and the support substrate, it is possible to stabilize the position of the chip and particularly the sensitive electrical wiring connection structure depending on the case.
更に、チップと支持基板との間の支持接合構造体はチップと支持基板との間の材料の異なる膨張係数による悪影響を低減又は完全に補償する。 Furthermore, the support joint structure between the chip and the support substrate reduces or completely compensates for the adverse effects due to the different expansion coefficients of the material between the chip and the support substrate.
部品は第2チップを備えてよい。第2チップは第1チップの上方又は直接上に配置されてよい。また、第2チップは第1チップと並んで支持基板上に配置されてもよい。 The component may comprise a second chip. The second chip may be disposed above or directly above the first chip. The second chip may be arranged on the support substrate along with the first chip.
従って、そのような部品は2つのチップを備える。両チップの一方が機械的にアクティブな部品構造体を含んでよい一方、それぞれ他方のチップは、例えばASIC(Application−Specific Integrated Circuit=特定用途向け集積回路)が実現される集積回路を含む。このように、機械的な部品を支持するチップは例えば自在に揺動する導電性ダイアフラムや導電性バックプレートを有するマイクロホンチップであってよい一方、他方のチップは、受信した音響信号の電気的にエンコードされた出力信号を出力するため、アナログ又はデジタルの評価ロジックを含む。 Such a component therefore comprises two chips. One of the two chips may include a mechanically active component structure, while the other chip includes an integrated circuit on which, for example, an ASIC (Application-Specific Integrated Circuit) is implemented. Thus, the chip that supports the mechanical components may be, for example, a freely oscillating conductive diaphragm or a microphone chip having a conductive back plate, while the other chip is electrically connected to the received acoustic signal. Includes analog or digital evaluation logic to output an encoded output signal.
部品は、更に、積層体、型材、プリント工程による被塗布材、若しくは第1チップ上方の薄片を有するチューブシート及び/又は支持基板の領域上に直接配置される充填材を備えることができる。その場合、充填材(例えばいわゆるアンダーフィル材等)は、チップと支持基板との間の安定した接合を確立するか又はチップの下の中空空間を密閉するために、例えば第1又は更なるチップ等のチップ材と支持基板との間の隙間を充填する。 The component can further comprise a laminate, a mold, a material to be applied by a printing process, or a tube sheet having a flake above the first chip and / or a filler placed directly on the area of the support substrate. In that case, a filler (eg a so-called underfill material) is used, for example, for the first or further chip to establish a stable bond between the chip and the support substrate or to seal the hollow space under the chip. The gap between the chip material and the support substrate is filled.
更に、部品は、金属からなるトップ層を第1チップ上方又は更なるチップ上方に備えてよい。その場合、金属からなるトップ層はチップと直接接触していてよい。また、トップ層の金属は部品の最上層の1つであり、その下に配置される層を電磁的に遮蔽してよい。 Furthermore, the component may comprise a top layer made of metal above the first chip or above the further chip. In that case, the top layer made of metal may be in direct contact with the chip. Further, the metal of the top layer is one of the uppermost layers of the component, and the layer disposed thereunder may be electromagnetically shielded.
並設されたチップ間の距離が例えば200μmよりも長くできる場合、被覆する薄片を基板の表面まで引き下げてよい。 If the distance between the chips arranged side by side can be longer than, for example, 200 μm, the covering flakes may be pulled down to the surface of the substrate.
並設されたチップ間の距離が例えば50μmよりも短い場合、薄片は基板まで引き下げられない時には中空空間の周囲を囲い込む一部を具現してよい。 When the distance between the chips arranged side by side is shorter than 50 μm, for example, the thin piece may embody a part surrounding the periphery of the hollow space when it is not pulled down to the substrate.
トップ層が高音響コントラストを有する1又は複数の層を含む場合、選択的除去により部品の印字を得ることができる。 If the top layer includes one or more layers with high acoustic contrast, the part can be printed by selective removal.
第1チップ又は更なるチップはセンサチップであってよい。チップはカバーの下に配置されてよい。また、センサチップが部品の周囲と連通でき、例えば圧力比又は異なるガス組成物を分析できる場合、センサチップはカバーの孔を通して周囲と接続される。 The first chip or the further chip may be a sensor chip. The chip may be placed under the cover. Also, if the sensor chip can communicate with the surroundings of the part, for example, when analyzing pressure ratios or different gas compositions, the sensor chip is connected to the surroundings through a hole in the cover.
部品はマイクロホンであってよい。その場合、センサチップは例えばダイアフラムやバックプレート等の電気音響トランスデューサ構造体を備える。カバーの下には後方容積が構成される。 The component may be a microphone. In this case, the sensor chip includes an electroacoustic transducer structure such as a diaphragm or a back plate. A rear volume is configured under the cover.
備えられたマイクロホンが調整可能な信号品質はとりわけいわゆる後方容積に依存する。後方容積は、ダイアフラム後方の音響方向に設置される。後方容積が小さいほど、音響伝搬方向におけるダイアフラムの偏向に対して作用するカウンタープレッシャーは大きい。よって、大きい後方容積が有利である。しかし、小型化に向かう継続的傾向は大きい後方容積とは反対方向にあるため、大きい後方容積を有しながらも全体として小さい寸法を有するマイクロホンを提供することは常に有利である。電気部品が第1チップの他に更なる回路要素を備える場合、これらは共通のカバーの下に配置されてよく、カバー下のチップ間の空間を拡張後方容積として使用してよい。 The signal quality that can be adjusted by the provided microphone depends inter alia on the so-called rear volume. The rear volume is installed in the acoustic direction behind the diaphragm. The smaller the rear volume, the greater the counter pressure acting on the diaphragm deflection in the direction of acoustic propagation. Thus, a large rear volume is advantageous. However, since the continuing trend towards miniaturization is in the opposite direction to the large rear volume, it is always advantageous to provide a microphone that has a large rear volume but a small overall size. If the electrical component comprises further circuit elements in addition to the first chip, these may be arranged under a common cover and the space between the chips under the cover may be used as an extended rear volume.
また、支持基板に凹部を設ければ、後方容積を拡張できる。 Moreover, if a recessed part is provided in a support substrate, back volume can be expanded.
部品は第1チップの他にその上少なくとも1つの更なるチップを備えることができる。同様に、更なるチップは支持基板の上側に配置される。支持基板の上側に延在するチップ間の接続区間は非常に長いため、チップ同士が互いに接触又は他の方法で妨害することなく、チップ間に延在する折曲線の形で支持基板は湾曲可能である。複数のそのような折曲線が備えられる場合、主に大きな表面を有する部品をコンパクトな部品と組み合わせることができる。組み合わされた部品が後で成型材とともに成型される結果、異なる回路要素間の距離が正確に定義された機械的に安定した成型部品が得られる。 In addition to the first chip, the component can comprise at least one further chip on it. Similarly, a further chip is arranged on the upper side of the support substrate. The connection section between the chips extending above the support substrate is very long, so the support substrate can be bent in the form of a fold line extending between the chips without touching each other or otherwise interfering with each other It is. If a plurality of such folding lines are provided, a part with a large surface can be combined with a compact part. The combined parts are later molded with the molding material, resulting in a mechanically stable molded part in which the distance between the different circuit elements is precisely defined.
更に、部品は、外部の回路環境との差込接続により接合し配線接続されるために備えられた露出するストリップ導体及び/又は接触面を支持基板の上側に備えてよい。有利には、ストリップ導体は支持基板の縁で終端する。そこでは、ストリップ導体は有利にはコンタクトパッドに拡張される。また、部品は、容易に対応する適合したねじこみ口に差し込むことができるコネクタを構成する。そのような差込接続は、同時に電気配線接続と機械的接続を具現し、外すのが容易であるという有利な点を有する。従って、不良部品の交換を容易に実行できる。 Further, the component may include an exposed strip conductor and / or contact surface on the upper side of the support substrate that is provided for joining and wiring connection by plug-in connection with an external circuit environment. Advantageously, the strip conductors terminate at the edge of the support substrate. There, the strip conductor is advantageously extended to a contact pad. The parts also constitute a connector that can be easily inserted into a corresponding and suitable screw-in opening. Such plug-in connection has the advantage that it is easy to implement and simultaneously disconnect the electrical wiring connection and the mechanical connection. Accordingly, replacement of defective parts can be easily performed.
電気部品の製造方法は第1チップを設けることを含む。第1チップの下側には金属接合構造体と金属配線接続構造体が形成される。接合構造体と配線接続構造体は異なる高さを有する。 The method for manufacturing an electrical component includes providing a first chip. A metal junction structure and a metal wiring connection structure are formed below the first chip. The junction structure and the wiring connection structure have different heights.
更に、十分に柔らかいポリマー層を有する支持基板が設けられる。 Furthermore, a support substrate having a sufficiently soft polymer layer is provided.
第1チップと支持基板とを接合する。その場合、配線接続構造体はそれに十分に柔らかいポリマー層を貫通する。接合構造体はポリマー層を完全に貫通することなく、ポリマー層と接触するか又は僅かにポリマー層に突入する。 The first chip and the support substrate are joined. In that case, the wiring connection structure penetrates a sufficiently soft polymer layer. The bonded structure contacts or slightly penetrates the polymer layer without completely penetrating the polymer layer.
支持基板の主要構成要素を構成するポリマー層上に第1チップを載置した後、ポリマー層を硬化することは可能であり、ポリマー層の粘度応じて必要である。その場合、ポリマー層を照射又は加熱により硬化させることができる。 After placing the first chip on the polymer layer that constitutes the main component of the support substrate, the polymer layer can be cured and is necessary depending on the viscosity of the polymer layer. In that case, the polymer layer can be cured by irradiation or heating.
ポリマー層を加熱により硬化させる場合、第1チップ下の接合構造体の存在が有利な効果を奏するのは、異なる熱膨張係数が存在する可能性があるからである。 When the polymer layer is cured by heating, the presence of the bonded structure under the first chip has an advantageous effect because there may be different coefficients of thermal expansion.
支持基板は、ポリマー層の下に好適な光波長領域において透明な層を含む。その場合、ポリマー層を有利にはこの波長領域の光を用いた曝射により硬化する。その場合、好適なのは、ポリマー層の硬化が良好に可能な、その光波長領域である。特に、紫外線照射によって、ポリマー層を容易に硬化することができる。 The support substrate includes a transparent layer in the preferred light wavelength region under the polymer layer. In that case, the polymer layer is preferably cured by exposure with light in this wavelength region. In that case, preferred is the light wavelength region where the polymer layer can be cured well. In particular, the polymer layer can be easily cured by ultraviolet irradiation.
第1チップと並んで又は第1チップ上にまた更なるチップ又は複数の更なるチップ(を配置する。 A further chip or a plurality of further chips are arranged alongside or on the first chip.
例えばアンダーフィル材等の充填材は、チップ材と支持基板との間の領域に配置されてよい。 For example, a filler such as an underfill material may be disposed in a region between the chip material and the support substrate.
それにより、接合構造体は中空空間の周囲にフレームを形成することができ、充填材を中空空間から溢れ出るリスクなく、大面積に渡り支持基板の上側に載置することができる。 Thereby, the joining structure can form a frame around the hollow space, and the filler can be placed on the upper side of the support substrate over a large area without risk of overflowing from the hollow space.
型材及び/又は薄片は第1チップの上方に載置されてよい。 The mold material and / or the flakes may be placed above the first chip.
更に、金属トップ層は第1チップの上又は第1チップの上方に載置されてよい。 Furthermore, the metal top layer may be placed on the first chip or above the first chip.
支持基板はポリマー層の下に更なる層を含み、更なる層は、ポリマー層の硬化後、完全に又は選択的に配線接続構造体の領域から除去され、その場合配線接続構造体は露出されてよい。 The support substrate comprises a further layer below the polymer layer, which layer is completely or selectively removed from the area of the wiring connection structure after curing of the polymer layer, in which case the wiring connection structure is exposed. It's okay.
配線接続構造体の露出はレーザを用いて行われてよい。 The wiring connection structure may be exposed using a laser.
配線接続構造体は接触部を備えてよい。配線接続体の接触部はストリップ導体の形成により露出された後、支持基板の下側に接触される。 The wiring connection structure may include a contact portion. The contact part of the wiring connector is exposed by forming the strip conductor and then brought into contact with the lower side of the support substrate.
ストリップ導体の形成には、通常のリソグラフィ工程を用いてよい。 A normal lithography process may be used to form the strip conductor.
複数の部品が同時に複数製造されてよい。全ての部品の全ての構成要素がつなぎ合わされた後、個々の部品を個別化することにより分離してよい。 A plurality of parts may be manufactured simultaneously. After all components of all parts are joined together, the individual parts may be separated by individualization.
部品の上側に光学的に高コントラストを有する複合層を付着させてよい。そのような複合層は、例えば銅、ニッケル、及び黒ニッケルを含有する薄膜又は層を含んでよい。その後、部品はニッケル含有材料を選択的に除去することで印字される。 A composite layer having optically high contrast may be deposited on the upper side of the component. Such composite layers may include thin films or layers containing, for example, copper, nickel, and black nickel. Thereafter, the part is printed by selectively removing the nickel-containing material.
導電性構造体はチップの表面及び/又は支持基板の表面に金属若しくは合金を被着すること又は例えばナノ粒子等の金属含有粒子を噴射することにより形成してよい。導電性構造体は、このように、電解めっき若しくは無電解めき工程により又は好適なプリンタによるプリントにより製造してよい。 The conductive structure may be formed by depositing a metal or alloy on the surface of the chip and / or the surface of the support substrate, or by injecting metal-containing particles such as nanoparticles. The conductive structure may thus be produced by electroplating or electroless plating or by printing with a suitable printer.
チップはお互いに積み重ねてよく、めっきスルーホールを通してお互いに又は基板と配線接続されてよい。そのため、チップ表面上に再配線層が配置されてもよく、接触部を通して異なる水平方向の位置で配線接続されてよい。 The chips may be stacked on each other and may be interconnected with each other or the substrate through plated through holes. Therefore, a rewiring layer may be disposed on the chip surface, and wiring connection may be made at different horizontal positions through the contact portion.
例えばチップと基板との間又はチップ間の電気的はんだ接続は、例えばコテはんだにより実施してよい。 For example, the electrical solder connection between the chip and the substrate or between the chips may be performed by, for example, soldering.
以下、部品又は方法の主な特徴を、概略的であって限定的でない図面を参照して更に説明する。 In the following, the main features of the part or method will be further described with reference to the schematic and non-limiting drawings.
図6は、支持基板のポリマー含有上層TSOの厚さに対する、接合構造体VBS及び配線接続構造体VSSの主要な幾何学的寸法又は構造の高さを示す。接合構造体VBS及び配線接続構造体VSSは第1チップCH1の下側に配置される。配線接続構造体VSSの高さは接合構造体VBSの高さより大きい。主に、接合構造体VBSは、第1チップCH1の下側と支持基板TSの上側との距離を維持する役割を果たす。その場合、接合構造体VBSは、主にポリマー材料からなる支持基板TSの最上層TSOと接触する。接合構造体VBSはほぼ上層TSOの上側に載置されるか、又は場合によっては僅かに上層TSOに突入していてよい。 FIG. 6 shows the major geometric dimensions or heights of the junction structure VBS and the wiring connection structure VSS with respect to the thickness of the polymer-containing upper layer TSO of the support substrate. The junction structure VBS and the wiring connection structure VSS are disposed below the first chip CH1. The height of the wiring connection structure VSS is larger than the height of the bonding structure VBS. The junction structure VBS mainly serves to maintain a distance between the lower side of the first chip CH1 and the upper side of the support substrate TS. In that case, the bonding structure VBS is in contact with the uppermost layer TSO of the support substrate TS mainly made of a polymer material. The joint structure VBS may be mounted substantially on the upper side of the upper layer TSO, or in some cases, may slightly enter the upper layer TSO.
配線接続構造体VSSはその大きい高さにより支持基板TSのポリマー含有上層TSOを貫通している。後で配線接続構造体VSSの要素と電気的接触を起こす場合、単に支持基板の下層TSUを貫通すればよい。その場合、上層TSOはほぼ維持され、機械的安定性が確保される。 The wiring connection structure VSS penetrates the polymer-containing upper layer TSO of the support substrate TS due to its large height. When electrical contact is made later with the elements of the wiring connection structure VSS, it is only necessary to penetrate the lower layer TSU of the support substrate. In that case, the upper layer TSO is substantially maintained, and mechanical stability is ensured.
図1〜5はそのような部品の主な製造工程を示す:
図1には、支持基板のベース、つまり支持基板の下層TSUが示されている。
Figures 1-5 show the main manufacturing process of such a component:
FIG. 1 shows the base of the support substrate, that is, the lower TSU of the support substrate.
その上には、ポリマー含有上層TSOが載置される(図2)。その場合、上層は非常に柔らかいため、配線接続構造体VSSはこれを後ほど容易に貫通できる。特に、上層TSOは液状であってよい。 A polymer-containing upper layer TSO is placed thereon (FIG. 2). In that case, since the upper layer is very soft, the wiring connection structure VSS can easily penetrate this later. In particular, the upper layer TSO may be liquid.
図3は、その下側に、例えばSAW構造体、BAW構造体、又はダイアフラム等の感受性が高い部品構造体BESを支持する第1チップCH1を示す。部品構造体は、正確な機能を確保するため、揺動自在に第1チップCH1の上側に配置されることを特徴とする。 FIG. 3 shows a first chip CH1 that supports a highly sensitive component structure BES such as a SAW structure, a BAW structure, or a diaphragm, for example. The component structure is characterized in that the component structure is swingably disposed on the upper side of the first chip CH1 in order to ensure an accurate function.
図4は、例えば部品構造体を外部の回路環境又は部品の更なる回路部品と配線接続するために、配線接続構造体VSSが第1チップCH1の下側に配置される仕方を示す。 FIG. 4 shows how the wiring connection structure VSS is arranged below the first chip CH1, for example in order to wire-connect the component structure to an external circuit environment or a further circuit component of the component.
図5は、更に第1チップの下側の接合構造体VBSを示す。それにより、部品構造体BESとそのために設けられた支持基板TSとの十分な距離を維持することができるが、接合構造体VBSは、好ましくは、部品構造体BESよりも大きい構造高さを有する。 FIG. 5 further shows a bonding structure VBS on the lower side of the first chip. Thereby, a sufficient distance between the component structure BES and the support substrate TS provided therefor can be maintained, but the bonding structure VBS preferably has a larger structural height than the component structure BES. .
このように、第1チップCH1におけるその下側のその構造体と支持基板TSとが接合した後、図6に示される部品が得られ、部品構造体は支持基板TSとの十分な距離を有する。接合構造体VBSは自身が閉じられている場合、特に、部品構造体が配置される、遮断された中空空間が得られる。 Thus, after the lower structure of the first chip CH1 and the support substrate TS are joined, the component shown in FIG. 6 is obtained, and the component structure has a sufficient distance from the support substrate TS. . When the joint structure VBS is closed, a closed hollow space is obtained, in particular, where the component structures are arranged.
図7は第2チップCH2が配置された支持基板TSの一部を更に示す。第2チップは感受性が高い部品構造体をその表面に備えることを必要としない。そのため、その下側と支持基板TSとが直接接触しても破損しない。第2チップCH2と支持基板TSとの接合構造体は可能であるが、必須ではない。 FIG. 7 further shows a part of the support substrate TS on which the second chip CH2 is arranged. The second chip does not need to have a sensitive component structure on its surface. Therefore, even if the lower side and the support substrate TS are in direct contact, they are not damaged. A joined structure of the second chip CH2 and the support substrate TS is possible but not essential.
ここで、図8は、機械的に感受性が高い部品構造体をその下側に有する第1チップCH1とともに感受性が低い第2チップCH2を支持基板上に配置した部品Bを示す。両チップは、支持基板TSのポリマー含有最上層を通る、電気接触構造体をその下側に備える。 Here, FIG. 8 shows a component B in which a second chip CH2 having a low sensitivity and a first chip CH1 having a mechanically sensitive component structure on the lower side thereof are arranged on a support substrate. Both chips comprise an electrical contact structure on the underside that passes through the polymer-containing top layer of the support substrate TS.
図9は、第2チップCH2が支持基板と直接接触していない実施形態を示す。第2チップCH2と支持基板TSとの間の自由空間が望ましくない場合、第2チップCH2下の容積を、例えばアンダーフィル材UF等の充填材で充填してよい。 FIG. 9 shows an embodiment in which the second chip CH2 is not in direct contact with the support substrate. When the free space between the second chip CH2 and the support substrate TS is not desirable, the volume under the second chip CH2 may be filled with a filler such as an underfill material UF.
第1チップCH1の接合構造体VBSはリング状に閉じられているフレームRとして形成されているので、第1チップCH1の下側の感受性が高い部品構造体にとってもアンダーフィル材UFを塗布することによる危険はない。逆に、充填材UFは第1チップCH1下の中空空間の密閉閉止を向上させることができる。 Since the joint structure VBS of the first chip CH1 is formed as a frame R that is closed in a ring shape, the underfill material UF is also applied to a highly sensitive component structure below the first chip CH1. There is no danger due to. Conversely, the filler UF can improve the hermetic closure of the hollow space under the first chip CH1.
図10は、配線接続構造体VSSが電気的に接続される場合における、従来の部品に対する本発明の構成の主な利点を示す。有利には、支持基板の上層が硬化される一方で、十分な機械的安定性を与えることができる。なお、信号線を形成して配線構造体の配線接続を行うため、その下の層TSUを貫通し、それにより配線接続構造体VSSを露出させることがただ必要である。このように、例えばレーザを用いて、孔Lを支持基板TSのポリマー層の下に配置された層TSUに作孔してよい。 FIG. 10 shows the main advantages of the configuration of the present invention over conventional parts when the wiring connection structure VSS is electrically connected. Advantageously, the upper layer of the support substrate can be cured while providing sufficient mechanical stability. In order to connect the wiring structure by forming the signal line, it is only necessary to penetrate the underlying layer TSU and thereby expose the wiring connection structure VSS. Thus, for example, using a laser, the holes L may be drilled in the layer TSU disposed below the polymer layer of the support substrate TS.
図11は、通常のリソグラフィ工程によって支持基板の下側に配置され、チップの電気接触部間又はチップの接触部と外部のコンタクトパッドKPを配線接続する、その金属被覆部Mを示す。 FIG. 11 shows a metal coating M that is disposed under the support substrate by a normal lithography process and interconnects the electrical contact portions of the chip or between the contact portion of the chip and the external contact pad KP.
図12は、信号経路を形成するための金属被覆部Mを下側に設置する前に、個々の孔Lを選択的に配線接続構造体VSSの位置に作孔するのではなく、支持基板TSの下層TSUを完全に除去した実施形態を示す。 In FIG. 12, before the metal covering portion M for forming the signal path is installed on the lower side, the individual holes L are not selectively formed at the position of the wiring connection structure VSS, but the supporting substrate TS. An embodiment in which the lower TSU of the lower layer is completely removed is shown.
図13及び14は、支持基板と第2チップCH2との間に充填材が配置されていない、支持基板の下側の対応する電気接続を示す。ポリマー層の厚さ及び安定性に応じて、これらはすでに十分な機械的安定性(図14)を自在に有することができる。 13 and 14 show the corresponding electrical connections on the underside of the support substrate, where no filler is arranged between the support substrate and the second chip CH2. Depending on the thickness and stability of the polymer layer, they can already have sufficient mechanical stability (FIG. 14).
図15は、部品の上側が薄片Fによって被覆される、更なる場合を示す。支持基板上側のチップがどれだけお互いに距離が離れているかに応じて、薄片Fを支持基板の上面と接合するか、又はチップの間で薄片の下の中空空間を取り囲んでよい。薄片が支持基板の上面と接触する場合、例えば支持基板のめっきスルーホールによって、薄片は電位と接続することができる。更に、対応して複数製造された支持基板を個別化してよく、薄片による密閉が個別化によって損なわれない、複数の異なる部品を得る。薄片が支持基板及びチップの側面とともに中空区間を形成する場合、マイクロホンのための後方容積として形成される。 FIG. 15 shows a further case where the upper part of the part is covered by a flake F. FIG. Depending on how far the chips above the support substrate are from each other, the flakes F may be joined to the upper surface of the support substrate, or the hollow space under the flakes may be surrounded between the chips. When the flakes are in contact with the upper surface of the support substrate, the flakes can be connected to an electric potential, for example by means of plated through holes in the support substrate. Furthermore, a plurality of correspondingly produced support substrates may be individualized, resulting in a plurality of different parts in which the sealing by the flakes is not impaired by the individualization. When the flake forms a hollow section with the support substrate and the side of the chip, it is formed as a rear volume for the microphone.
図16は、第1チップCH1下の中空空間Hから充填材UFが溢出することを効果的に妨げる、フレームとして形成された接合構造体VBSの保護効果を示す。従って、部品構造体BESは確実に中空空間Hに格納される。 FIG. 16 shows the protective effect of the joined structure VBS formed as a frame, which effectively prevents the filler UF from overflowing from the hollow space H under the first chip CH1. Therefore, the component structure BES is securely stored in the hollow space H.
第1チップCH1の他にも、更なるチップCH2と第3チップCH3が支持基板の上側に配置されている。 In addition to the first chip CH1, a further chip CH2 and a third chip CH3 are arranged above the support substrate.
図17は、信号経路SLを支持基板の上面の金属被覆部により形成する場合を示す。その場合、信号経路はチップの接触部から美品の縁に向かって延在し、コンタクトパッドKPで終端してよい。それにより、簡易な方法で、外部の回路環境に差込接続することが可能である。 FIG. 17 shows a case where the signal path SL is formed by a metal cover portion on the upper surface of the support substrate. In that case, the signal path may extend from the contact portion of the chip toward the edge of the beauty article and terminate at the contact pad KP. Thereby, it is possible to connect to an external circuit environment by a simple method.
折曲線KNは、チップ又は他の回路要素が支持基板の上側で支持基板の屈曲後、折曲縁KNにおいてまだ十分な場所を有するように、選択される。屈曲後、支持基板をその部品とともに上面で、例えばポリマー又は合成樹脂等の成型材により成型することができる。 The fold line KN is selected such that the chip or other circuit element still has sufficient space at the fold edge KN after bending of the support substrate above the support substrate. After bending, the support substrate can be molded together with its components on the upper surface, for example with a molding material such as a polymer or synthetic resin.
そのような成型材は図18に示される。その場合、成形材は部品の上側全体を被覆する。 Such a molding material is shown in FIG. In that case, the molding material covers the entire upper side of the part.
図19は、マイクロホンとしての部品の実施形態を示す。第1チップCH1は部品構造体としてダイアフラムMBとバックプレートRPとを支持する。支持基板の上側はカバーDにより被覆される。カバーDには孔が音響入力孔として構成される。カバーDは第1チップCH1と並んで後方容積RVを更に含む。それとともに、音響的な短絡が回避され、音響入力と後方容積RVとの間に音響シールADが形成される。この場合、接合構造体は完全には閉止されないため、第1チップCH1のダイアフラムMBの下の容積と後方容積RVとの間のガス交換が可能である。 FIG. 19 shows an embodiment of a component as a microphone. The first chip CH1 supports the diaphragm MB and the back plate RP as a component structure. The upper side of the support substrate is covered with a cover D. The cover D is configured with a hole as an acoustic input hole. The cover D further includes a rear volume RV along with the first chip CH1. At the same time, an acoustic short circuit is avoided and an acoustic seal AD is formed between the acoustic input and the rear volume RV. In this case, since the joint structure is not completely closed, gas exchange between the volume below the diaphragm MB of the first chip CH1 and the rear volume RV is possible.
図20は、ダイアフラムの下の後方容積を、支持基板つまりその最上層TSOに凹部により設ける場合を示す。 FIG. 20 shows a case where the rear volume under the diaphragm is provided by a recess in the support substrate, that is, the uppermost layer TSO.
支持基板の最上層TSOが厚いほど、後方容積RVは大きい。その場合、配線接続構造体は、最上層TSOを完全に貫通するほど十分に長い。 The thicker the uppermost layer TSO of the support substrate, the larger the rear volume RV. In that case, the wiring connection structure is long enough to completely penetrate the top layer TSO.
図21は、後方容積の一部が支持基板の凹部AUにより第1チップと並んで形成される、マイクロホンとしての部品の更なる実施形態を示す。支持基板の更なる孔Lは音響入力孔を示す。接合構造体は、音響的短絡を回避するため、この実施形態ではリング状に閉じられている。 FIG. 21 shows a further embodiment of the component as a microphone in which a part of the rear volume is formed side by side with the first chip by the recess AU of the support substrate. A further hole L in the support substrate represents an acoustic input hole. The joint structure is closed in the form of a ring in this embodiment in order to avoid acoustic shorts.
部品も部品の製造方法も、例示又は記載された実施形態に限定されない。 Neither the part nor the method of manufacturing the part is limited to the illustrated or described embodiments.
符号の説明
AU: 凹部
B: 部品
BES: 部品構造体
CH1: 第1チップ
CH2: 第2チップ
CH3: 第3チップ
D: カバー
F: 薄片
H: 中空空間
KN: 折曲線
KP: コンタクトパッド
L: 孔
M: 金属被覆部
MB: ダイアフラム
R: フレーム
RP: バックプレート
RV: 後方容積
SL: 信号経路
TS: 支持基板
TSO: 支持基板最上層
TSU: 支持基板最上層の下の層
UF: 充填材又はアンダーフィル材
VBS: 接合構造体
VM: 成型材
VSS: 配線接続構造体
DESCRIPTION OF SYMBOLS AU: Recessed part B: Part BES: Part structure CH1: First chip CH2: Second chip CH3: Third chip D: Cover F: Thin piece H: Hollow space KN: Curved line KP: Contact pad L: Hole M: Metal coating MB: Diaphragm R: Frame RP: Back plate RV: Back volume SL: Signal path TS: Support substrate TSO: Support substrate top layer TSU: Layer below support substrate top layer UF: Filler or underfill Material VBS: Bonding structure VM: Molding material VSS: Wiring connection structure
Claims (28)
少なくとも1つのポリマー層(TSO)を有する支持基板(TS)と、
その下側に接合構造体(VBR)と金属配線接続構造体(VSS)を有する第1チップ(CH1)、
以下を特徴とする、
前記第1チップ(CH1)は前記支持基板(TS)上に配置され、
前記接合構造体(VBS)は前記ポリマー層(TSO)上に載置されるか、又は前記ポリマー層(TSO)内において貫通することなく突出し、
前記配線接続構造体(VSS)は前記ポリマー層(TSO)を貫通する。 The electrical component (B) comprises:
A support substrate (TS) having at least one polymer layer (TSO);
A first chip (CH1) having a junction structure (VBR) and a metal wiring connection structure (VSS) underneath,
Features:
The first chip (CH1) is disposed on the support substrate (TS),
The bonding structure (VBS) is placed on the polymer layer (TSO) or protrudes without penetrating in the polymer layer (TSO),
The wiring connection structure (VSS) penetrates the polymer layer (TSO).
前記第1チップ(CH1)と前記支持基板(TS)との間の隙間を更に有し、
感受性が高い構造体(BES)は、前記支持基板(TS)と接触することなく、前記第1チップ(CH1)の下側に配置される。 In the component according to any one of claims 1 to 3,
A gap between the first chip (CH1) and the support substrate (TS);
The highly sensitive structure (BES) is disposed below the first chip (CH1) without being in contact with the support substrate (TS).
主要構成要素としての前記接合構造体(VBS)はポリマー、Cu、Al、Ag、又はAuそして、
主要構成要素としての前記配線接続構造体(VSS)はCu、Al、Ag、又はAuを含有する。 In the component according to any one of claims 1 to 5,
The junction structure (VBS) as the main component is a polymer, Cu, Al, Ag, or Au, and
The said wiring connection structure (VSS) as a main component contains Cu, Al, Ag, or Au.
バンプ接合体若しくは金属ピラー又は
前記チップ(CH1)及び/又は前記支持基板(TS)にめっきスルーホールを有する。
有する。 The component according to any one of claims 1 to 6, wherein the wiring connection structure (VSS) is
A bump bonded body, a metal pillar, or the chip (CH1) and / or the support substrate (TS) has a plated through hole.
Have.
前記第1チップ(CH1)の上方又は上に配置されるか、
前記第1チップ(CH1)と並んで前記支持基板(TS)上に配置される。 The component according to any one of claims 1 to 8, further comprising a second chip (CH2), wherein the second chip is disposed above or on the first chip (CH1),
It is arranged on the support substrate (TS) along with the first chip (CH1).
積層体、型材(VM)、プリント工程による被塗布材、若しくは前記第1チップ(CH1)上方の薄片(F)を有するチューブシート及び/又は、
前記支持基板(TS)の領域上に直接配置され、チップ材と前記支持基板(TS)との間の隙間を充填する充填材(UF)。 The component according to any one of claims 1 to 9 further comprises:
Laminated body, mold material (VM), material to be coated by printing process, or tube sheet having thin piece (F) above first chip (CH1) and / or
Filler (UF) which is directly disposed on the region of the support substrate (TS) and fills a gap between the chip material and the support substrate (TS).
前記第1チップ(CH1)又は更なるチップ(CH2、CH3)はセンサチップであって、カバー(D)の下に配置され、
前記センサチップは前記カバー(D)の孔を通して前記部品(B)の周囲と接続される。 In the component according to any one of claims 1 to 11,
The first chip (CH1) or the further chip (CH2, CH3) is a sensor chip and is disposed under the cover (D),
The sensor chip is connected to the periphery of the component (B) through a hole in the cover (D).
前記部品はマイクロホンであって、
前記センサチップは電気音響トランスデューサ構造体を備え、
前記カバー(D)の下には後方容積(RV)が構成される。 The component according to claim 12,
The component is a microphone,
The sensor chip comprises an electroacoustic transducer structure;
A rear volume (RV) is formed under the cover (D).
第1チップ(CH1)を設けるステップと、
前記第1チップ(CH1)の下側に金属接合構造体(VBS)と金属配線接続構造体(VSS)を形成するステップにおいて、前記両構造体(VBS、VSS)は異なる高さを有するステップと、
柔らかいポリマー層(TSO)を有する支持基板(TS)を設けるステップと、
前記第1チップ(CH1)と前記支持基板(TS)とを接合するステップにおいて、前記配線接続構造体(VSS)は前記ポリマー層(TSO)を貫通し、前記接合構造体(VBS)は前記ポリマー層(TSO)を貫通することなく前記ポリマー層(TSO)と接触するステップ。 The manufacturing method of the electrical component (B) includes the following steps:
Providing a first chip (CH1);
In the step of forming a metal junction structure (VBS) and a metal wiring connection structure (VSS) under the first chip (CH1), the structures (VBS, VSS) have different heights; ,
Providing a support substrate (TS) having a soft polymer layer (TSO);
In the step of bonding the first chip (CH1) and the support substrate (TS), the wiring connection structure (VSS) penetrates the polymer layer (TSO), and the bonding structure (VBS) is the polymer. Contacting the polymer layer (TSO) without penetrating the layer (TSO).
前記支持基板(TS)は前記ポリマー層(TSO)の下に層を含み、前記層は好適な光波長領域において透明であり、前記ポリマー層(TSO)を前記波長領域において曝射により硬化する。 The method of claim 17, wherein
The support substrate (TS) includes a layer under the polymer layer (TSO), the layer being transparent in a suitable light wavelength region, and curing the polymer layer (TSO) by exposure in the wavelength region.
前記配線接続構造体(VSS)は接触部(KP)を備え、
前記接触部(KP)はストリップ導体(SL)の形成により露出された後、前記支持基板(TS)の下側で接触される。 25. A method as claimed in any one of claims 23 or 24.
The wiring connection structure (VSS) includes a contact portion (KP),
The contact part (KP) is exposed by the formation of a strip conductor (SL), and then is contacted under the support substrate (TS).
前記部品の上側に、Cu、Ni、及び黒ニッケルを含有する層を有する複合層を付着させ、その後、
Ni含有材料を選択的に除去することで、印字される。 A method according to any one of claims 16 to 26,
A composite layer having a layer containing Cu, Ni, and black nickel is attached to the upper side of the component, and then
Printing is performed by selectively removing the Ni-containing material.
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PCT/EP2015/074148 WO2016091438A1 (en) | 2014-12-09 | 2015-10-19 | Simple to produce electric component and method for producing an electric component |
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