JP2018152458A - Light-emitting diode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element capable of generating incoherent light using optical transition of unipolar carriers.SOLUTION: A light-emitting diode comprises: a light-emitting region including a plurality of quantum well structures arranged in a first axis direction and having a side surface, an upper surface, and a lower surface; an emitter region including a first conductivity type semiconductor provided on at least any of the side surface, the upper surface, and the lower surface of the light-emitting region; and a collector connected to the side surface of the light-emitting region. The light-emitting region and the collector are arranged along a reference surface crossing the first axis. Each of the quantum well structures has a subband structure for a first conductive type carrier.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor light emitting device that generates incoherent light, and more particularly to a light emitting diode.

  Patent Document 1 discloses a quantum cascade laser.

JP-A-8-279647

  The light emission of the quantum cascade laser uses optical cascading (cascading optical transition of unipolar carriers) using light emitting layers arranged in multiple stages. In order to enable cascading optical transitions, the energy levels of the cascading light emitting layers are matched between adjacent light emitting layers using the application of an external voltage. Use of such a cascaded optical transition can increase the optical gain in the subband transition wavelength region.

  A laser diode having a pn junction generates light that is weakly incoherent, that is, so-called spontaneous emission light, in an operation below a threshold current that causes laser oscillation. According to the inventor's knowledge, an incoherent light source in the emission wavelength band of the quantum cascade laser, in other words, a semiconductor light emitting element that generates incoherent light is useful. According to the inventor's study, a multi-stage light emitting layer can provide a large optical gain, while matching the energy level of the light emitting layers arranged in cascade with an external voltage requires a large external applied voltage. And Such cascade connection of the light emitting layers in a plurality of stages is inconvenient for the generation of spontaneous emission light.

  An object of one aspect of the present invention is to provide a semiconductor light-emitting element such as a light-emitting diode that generates incoherent light using optical transition of a unipolar carrier.

  A light emitting diode according to an aspect of the present invention includes a plurality of quantum well structures arranged in a first axis direction, a light emitting region having a side surface, an upper surface, and a lower surface, the side surface of the light emitting region, the upper surface, and the An emitter region including a first conductivity type semiconductor provided on at least one of the lower surfaces; and a collector connected to the side surface of the light emitting region, wherein the light emitting region and the collector are connected to the first axis. The quantum well structure has a subband structure for the first conductivity type carrier.

  The above and other objects, features, and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

  As described above, according to one aspect of the present invention, it is possible to provide a semiconductor light emitting element such as a light emitting diode that generates incoherent light using optical transition of a unipolar carrier.

FIG. 1 is a drawing schematically showing a light emitting diode according to the present embodiment. FIG. 2 is a drawing schematically showing a light emitting diode according to the present embodiment. FIG. 3 is a view showing a structure of a light emitting region for the light emitting diode according to the present embodiment. FIG. 4 is a drawing schematically showing an energy level and a layer structure in the quantum well structure according to the first embodiment. FIG. 5 is a drawing schematically showing an energy level and a layer structure in the quantum well structure according to the second embodiment. FIG. 6 is a drawing schematically showing the supply of carriers from the emitter region of the light emitting diode according to the present embodiment to the upper surface of the light emitting region. FIG. 7 is a drawing schematically showing the supply of carriers from the emitter region of the light emitting diode according to the present embodiment to the upper surface of the light emitting region. FIG. 8 is a drawing schematically showing the supply of carriers from the emitter region of the light emitting diode according to the present embodiment to the side surface of the light emitting region. FIG. 9 is a drawing schematically showing the supply of carriers from the side surface of the light emitting region of the light emitting diode according to the present embodiment to the collector region. FIG. 10 is a diagram illustrating a quantum filter for a light emitting diode according to the present embodiment. FIG. 11 is a drawing schematically showing a light emitting diode according to the present embodiment. FIG. 12 is a diagram illustrating a quantum filter for a light emitting diode according to the present embodiment. FIG. 13 is a drawing schematically showing a lens structure for a light emitting diode according to the present embodiment. FIG. 14 is a drawing schematically showing main steps in the method for manufacturing the light emitting diode according to the present embodiment. FIG. 15 is a drawing schematically showing main steps in the method of manufacturing the light emitting diode according to the present embodiment.

  Some specific examples will be described.

  A light emitting diode according to a specific example includes (a) a light emitting region including a plurality of quantum well structures arranged in the direction of the first axis, and having a side surface, an upper surface and a lower surface, and (b) the side surface of the light emitting region, An emitter region including a first conductivity type semiconductor provided on at least one of an upper surface and the lower surface; and (c) a collector connected to the side surface of the light emitting region, the light emitting region and the collector Are arranged along a reference plane intersecting the first axis, and the quantum well structure has a subband structure for a first conductivity type carrier.

  According to the light emitting diode, the emitter region has a semiconductor region of the first conductivity type, and the emitter region provides carriers to the light emitting region via any one of the side surface, the upper surface, and the lower surface of the light emitting region. The light-emitting region does not emit light due to recombination of electrons and holes, but generates light using transitions between subbands of unipolar carriers that are one of electrons and holes. In addition, the side surface of the light emitting region extends in the direction of the first axis, and the quantum well structure is arranged in the direction of the first axis. The collector is connected in parallel to the quantum well structure in the light emitting region and receives carriers from the light emitting region through the side surface of the light emitting region. Carriers within individual quantum well structures can generate light through optical transitions during movement within the quantum well structure. The transitioned carrier flows into the collector through the side surface of the light emitting region. Since the light emitting diode does not include an optical resonator, it cannot generate coherent light and provides incoherent light.

  In the light emitting diode according to the specific example, the quantum well structure includes a first well layer, a second well layer, a first barrier layer, and a second barrier layer, and the first barrier layer includes the first well layer. The first well layer separates from the second well layer, and the first well layer separates the first barrier layer from the second barrier layer.

  According to this light emitting diode, this quantum well structure facilitates providing a higher energy level and a lower energy level to carriers of a single polarity. In addition, when this quantum well structure can further provide an energy level for relaxation, the energy level for relaxation is higher for unipolar carriers that have transitioned from an upper energy level to a lower energy level. It promotes relaxation in a time shorter than the energy level relaxation time.

  In the light emitting diode according to the specific example, the light emitting region includes a plurality of first unit cells arranged in the direction of the first axis, and the first unit cells include the first well layer and the second well layer. , The first barrier layer, and the second barrier layer, wherein the thickness of the first barrier layer is smaller than the thickness of the second barrier layer.

  According to this light emitting diode, since the thickness of the first barrier layer is smaller than the thickness of the second barrier layer, the first well layer and the second well layer in the unit cell are separated by the second barrier layer in the unit cell. It is more tightly coupled than other well layers that are separated.

  In the light emitting diode according to the specific example, the quantum well structure includes a barrier layer extending along a plane intersecting the direction of the first axis, and a dopant is added to a part or all of the barrier layer. Yes.

  According to this light emitting diode, the doped barrier layer is useful for implantation into the well layer.

  In the light emitting diode according to the specific example, the collector includes a semiconductor that is in contact with the side surface of the light emitting region.

  According to this light emitting diode, the semiconductor region of the collector receives carriers from the emitter region from the side surface of the light emitting region.

  In the light emitting diode according to the specific example, the collector includes a metal electrode that is in contact with the side surface of the light emitting region.

  According to this light emitting diode, the collector metal electrode receives carriers from the emitter region from the side surface of the light emitting region.

  The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Next, embodiments of a semiconductor light emitting element that generates incoherent light, particularly a light emitting diode, will be described with reference to the accompanying drawings. Where possible, the same parts are denoted by the same reference numerals.

  FIG. 1 is a partially broken perspective view schematically showing the semiconductor light emitting device according to the present embodiment. FIG. 2 is a partially broken perspective view schematically showing the semiconductor light emitting device according to this embodiment. FIG. 3 is a drawing schematically showing a quantum well structure and energy levels for the semiconductor light emitting device according to this embodiment. The vertical coordinate axis (vertical axis) indicates the energy level of the carrier, and the remaining two coordinate axes (horizontal axis) indicate the X, Z, and Y axes for spatial coordinates. Although the description with reference to FIG. 3 is performed with respect to electron carriers, this description can be read as hole carriers based on knowledge of semiconductor physics.

  The semiconductor light emitting element 11 that generates incoherent light will be described. As will be understood from the following description, the semiconductor light emitting device 11 does not include a pn junction, and therefore uses unipolar carriers without using light emission due to recombination of holes and electrons. In the technical field related to a semiconductor optical device including a pn junction, an optical device that generates coherent light is called a laser diode in terms of the semiconductor light emitting device 11 generating incoherent light. In accordance with a usage in which an optical element that generates light is referred to as a “light emitting diode”, the semiconductor light emitting element 11 is referred to as a “light emitting diode” in the following description. The semiconductor light emitting element 11 does not include an optical resonator and generates incoherent light.

  Referring to FIGS. 1 and 2, the light emitting diodes 11 a and 11 b include a light emitting region 15, an emitter region 17, and a collector 19. The light emitting region 15, the emitter region 17, and the collector 19 are provided on the main surface 13 a of the substrate 13. The light emitting region 15 and the collector 19 are arranged along a reference plane intersecting the first axis Ax1, or the light emitting region 15, the emitter region 17, and the collector 19 are arranged on a reference plane intersecting the first axis Ax1. It may be arranged along.

  The light emitting region 15 includes a first side surface 15b, a second side surface 15c, an upper surface 15d, a lower surface 15e, a third side surface 15f, and a fourth side surface 15g. The first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g extend in the direction of the first axis Ax1, and each of the upper surface 15d and the lower surface 15e intersects the first axis Ax1. Extending along. The first side surface 15b and the second side surface 15c extend in the direction of the second axis Ax2 that intersects the first axis Ax1. The third side surface 15f and the fourth side surface 15g extend in the direction of the third axis Ax3 that intersects the first axis Ax1 and the second axis Ax2.

  The main surface 13a of the substrate 13 includes a first area 13b and a second area 13c, and the semiconductor mesa MS is provided on the first area 13b. The semiconductor mesa MS includes a light emitting region 15. In the present embodiment, the second area 13c surrounds the first area 13b.

  The light emitting region 15 includes a plurality of quantum well structures 21, and each of the quantum well structures 21 has a subband structure for a first conductivity type carrier, as shown in FIG. Each quantum well structure 21 is provided on the main surface 13 a of the substrate 13. The light emitting region 15 of the light emitting region 15 has a plurality of unit cells 15a arranged in the direction of the first axis Ax1. Specifically, the quantum well structure 21 has a plurality of semiconductor layers (21a, 21b, 21c, 21d) such as a well layer and a barrier layer. These semiconductor layers (21a to 21d) are arranged in the direction of the first axis Ax1 intersecting the main surface 13a. The unit cell 15a has three energy levels (E1, E2, and E3).

  The emitter region 17 includes a first conductivity type semiconductor, and the first conductivity type semiconductor is provided on at least one of the upper surface 15 d, the lower surface 15 e, and the side surface of the light emitting region 15. The side surface can include at least one of the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g. Specifically, the emitter region 17 is provided on the upper surface 15d of the light emitting region 15, and can be further provided on the first side surface 15b and / or the second side surface 15c. Alternatively, the emitter region 17 is provided on a side surface (at least one of the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g).

  The collector 19 is connected to the side surface of the light emitting region 15 and receives the first conductivity type carrier from the light emitting region 15. The collector 19 is separated from the emitter region 17 and is provided on the side surface of the light emitting region 15 of the semiconductor mesa MS. Specifically, the collector 19 can be provided on at least one of the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15. In the present embodiment, the collector 19 is disposed on the side surface of the light emitting region 15 on the second area 13c, and specifically, the first side surface 15b and the second side so as to surround the light emitting region 15 on the second area 13c. It is provided on the side surface 15c, the third side surface 15f, and the fourth side surface 15g, and makes contact with these side surfaces. The collector 19 can comprise a metal and / or a semiconductor. The semiconductor can comprise a first conductivity type semiconductor or a quantum filter structure.

  According to the light emitting diodes 11 a and 11 b, the emitter region 17 has the first semiconductor region 23, and the emitter region 17 emits the light emitting region via any one of the upper surface 15 d, the lower surface 15 e, and the side surface of the light emitting region 15. 15 provides a carrier. The light emitting region 15 does not emit light by recombination of electrons and holes, but transitions between subbands of unipolar carriers that are one of electrons and holes (for example, the mid-infrared and far-infrared wavelength bands, specifically, Produces light using a wavelength between 2 and 15 micrometers. The side surface of the light emitting region 15 extends in the direction of the first axis Ax1, and the quantum well structure 21 is arranged in the direction of the first axis Ax1. The collector 19 is connected in parallel to the quantum well structure 21 in the light emitting region 15 and receives carriers from the light emitting region 15 through the side surface of the light emitting region 15. Carriers in individual quantum well structures 21 can generate light by optical transitions during movement in quantum well structures 21. The transitioned carriers flow into the collector 19 through the side surface of the light emitting region 15. Since the light emitting diodes 11a and 11b do not include an optical resonator, the light emitting diodes 11a and 11b cannot generate coherent light and provide incoherent light.

  The emitter region 17 can comprise one or more semiconductors. In the present embodiment, the first semiconductor region 23 of the emitter region 17 extends along the upper surface 15d. Specifically, the first semiconductor region 23 is separated from the upper edge of the side surface of the light emitting region 15. The emitter region 17 gives the first conductivity type carriers to the light emitting region 15. The emitter region 17 and the collector 19 are electrically separated from each other, and carriers from the emitter region 17 flow through the light emitting region 15 and reach the collector 19.

  The light emitting diodes 11 a and 11 b include a first electrode 31 a provided on the emitter region 17 and a second electrode 31 b connected to the collector 19. The first electrode 31a and the second electrode 31b are electrically connected to the emitter region 17 and the collector 19, respectively. The emitter region 17 carries the contact layer 28 a and makes contact with the upper surface of the light emitting region 15. The first electrode 31a makes ohmic contact with the first conductive semiconductor of the emitter region 17 or the first conductive semiconductor of the contact layer 28a.

  The conductivity type of the carrier provided from the emitter region 17 to the light emitting region 15 is the same as the conductivity type of the carrier provided from the light emitting region 15 to the collector 19, and the light emitting diodes 11a and 11b utilize unipolar carriers.

  In the present embodiment, in the light emitting diodes 11a and 11b, the light emitting region 15 and the emitter region 17 are arranged in the direction of the first axis Ax1, and the light emitting region 15 on the first area 13b and the collector on the second area 13c. 19 are arranged in the direction of the second axis Ax2 and / or the third axis Ax3 intersecting the first axis Ax1. The first semiconductor region 23 is separated from the upper edge of the side surface of the light emitting region 15, and this spacing provides a path from the first semiconductor region 23 to the collector 19 through the light emitting region 15. Unipolar carriers are supplied from the first semiconductor region 23 to the quantum well structure 21 in the light emitting region 15, and these unipolar carriers are transmitted from the upper energy level to the lower energy of the subband in the quantum well structure 21 in the light emitting region 15. The optical transition to the level contributes to light emission. The unipolar carriers at the lower energy level flow into the collector 19 due to the light transition in the light emitting region 15. Unipolar carriers from the emitter region 17 have the same conductivity type as the unipolar carriers that flow into the collector 19. The light emitting diodes 11a and 11b use the optical transition of unipolar carriers when emitting light, and the arrangement of the emitter region 17, the light emitting region 15 and the collector 19 is cascading of unipolar carriers (cascading optical) when emitting light. Transition) is not required. It is possible to reduce the operating voltage of the semiconductor light emitting device 11 that can generate incoherent light while avoiding cascaded optical transitions.

  A specific structure of the light emitting diodes 11a and 11b will be described.

(First structure)
The light emitting diode 11a (11) will be described with reference to FIG. In the light emitting diode 11a, the semiconductor mesa MS extends from the main surface 13a of the substrate 13 in the direction of the first axis Ax1. The collector 19 includes a second semiconductor region 25 of the first conductivity type, and the second semiconductor region 25 is provided on the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15. It is done. The second semiconductor region 25 of the collector 19 that covers the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15 extends in the direction of the first axis Ax1 on the second area 13c. To do. The conductivity type of the second semiconductor region 25 is the same as the conductivity type of the first semiconductor region 23. In the present embodiment, the second semiconductor region 25 is provided on the second area 13c and contacts the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15. The second semiconductor region 25 can include one or more semiconductor layers.

  On the upper surface 15 d of the light emitting region 15 of the semiconductor mesa MS, the first semiconductor region 23 and the contact layer 28 a are separated from the upper edge of the side surface of the light emitting region 15 to form an island structure 27. The first electrode 31 a is provided on the first island 27 a and can reflect light from the light emitting region 15. The first island 27a is isolated from the second island 27b (the second semiconductor region 25 of the collector 19 on the side surface of the light emitting region 15) by the separation groove 27c. Further, the second semiconductor region 25 of the collector 19 on the side surface of the light emitting region 15 can separate the second electrode 31 b from the upper surface 15 d of the light emitting region 15. The second electrode 31b is separated from the boundary between the first area 13b and the second area 13c, and the first electrode 31a can be provided so as to cover the entire upper surface 15d of the light emitting region 15.

  The light emitting diode 11a includes a first electrode 31a provided for the emitter region and a second electrode 31b provided on the second semiconductor region 25 of the collector 19, and the first electrode 31a and the second electrode 31b are , Respectively, make ohmic contact with the first conductive semiconductor of the emitter region 17 and the first conductive semiconductor of the collector 19.

  The insulating coating film 37 covers the top surface of the light emitting region 15, the side surfaces and top surfaces of the first semiconductor region 23 and the second semiconductor region 25, the side surfaces of the contact layer 28a, and the side surfaces and bottom surface of the separation groove 27c. A first opening 37 a is provided on the upper surface of the island 27 a, and a second opening 37 b is provided on the upper surface of the second semiconductor region 25 of the collector 19. The first electrode 31a is electrically connected to the first semiconductor region 23 through the first opening 37a, and specifically contacts the contact layer 28a on the first semiconductor region 23. The second electrode 31 b is electrically connected to the second semiconductor region 25 through the second opening 37 b and makes contact with the second semiconductor region 25.

(Second structure)
The light emitting diode 11b (11) will be described with reference to FIG. In the light emitting diode 11b, the semiconductor mesa MS extends from the main surface 13a of the substrate 13 in the direction of the first axis Ax1. The collector 19 includes a metal electrode 33, and the metal electrode 33 receives carriers from the first semiconductor region 23 through the light emitting region 15. The metal electrode 33 extends in the direction of the first axis Ax1 on the side surface of the light emitting region 15 on the second area 13c. In the present embodiment, the metal electrode 33 extends in the direction of the first axis Ax1 on the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15, so that the light emitting region 15 Terminate on the upper surface 15d of the. By this extension, the unit cells 15a can be connected in parallel. The end of the metal electrode 33 is separated from the first semiconductor region 23 of the emitter region 17 and the contact layer 28 a on the upper surface 15 d of the light emitting region 15. Specifically, the metal electrode 33 of the collector 19 is provided on the second area 13c and contacts the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15. .

  On the upper surface 15 d of the light emitting region 15 of the semiconductor mesa MS, the first semiconductor region 23 and the contact layer 28 a are separated from the upper edge of the side surface of the light emitting region 15 to form a first island 27 a. The first island 27 a is spaced from the end of the metal electrode 33 on the upper surface of the light emitting region 15.

  The first electrode 31 a is provided on the first island 27 a and can reflect light from the light emitting region 15. Further, the first electrode 31a can be provided outside the first island 27a, and may be provided so as to cover the entire upper surface 15d of the light emitting region 15. Similarly, the metal electrode 33 on the side surface of the light emitting region 15 and the metal electrode 33 on the upper surface of the semiconductor mesa MS can reflect light from the light emitting region 15. The metal electrode 33 on the side surface of the light emitting region 15 is connected to the second electrode 31b on the second area 13c.

  An insulating coating film 37 covers the metal electrode 33 on the side surface of the light emitting region 15, covers the side surface of the first semiconductor region 23, the side surface and upper surface of the contact layer 28 a, and the upper surface 15 d of the light emitting region 15, and A first opening 37 a is provided on the upper surface of the island 27 a, and a second opening 37 b is provided on the upper surface of the second area 13 c of the substrate 13. The first electrode 31a is electrically connected to the first semiconductor region 23 through the first opening 37a, and specifically contacts the contact layer 28a on the first semiconductor region 23. The second electrode 31 b is electrically connected to the metal electrode 33 through the second opening 37 b and makes contact with the metal electrode 33.

The structure of the semiconductor light emitting element 11 for the first structure and the second structure.
Substrate 13: InP.
Light emitting region 15: 50-period superlattice structure with four layers of undoped AllnAs / undoped InGaAs / undoped AllnAs / undoped InGaAs as unit units.
First semiconductor region 23: a laminated structure of Si-doped InP / undoped AlInAs, or Si-doped InP / Si-doped AlGaInAs / undoped AlInAs, or Si-doped InP / undoped AlGaPSb.
Size of semiconductor mesa MS: 15 micrometers.
Semiconductor mesa MS thickness: 1.0 micrometer.
The thickness of the light emitting region 15 is 0.8 micrometers.
The size of the first semiconductor region 23: 10 micrometers.
The thickness of the first semiconductor region 23: 0.2 micrometers.
Second semiconductor region 25: Si-doped InP / Si-doped GaInAs or a laminated structure of Si-doped InP / Si-doped GaInAsP / Si-doped GaInAs.
The thickness of the second semiconductor region 25: 1.0 micrometer.
Contact layer 28a: Si-doped InGaAs, 0.1 micrometer.
Metal electrode 33: Ti / Pt / Au.

  The light emitting diode 11 b includes a first electrode 31 a for the emitter region and a second electrode 31 b for the collector 19, and the first electrode 31 a and the metal electrode 33 are respectively a first conductive type semiconductor in the emitter region 17. In addition, ohmic contact is made with the first conductive type semiconductor in the light emitting region 15. The metal electrode 33 is connected to the second electrode 31b.

Example 1
The structure of the quantum well structure will be described with reference to FIG. In the following description, electrons are used as carriers, but holes can be used as carriers as well. In order to increase the transition probability from the upper energy level E3 to the lower energy level E2, it is preferable to lower the carrier density on the lower energy level E2 by extracting carriers. An example of the quantum well structure 21 may include a plurality of (for example, two) well layers (21a, 21b) and one or a plurality of barrier layers separating the well layers. The barrier layer (21c) is thinner than the barrier layer (21d), and the wave functions of electrons in the well layers (21a, 21b) are transferred to the well layers (21b, 21a) via the barrier layers (21c), respectively. Soak up and bond together. This structure is referred to as a “coupled quantum well”. The coupled quantum well has a well structure that is symmetrical to the left and right with respect to the center line (center in the thickness direction) of the barrier layer (21c). In such a structure, a relaxation energy level E1 that is as low as the LO phonon energy from the lower energy level E2 can be formed, and electrons that have undergone a light emission transition from the upper energy level E3 to the lower energy level E2 can be rapidly generated. Can be shifted to the relaxation energy level E1 by phonon scattering (resonance). In addition, the coupled quantum well can increase the light emission transition probability by increasing the overlap between the wave function of the upper energy level E3 and the wave function of the lower energy level E2, thereby increasing the optical gain.
Specific examples of coupled quantum wells.
Well layer / barrier layer: undoped InGaAs / undoped AllnAs.
Well layer (21a) thickness: 4 nm.
Inner barrier layer (21d) thickness: 2 nm.
Well layer (21b) thickness: 4 nm.
Outer barrier layer (21c) thickness: 10 nm.
Energy difference related to oscillation (difference between upper energy level E3 and lower energy level E2): 270 meV (oscillation wavelength: 4.6 micrometers).
Optical gain: 96 cm ⁻¹ / period.
Epop (difference between lower energy level E2 and relaxation energy level E1): 35.6 meV.
Substrate 13: InP substrate.
Further, the light emitting region does not require a structure in which the injection layer in the quantum cascade laser is essential. Therefore, the degree of freedom in designing the quantum well structure is great. For example, in a four-layer design including the AlInAs thickness of the outer barrier layer, a lattice mismatch is introduced that introduces tensile stress in the barrier layer and compressive stress in the well layer, and By substantially canceling the tensile and compressive stresses as a whole of the quantum well structure, a large band gap difference (formation of a deep quantum well) can be formed while maintaining good crystallinity. As a result, it is possible to provide improvement in temperature characteristics and expansion of the oscillation wavelength range by suppressing carrier leakage.

(Example 2)
As shown in FIG. 5, a dopant having the same polarity as the polarity of carriers can be added to at least a part of the barrier layer of the quantum well structure. By this addition, the injection efficiency into both well layers can be improved. For example, in a 10 nm thick AlInAs barrier layer, the thin layer regions 21 ca and 21 cc in contact with the well layer can be undoped, and a dopant-added thin layer region 21 cb can be provided therebetween. The doping concentration is preferably about 10 ¹⁷ cm ⁻³ or less in order to reduce loss due to free carrier absorption. This dopant-added thin layer region can enhance the in-plane conductivity in the semiconductor stack of the light emitting region, and can provide carriers to the well layer at a position away from the emitter region in the in-plane direction.

(Example 3)
The light emitting diodes 11a and 11b according to the present embodiment inject carriers into the plurality of quantum well structures 21 in the light emitting region 15 from the emitter region 17 in the direction of the first axis Ax1, and the carriers are injected into each quantum well structure 21. provide. Carriers in the quantum well structure 21 are transported in a direction parallel to the in-plane direction of the quantum well layer.
When electrons are injected into a device having such a structure, the electron distribution in the light emitting region is estimated by simulation.
In order to estimate the carrier transport in the in-plane direction, a device model that performs numerical experiments by simulation is shown below.
Mesa piece width from the center of the opening of the emitter region on the light emitting region in the mesa structure to one of the upper edges of the upper surface of the mesa: 10 micrometers.
The mesa piece width from the center of the opening of the emitter region on the light emitting region in the mesa structure to the other of the upper edge of the upper surface of the mesa is 10, 20, 50 and 100 micrometers.
Electrons drift from the opening of the emitter region by an electric field and are injected into the light emitting region.
Light emitting region: AlInAs / GaInAs multiple quantum well structure.
Model name, vertical conductivity, horizontal conductivity, vertical / horizontal conductivity ratio.
1st model, 4.3E-5, 1.7E-2, 2.53E-3.
Second model, 1.5E-5, 1.7E-2, 8.74E-4.
3rd model, 1.7E-6, 1.7E-2, 9.84E-5.
The notation “2.53E-3” indicates 2.53 × 10 ⁻³ .
The longitudinal / lateral electrical conductivity ratio is a value obtained by dividing the electrical conductivity in the vertical direction by the electrical conductivity in the horizontal direction.
About the current density in the horizontal direction.
According to the calculation result of the model having a mesa width of 100 micrometers, the electron flow density distribution in the lateral direction becomes larger as the electrical conductivity ratio in the longitudinal direction and the lateral direction of the quantum well increases. Further, according to the calculation result of the model having a mesa width of 20 micrometers, the electron current density at the collector electrode is not significantly different in the depth direction at an electrical conductivity ratio of about 3 digits.
About the current density in the vertical direction.
According to the calculation result of the model having a mesa width of 100 micrometers, the electron current density distribution in the vertical direction is distributed just below the emitter electrode. According to the calculation result of the model having a mesa width of 20 micrometers, the downward distribution decreases as the electrical conductivity ratio of the quantum well in the vertical direction and the horizontal direction increases, but the electrical conductivity of about 3 digits. Even in the ratio, electrons are distributed sufficiently downward.

  The light emitting diodes 11a and 11b according to this embodiment are different from the quantum cascade laser in that carriers in the quantum well structure 21 are transported in a direction parallel to the in-plane direction of the quantum well layer. There is no hetero barrier inherent in the laser. Due to the absence of the hetero barrier, the light emitting diode according to the present embodiment can be driven at a low voltage, and is connected in parallel without increasing the operating voltage due to the multilayered quantum well structure 21. A large optical gain can be obtained by the quantum well structure 21. In addition, the light emitting diode according to the present embodiment has no loss due to tunnel transport in the quantum cascade laser.

  Since the structure of the present embodiment does not include an injection layer provided for cascade between multi-stage quantum wells like a quantum cascade semiconductor laser in the direction of current flow, the current injection side (emitter) and the extraction side (collector) The voltage drop between the two electrodes is the sum of the voltage drop related to the energy of the oscillation wavelength and the voltage drop due to the series resistance of the element. In order to increase the optical gain, the unit cell of the quantum well structure in the light emitting region adopts a structure in which multiple layers are stacked. However, the voltage increase that increases with the number of stacked layers is not generated in the operating mechanism in the structure of this embodiment. Therefore, the operating voltage of the semiconductor light emitting element 11 is greatly reduced.

  Since the quantum cascade laser uses a cascade stack of unit cells for light emission and carrier injection in the stack direction, carrier loss occurs in the carrier injection layer in the quantum cascade laser. On the other hand, the element structure according to the present embodiment does not require a carrier injection layer and does not cause carrier loss in the carrier injection layer. In the element structure according to the present embodiment, the degree of freedom in design related to the stacked structure of the light emitting layer is increased, and the device characteristics can be improved, specifically, the threshold current, the operating voltage, and the power consumption can be reduced. Since the electrode can be configured from the upper surface of the wafer as a planar device without a large step, it is possible to expand functions such as integration with other devices and arraying. In addition, since there is no carrier injection layer, the epi layer thickness of the light emitting layer can be reduced, and non-destructive optical characteristics such as photoluminescence can be evaluated after epi growth, thereby reducing manufacturing time and cost. Also contributes.

The supply of carriers from the emitter region to the upper surface of the light emitting region will be described with reference to FIG. Part (a) of FIG. 6 is a drawing schematically showing a non-biased band structure in the emitter region 17 and the light emitting region 15. Part (b) of FIG. 6 is a drawing schematically showing a band structure under an external bias in the forward direction in the emitter region 17 and the light emitting region 15. 6 (a) and 6 (b), an array of unit cells 15a is drawn in order to show that the light emitting region 15 has a superlattice structure. The unit cell 15a is shown in part (c) of FIG. In FIG. 6A and FIG. 6B, “Ef1” indicates a Fermi level or a pseudo Fermi level, and “Ec1” indicates a conduction band. The level of the conduction band of the first semiconductor layer 33a is higher than the level of the conduction band of the second semiconductor layer 33b.
Emitter region structure.
First semiconductor layer 33a: undoped AlGaPSb, thickness 20 nm.
Second semiconductor layer 33b: Si-doped InP, thickness 200 nm.

  As shown in part (b) of FIG. 6, an external bias is applied to the light emitting diode to reduce the hetero barrier between the first semiconductor layer 33a and the second semiconductor layer 33b. In response to the lowering of the heterobarrier, high energy carriers C (electrons) are injected from the emitter region 17 into the superlattice structure of the light emitting region 15 through the heterobarrier by thermal carrier emission. The injected carriers are attracted by an electric field at a level in the conduction band corresponding to the energy of each carrier, and lose energy while drifting or diffusing in the light emitting region 15, and fall into various unit cells. Light is generated by optical transition from a high energy level (E3) to a low energy level (E2) while drifting to the collector region in the unit cell. Carriers of energy level (E2) quickly relax to a lower energy level (E1).

The supply of carriers from the emitter region to the upper surface of the light emitting region will be described with reference to FIG. Part (a) of FIG. 7 is a drawing schematically showing a band structure under no bias in the emitter region 17 and the light emitting region 15. Part (b) of FIG. 7 is a drawing schematically showing a band structure under an external bias in the forward direction in the emitter region 22 and the light emitting region 15. In FIG. 7, in order to show that the light emitting region 15 has a superlattice structure in the arrangement of the unit cells 15a, a repeated arrangement of well layers and barrier layers is drawn periodically. The level E4 in the unit cell 15a and the light emitting region 15 is shown in part (c) of FIG. In FIGS. 7A and 7B, “Ef1” indicates a Fermi level or a pseudo-Fermi level, and “Ec1” indicates a conduction band. The emitter region 22 includes a first semiconductor layer 32 a including a tunneling structure 32 in contact with the upper surface of the light emitting region 15.
Structure of the emitter region 18.
First semiconductor layer 32a: undoped AlGaPSb / GaInAs.
Second semiconductor layer 32b: Si-doped InP, thickness 200 nm.
The tunneling structure 32 has the following structure, for example.
AlGaPSb (thickness 5 nm) / GaInAs (thickness 2 nm) / AlGaPSb (thickness 5 nm).

  As shown in FIG. 7B, an external bias is applied to the light emitting diode to reduce the hetero barrier between the first semiconductor layer 32a and the second semiconductor layer 32b. When the level of the conduction band of the second semiconductor layer 32 b is in the vicinity of the discrete energy level (E4) in the light emitting region 15, the conduction band of the second semiconductor layer 32 b through the tunneling structure 32 leads to the superlattice structure of the light emitting region 15. Carriers C are injected into the energy level (E4) by tunneling T. The injected carrier loses energy while being drifted or diffused in the light emitting region 15 by being attracted by an electric field at a level (for example, level E4) in the conduction band according to the energy of the individual carrier, and various units. It falls into the cell. Light is generated by optical transition from a high energy level (E3) to a low energy level (E2) while drifting in the unit cell 15a to the collector region. Carriers of energy level (E2) quickly relax to a lower energy level (E1).

  The supply of carriers from the emitter region 17 to the side surface of the light emitting region 15 will be described. If necessary, in the first structure and the second structure, the first semiconductor region 23 of the emitter region 17 is in contact with the upper surface 15d of the light emitting region 15 (and also the first side surface 15b and the second side surface 15c). A first semiconductor layer 33a and a second semiconductor layer 33b provided on the first semiconductor layer 33a can be provided. As shown in FIG. 8, the first semiconductor layer 33a includes a semiconductor having a conduction band energy (E17) equal to or higher than the upper energy level E3 (high in the direction of the potential according to the carrier polarity). The second semiconductor layer 33 b includes a semiconductor having a refractive index smaller than the equivalent refractive index of the light emitting region 15. The conduction band energy level of the first semiconductor layer 33a enables carrier injection from the emitter region 17 to the upper energy level E3 of the light emitting region 15 without requiring a large externally applied voltage.

  The supply of carriers from the light emitting region 15 to the second semiconductor region 25 of the collector 19 will be described. If necessary, in the first structure, the second semiconductor region 25 of the collector 19 contacts the side surfaces of the light emitting region 15 (first side surface 15b, second side surface 15c, third side surface 15f, and fourth side surface 15g). And a fourth semiconductor layer 35b provided on the third semiconductor layer 35a. As shown in FIG. 9, the third semiconductor layer 35a includes a semiconductor having a conduction band energy (E19) equal to or lower than the lower energy level E2, preferably the relaxation energy level E1. The fourth semiconductor layer 35 b includes a semiconductor having a refractive index smaller than the equivalent refractive index of the light emitting region 15. The conduction band energy level of the third semiconductor layer 35a enables carrier extraction from the energy level of the light emitting region 15 to the collector 19 without requiring a large externally applied voltage.

  FIG. 10 is a view illustrating a quantum filter structure for a semiconductor light emitting device according to this embodiment. The collector 19 includes a quantum filter structure 29 provided on at least one of the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15, and the quantum filter structure 29 includes: A plurality of semiconductors can be provided. The quantum filter structure 29 of the collector 19 extends in the direction of the first axis Ax1 along at least one of the first side surface 15b, the second side surface 15c, the third side surface 15f, and the fourth side surface 15g of the light emitting region 15. At the same time, it contacts the side surface of the light emitting region 15 and is connected to the plurality of quantum well structures 21 in parallel. The quantum filter structure 29 of the collector 19 can selectively transmit carriers of lower energy levels. As shown in FIG. 10, the quantum filter structure 29 of the collector 19 has a transmittance at a low energy level (for example, E1) of the quantum well structure 21 at a high energy level (for example, E3) of the quantum well structure 21. It has a superlattice structure with a filter characteristic greater than the transmittance. Further, the quantum filter structure 29 has a filter characteristic in which the transmittance at the low energy level (for example, E1 and E2) of the quantum well structure 21 is larger than the transmittance at the high energy level (for example, E3) of the quantum well structure 21. Can be configured to provide. Further, the quantum filter structure 29 provides a filter characteristic in which the transmittance at the low energy level (eg, E2) of the quantum well structure 21 is greater than the transmittance at the high energy level (eg, E3) of the quantum well structure 21. Can be configured to. Parallel connections in the quantum well structure 21 make it possible to avoid cascaded optical transitions. Carriers in each quantum well structure 21 drift toward the collector 19 in the directions of the axes (second axis Ax2 and third axis Ax3) intersecting the direction of the first axis Ax1.

  Referring to FIG. 10, the superlattice structure of the quantum filter structure 29 includes a plurality of first semiconductor layers 29a including aluminum as a group III constituent element, and a plurality of second semiconductor layers including gallium as a group III constituent element. Semiconductor layer 29b. The first semiconductor layer 29a includes a ternary or quaternary (for example, ternary or higher) III-V compound semiconductor barrier, such as AlInAs, including aluminum as a group III constituent element, and the second semiconductor layer 29b includes a group III constituent. A ternary or quaternary (for example, ternary or higher) III-V compound semiconductor well containing gallium as an element, for example, GaInAs is included. The superlattice structure of the quantum filter structure 29 includes, for example, three wells and four barriers arranged alternately.

1 is a first example of a superlattice structure of a quantum filter structure 29.
AlInAs barrier layer: 2 nm, 4 layers.
GaInAs well layer: 4.25 nm, 3 layers.
The quantum filter transmission characteristics shown in FIG. 10 can easily pass carriers having energy corresponding to the relaxation energy level E1, (for example, 0.14 electron volts), and the upper energy level E3, (for example, 0) .45 electron volts) can be made difficult to pass through the carrier.

The 2nd example of the superlattice structure of the quantum filter structure 29. FIG.
In the AlInAs / GaInAs system, the number of wells and barrier layers may be small and / or the film thickness may be different from that of the first example. Specifically, the AlInAs / GaInAs system can include a semiconductor stack having three wells and barriers, or a semiconductor stack having five wells and barriers.

The 3rd example of the superlattice structure of the quantum filter structure 29. FIG.
The barrier layer comprises AlInAs. The well layer contains gallium as a group III constituent element. The well layer preferably has a composition such that the band gap of the well layer is substantially the same as that of GaInAs.
AlInAs / GaAsSb (barrier layer / well layer)
The barrier layer comprises AlInAs. The well layer contains gallium and indium as group III constituent elements.
AlInAs / InGaSb (barrier layer / well layer)
AlInAs / AlGaInAs (barrier layer / well layer)
The barrier layer comprises AlInAs. The well layer contains gallium as a group III constituent element and antimony as a group V constituent element.
AlInAs / GaAsSb (barrier layer / well layer)
AlInAs / InGaSb (barrier layer / well layer)
The barrier layer comprises AlInAs. The well layer contains gallium and indium as group III constituent elements and arsenic as group V constituent elements.
AlInAs / GaInAs (barrier layer / well layer)
AlInAs / AlGaInAs (barrier layer / well layer)

The 4th example of the superlattice structure of the quantum filter structure 29. FIG.
The well layer includes GaInAs. The barrier layer contains aluminum and gallium as group III constituent elements. The barrier layer preferably has a composition that makes the band gap of the barrier layer larger than that of AlInAs.
AlGaPSb / GaInAs (barrier layer / well layer)
AlGaAsSb / GaInAs (barrier layer / well layer)
The well layer includes GaInAs. The barrier layer contains aluminum and indium as group III constituent elements.
AlInPSb / GaInAs (barrier layer / well layer)
AlInAsSb / GaInAs (barrier layer / well layer)
The well layer includes GaInAs. The barrier layer contains aluminum as a group III constituent element and antimony as a group V constituent element.
AlGaPSb / GaInAs (barrier layer / well layer)
AlGaAsSb / GaInAs (barrier layer / well layer)
AlInPSb / GaInAs (barrier layer / well layer)
AlInAsSb / GaInAs (barrier layer / well layer)
The well layer includes GaInAs. The barrier layer contains aluminum as a group III constituent element and antimony and arsenic as a group V constituent element.
AlGaAsSb / GaInAs (barrier layer / well layer)
AlInAsSb / GaInAs (barrier layer / well layer)
The well layer includes GaInAs. The barrier layer contains aluminum as a group III constituent element and antimony and phosphorus as a group V constituent element.
AlGaPSb / GaInAs (barrier layer / well layer)
AlInPSb / GaInAs (barrier layer / well layer)
The well layer includes GaInAs. The barrier layer contains aluminum as a group III constituent element and antimony, arsenic and phosphorus as a group V constituent element.
AlPAsSb / GaInAs (barrier layer / well layer)

5 shows a fifth example of a superlattice structure of the quantum filter structure 29.
The superlattice structure includes a well layer made of any material in the first to fourth examples and a barrier layer made of any material in the first to fourth examples. In the first to fifth examples, the lattice constant between the well and the barrier in the combination of materials falls within a lattice constant difference that does not cause crystal defects due to lattice mismatch.

  FIG. 11 is a drawing schematically showing a light emitting diode according to the present embodiment. FIG. 12 is a diagram illustrating a quantum filter for a light emitting diode according to the present embodiment. As shown in FIG. 11, the light emitting diode 11 c can include a third electrode 31 d on the back surface 13 e of the substrate 13. In order to efficiently apply a voltage to the quantum filter structure 29, the third electrode 31 d For example, the back surface 13e can be provided on an area opposite to the second area 13c and has an opening 31e. The size of the opening 31e is larger than the size of the lower surface 15e. The collector 19 includes a quantum filter structure 29 that contacts the side surface of the light emitting region 15. As shown in part (a) of FIG. 12, the light emitting region 15 includes a plurality of basic structures 15aa, 15ab, and 15ac. The basic structures 15aa, 15ab, and 15ac include unit cells 15a that can provide a single optical transition. Similarly, they are arranged in the direction of the first axis Ax1. The basic structures 15aa, 15ab, and 15ac have quantum levels (subband structures) that are quantum mechanically independent of each other. Specifically, each basic structure 15aa has three levels (Ea1, Ea2, Ea3, where Ea1> Ea2> Ea3), and each basic structure 15ab has three levels (Eb1, Eb2, Eb3). , Where Eb1> Eb2> Eb3), and each basic structure 15ac has three levels (Ec1, Ec2, Ec3, where Ec1> Ec2> Ec3). The levels (Ea1, Ea2, Ea3, Eb1, Eb2, Eb3, Ec1, Ec2, Ec3) are different from each other. The basic structures 15aa, 15ab, 15ac can each provide an optical transition. Specifically, as shown in part (a) of FIG. 12, the basic structure 15aa has a subband gap DEa capable of optical transition, and the basic structure 15ab has a subband gap DEb capable of optical transition. The basic structure 15ac has a subband gap DEc capable of optical transition. The subband gaps DEa, DEb, and DEc are different from each other. The quantum filter structure 29 of the collector 19 is connected in parallel to the basic structures 15aa, 15ab, 15ac in the light emitting region 15. The transmission characteristics of the quantum filter structure 29 determine which of the basic structures 15aa, 15ab, 15ac should be activated. This determination depends on the potential difference between the second electrode 31b and the third electrode 31d. Specifically, as shown in (b), (c), and (d) of FIG. 12, the transmission characteristics of the quantum filter structure 29 are between the second electrode 31b and the third electrode 31d. It is changed according to the potential difference (potential differences Va, Vb, Vc with respect to the reference potential GND). The activated basic structure (any one of 15aa, 15ab and 15ac) can contribute to light emission. In the activated basic structure, lower level carriers are extracted through the quantum filter structure 29, and light emission by transition between subbands is promoted. In the basic structure that is not activated (the rest of 15aa, 15ab, and 15ac), lower level carriers are not extracted through the quantum filter structure 29, and light emission due to transition between subbands does not occur. A basic structure that is not activated cannot contribute to light emission. The basic structures 15aa, 15ab, and 15ac are activated in response to application of a voltage difference (eg, Va, Vb, Vc) between the second electrode 31b and the third electrode 31d. In the present embodiment, referring to part (b) of FIG. 12, the carrier from the level (Ea1) is extracted by applying the potential difference (Va). Referring to part (c) of FIG. 12, the carrier from the level (Eb1) is extracted by applying the potential difference (Vb). Referring to part (d) of FIG. 12, the carrier from the level (Ec1) is extracted by applying the potential difference (Vc). In this embodiment, the transmission characteristics of the quantum filter structure 29 are designed such that carriers from the level (Ea1) are extracted when the potential difference between the second electrode 31b and the third electrode 31d is zero.

  FIG. 13 is a drawing schematically showing a light emitting diode according to the present embodiment. As shown in part (a) of FIG. 13, the semiconductor light emitting device 11 (11 b) according to this embodiment can include a monolithic lens 41 on the back surface of the substrate 13. As shown in part (b) of FIG. 13, a microlens 43 can be mounted on the back surface of the substrate 13 of the semiconductor light emitting device 11 (11 b) according to the present embodiment. The semiconductor light emitting element 11 includes a semiconductor layer 45 provided between the monolithic lens 41 and the microlens 43 and the light emitting region 15, and the semiconductor layer 45 has a refractive index larger than the average refractive index of the light emitting region 15.

  An outline of a method for manufacturing the first structure will be described with reference to FIGS. 14 and 15. In step S101, as shown in FIG. 14A, an Fe-doped semi-insulating InP substrate 61 is prepared. Crystal growth can be performed, for example, by MBE or MOCVD. On the InP substrate 61, for example, a superlattice structure 63 for a light emitting region having a stack of unit cells having the above four-layer structure is grown. On the superlattice structure 63, a Si-doped AlInAs layer 65 and a Si-doped GaInAs layer 67 are grown for emitters and contacts. By this process, the semiconductor stack 69 is formed.

  In step S102, as shown in FIG. 14B, a first SiN mask 71 for the stripe and collector regions is formed on the main surface 69a of the semiconductor stack 69, and a semiconductor is formed using the first SiN mask 71. The stacked layer 69 is etched to form a stripe structure 73. The stripe structure 73 includes a superlattice structure 63a, a light emitting region 65a, a Si-doped AlInAs layer 65a, and a Si-doped GaInAs layer 67a.

  As shown in part (c) of FIG. 14, in step S <b> 103, selective growth for the collector region is performed without removing the first SiN mask 71. For the collector region, a Si-doped GaInAs layer 75a is grown, and a Si-doped InP layer 75b is grown on the Si-doped GaInAs layer 75a to form a collector region 75 that fills the stripe structure 73 flatly. The Si-doped GaInAs layer 75a is relatively thin and is preferably grown to a thickness of 10 to 50 nm, for example. In the formation of the second structure, the first SiN mask 71 is removed without performing selective growth, and a metal film for a metal electrode is deposited. In forming the quantum filter structure, prior to the growth of the Si-doped AlInAs layer 75a, a semiconductor thin film for the quantum filter structure is grown on the side surface of the stripe structure 73, specifically on the side surface of the superlattice structure 63a.

  As shown in FIG. 15A, in step S104, after removing the first SiN mask 71, a second SiN mask 77 for forming islands and isolation grooves is formed, and the second SiN mask 77 is used. Then, the stripe structure 73 is etched to form the first island 79a, the second island 79b, and the separation groove 79c. The first island 79a includes a Si-doped AlInAs layer 65b and a Si-doped GaInAs layer 67b. The second island 79b includes a Si-doped InP layer 75b on the Si-doped InGaAs layer 75a. The separation groove 79c reaches the light emitting region 15 and separates the first island 79a from the second island 79b.

  As shown in part (b) of FIG. 15, in step S105, after the second SiN mask 77 is removed, a passivation film 87 is formed on the first island 79a, the second island 79b, and the isolation trench 79c. The passivation film 87 covers the first island 79a, the second island 79b, and the separation groove 79c, and has a first opening 87a and a second opening 87b on the first island 79a and the second island 79b, respectively. A mask 89 can be used to form the first opening 87a and the second opening 87b. The mask 89 has a first opening 89a and a second opening 89b on the first island 79a and the second island 79b, respectively. The passivation film 87 is obtained by etching the insulating film for the passivation film 87 using the mask 89.

  As shown in part (c) of FIG. 15, in step S106, after forming the passivation film 87, the first electrode 91a and the second electrode 91b are formed on the first opening 89a and the second opening 89b, respectively. For example, the lift-off method and the plating method can be used to form the first electrode 91a and the second electrode 91b.

  As described above, according to the present embodiment, it is possible to provide a semiconductor light emitting device that can use an optical transition of a unipolar carrier. In addition, although the above description has been made while exemplifying a III-V compound semiconductor, a light-emitting region that can provide a subband structure that enables optical transition is not limited thereto.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

  As described above, according to the present embodiment, it is possible to provide a light emitting diode that generates incoherent light using optical transition of a unipolar carrier.

DESCRIPTION OF SYMBOLS 11 ... Semiconductor light emitting element, 11a, 11b ... Light emitting diode, 13 ... Board | substrate, 13b ... 1st area, 13c ... 2nd area, 15 ... Light emission area | region, 15a ... Unit cell, 15b ... 1st side surface, 15c ... 2nd side surface 15d ... upper surface, 15e ... lower surface, 15f ... third side surface, 15g ... fourth side surface, 17 ... emitter region, 19 ... collector, 21 ... quantum well structure, 23 ... first semiconductor region, 25 ... second semiconductor region, MS ... semiconductor mesa, 33 ... metal electrode.

Claims (6)

A light emitting diode,
A light emitting region comprising a plurality of quantum well structures arranged in the direction of the first axis, having a side surface, an upper surface and a lower surface;
An emitter region including a first conductivity type semiconductor provided on at least one of the side surface, the upper surface, and the lower surface of the light emitting region;
A collector connected to the side surface of the light emitting region;
With
The light emitting region and the collector are arranged along a reference plane intersecting the first axis,
The quantum well structure is a light emitting diode having a subband structure for a first conductivity type carrier.   The quantum well structure includes a first well layer, a second well layer, a first barrier layer, and a second barrier layer, and the first barrier layer separates the first well layer from the second well layer. The light emitting diode of claim 1, wherein the first well layer separates the first barrier layer from the second barrier layer.   The light emitting region includes a plurality of first unit cells arranged in the direction of the first axis, and the first unit cells include the first well layer, the second well layer, the first barrier layer, and The light emitting diode according to claim 2, further comprising a second barrier layer, wherein the first barrier layer has a thickness smaller than that of the second barrier layer.   The quantum well structure includes a barrier layer extending along a plane intersecting the direction of the first axis, and a dopant is added to a part or all of the barrier layer. 3. The light-emitting diode described in 3.   The said collector is a light emitting diode as described in any one of Claims 1-4 provided with the semiconductor which contacts the said side surface of the said light emission area | region.   The said collector is a light emitting diode as described in any one of Claims 1-4 provided with the metal electrode which contacts the said side surface of the said light emission area | region.

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