JP2018058121A - Lead-free solder alloy, electronic circuit board and electronic control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a lead-free solder alloy capable of inhibiting crack progress of a solder joint part even under such rough environments where a temperature difference is huge and vibration is loaded and also capable of restraining crack progress in the vicinity of interface of an electronic part and the solder joint part even when solder-joining using a non-plated electronic part, and to provide an electronic circuit board and an electronic control device.SOLUTION: There is provided a lead-free solder alloy comprising in wt.%: more than 2-3.1% Ag, 1% or less Cu, 3-5% Sb, 3.1-3.2% Bi, 0.01-0.25% Ni, 0.001-0.25% Co and the balance Sn. The crack completely crossing the solder joint part using the lead-free solder alloy does not generate even when applying 2,000 times of cold heat shock cycle to the solder joint part using a liquid tank type cold heat impact tester set to a condition of -40°C (for 5 min.) to 150°C (for 5 min.).SELECTED DRAWING: Figure 1

Description

  The present invention relates to a lead-free solder alloy, and an electronic circuit board and an electronic control device having a solder joint formed using the lead-free solder alloy.

Conventionally, when an electronic component is joined to an electronic circuit formed on a substrate such as a printed wiring board or a silicon wafer, a solder joining method using a solder alloy has been employed. It was common to use lead for this solder alloy. However, since the use of lead is restricted by the RoHS directive or the like from the viewpoint of environmental load, a solder joining method using a so-called lead-free solder alloy which does not contain lead is becoming common in recent years.
As this lead-free solder alloy, for example, Sn—Cu, Sn—Ag—Cu, Sn—Bi, and Sn—Zn solder alloys are well known. Among them, Sn-3Ag-0.5Cu solder alloy is often used in consumer electronic devices used for televisions, mobile phones, etc. and in-vehicle electronic devices mounted on automobiles.
Although the lead-free solder alloy is somewhat inferior in solderability as compared with the lead-containing solder alloy, the problem of solderability is covered by the improvement of the flux and the soldering apparatus. For this reason, for example, even in an in-vehicle electronic circuit board, a Sn-3Ag-0.5Cu solder alloy is used in an in-vehicle electronic circuit board that is placed in a relatively mild environment although there is a difference in temperature. There is no major problem with the solder joints formed.

However, in recent years, for example, electronic circuit boards used in electronic control devices, the temperature difference between the engine compartment, the engine directly mounted, and the electromechanical integration with the motor is particularly severe (for example, from −30 ° C. to 110 ° C., from −40 ° C. 125 ° C, -40 ° C to 150 ° C (temperature difference between heat and cold)), and in addition, the arrangement and implementation of electronic circuit boards have been studied in a harsh environment that is subject to vibration load. Under such an environment where the temperature difference is very severe, thermal displacement of the solder joint and stress associated therewith are likely to occur due to the difference in the coefficient of linear expansion between the mounted electronic component and the board. Repeated plastic deformation due to temperature difference tends to cause cracks in the solder joints, and stress applied repeatedly over time concentrates near the tip of the crack, so the cracks cross to the deep part of the solder joints. Easy to progress. The crack that has progressed remarkably in this way causes the disconnection of the electrical connection between the electronic component and the electronic circuit formed on the substrate. In particular, in an environment in which vibration is loaded on the electronic circuit board in addition to a severe temperature difference, the cracks and their progress are more likely to occur.
Therefore, a solder paste composition using a Sn—Ag—Cu based solder alloy capable of exhibiting a sufficient crack growth suppressing effect in an increasing number of on-vehicle electronic circuit boards and electronic control devices placed in the harsh environment described above. The demand for is expected to increase in the future.

In addition, the lead parts of electronic parts such as QFP (Quad Flat Package) and SOP (Small Outline Package) mounted on a vehicle-mounted electronic circuit board are conventionally Ni / Pd / Au plated parts or Ni / Au plated parts. Was heavily used. However, with the recent cost reduction of electronic components and downsizing of substrates, electronic components having lead portions replaced with Sn plating and electronic components having a Sn-plated bottom electrode have been studied and put into practical use.
At the time of soldering, the Sn-plated electronic component is likely to cause mutual diffusion between Sn contained in the Sn plating and solder joint and Cu contained in the lead portion and the lower electrode. Due to this interdiffusion, the Cu ₃ Sn layer, which is an intermetallic compound, is formed in a region near the interface between the solder joint and the lead portion or the lower electrode (hereinafter referred to as “near the interface” in this specification). Grows greatly in an uneven shape. The Cu ₃ Sn layer is originally hard and brittle, and the Cu ₃ Sn layer that has grown greatly in an uneven shape is further brittle. Therefore, particularly in the above-mentioned severe environment, cracks are likely to occur near the interface as compared with the solder joints, and the cracks that have occurred start at once, so that an electrical short circuit is likely to occur.
Therefore, in the future, even when using electronic parts that are not subjected to Ni / Pd / Au plating or Ni / Au plating under the harsh environment described above, lead-free that can exhibit the effect of suppressing crack growth near the interface The demand for solder alloys is also expected to increase.

  Until now, by adding elements such as Ag and Bi to the Sn—Ag—Cu based solder alloy, the strength of the solder joint and the accompanying thermal fatigue characteristics are improved, thereby suppressing the crack propagation of the solder joint. Several methods are disclosed (see Patent Document 1 to Patent Document 7).

Japanese Patent Laid-Open No. 5-228685 Japanese Patent Laid-Open No. 9-326554 Japanese Patent Laid-Open No. 2000-190090 JP 2000-349433 A JP 2008-28413 A International Publication Pamphlet WO2009 / 011341 JP 2012-81521 A

  When Bi is added to the solder alloy, Bi enters the lattice of the atomic arrangement of the solder alloy and substitutes Sn to distort the atomic arrangement of the lattice. As a result, the Sn matrix is strengthened and the alloy strength is improved, so that a certain improvement in the solder crack growth characteristics due to the addition of Bi is expected.

  However, a lead-free solder alloy that has been strengthened by the addition of Bi has the demerit that extensibility deteriorates and brittleness increases. When the applicant soldered the substrate and the chip resistor component using a conventional lead-free solder alloy to which Bi was added and placed it in an environment with a severe temperature difference, the chip in the fillet portion on the chip resistor component side The crack entered a straight line from the direction of about 45 ° with respect to the longitudinal direction of the resistance component, and an electrical short circuit occurred. Therefore, in particular, in automotive boards placed in an environment where there is a great difference in temperature, the effect of suppressing crack growth is not sufficient only by increasing the strength as in the past, and in addition to increasing the strength, a new crack growth suppressing method has emerged. desired.

In addition, when solder bonding is performed using an electronic component that is not plated with Ni / Pd / Au or Ni / Au, the Cu ₃ Sn layer, which is an intermetallic compound, grows greatly in an uneven shape near the interface. It is difficult to suppress crack growth near this interface.

  The present invention solves the above-described problems, and can suppress the crack progress of the solder joint even under a severe environment where the difference between the temperature and the temperature is intense and the vibration is applied, and Ni / Pd / Au plating or Ni / Lead-free solder alloy capable of suppressing crack growth in the vicinity of the interface even when soldered using electronic parts not plated with Au, and solder joint formed using the lead-free solder alloy An object of the present invention is to provide an electronic circuit board and an electronic control device having a section.

(1) In the lead-free solder alloy of the present invention, Ag is more than 2% by weight and 3.1% by weight or less, Cu is 1% by weight or less, Sb is 3% by weight or more and 5% by weight or less, and Bi is 3. Lead-free consisting of 1 wt% to 3.2 wt%, Ni from 0.01 wt% to 0.25 wt%, Co from 0.001 wt% to 0.25 wt%, the balance being Sn -40 to a solder joint formed by using the lead-free solder alloy, which is a solder alloy and joins a 3.2 × 1.6 mm chip component and a 2.0 × 1.2 mm chip component to a substrate, respectively. Even when a thermal shock cycle is applied 2,000 times using a liquid bath type thermal shock test apparatus set at a temperature of 150 ° C. (5 minutes) to 150 ° C. (5 minutes), the solder joint is completely traversed. The feature is that no cracks occur.

(2) In the configuration described in (1) above, the lead-free solder alloy of the present invention has Ag more than 2% by weight and 3.1% by weight, Cu is less than 1% by weight, and Sb is 3% by weight. % To 5% by weight, Bi from 3.1% to 3.2% by weight, Ni from 0.01% to 0.25% by weight, and Co from 0.001% to 0.02% by weight. The balance is 25% by weight or less, and the balance is Sn, and the contents (% by weight) of Ag, Cu, Sb, Bi, Ni and Co satisfy all of the following formulas (A) to (D). -40 ° C. (5 minutes) to 150 ° C. (5 ° C.) for a solder joint formed by using the lead-free solder alloy for joining a 1.6 mm chip component and a 2.0 × 1.2 mm chip component and a substrate, respectively. The thermal shock cycle using the liquid tank type thermal shock test equipment set to the condition of Even when it is applied 2,000 times, it is characterized in that a crack that completely crosses the solder joint does not occur.
1.6 ≦ Ag content + (Cu content / 0.5) ≦ 5.9 A
0.85 ≦ (Ag content / 3) + (Bi content / 4.5) ≦ 2.10 B
3.6 ≦ Ag content + Sb content ≦ 8.9… C
0 <(Ni content / 0.25) + (Co content / 0.25) ≦ 1.19... D

(3) In the constitution described in either (1) or (2) above, the Ni content is 0.01% by weight or more and 0.03% by weight or less.

(4) In the configuration described in any one of (1) to (3) above, the Co content is 0.001 wt% or more and 0.008 wt% or less.

(5) In the configuration described in any one of (1) to (4) above, further includes at least one of P, Ga, and Ge in a total of 0.001 wt% to 0.05 wt% It is characterized by that.

(6) In the configuration described in any one of (1) to (5) above, at least one of Fe, Mn, Cr, and Mo is further added in a total of 0.001 wt% or more and 0.05 wt% The following features are included.

(7) The electronic circuit board of the present invention is characterized by having a solder joint formed using the lead-free solder alloy described in any one of (1) to (6) above.

(8) The electronic control device of the present invention is characterized by having the electronic circuit board described in (7) above.

  The lead-free solder alloy of the present invention, and the electronic circuit board and electronic control device having a solder joint formed using the lead-free solder alloy have a severe environment in which a difference in temperature is intense and vibration is loaded. Can suppress crack growth at the solder joints even underneath, and suppresses crack growth near the interface even when soldering is performed using electronic parts that are not plated with Ni / Pd / Au or Ni / Au can do.

1 is a partial cross-sectional view illustrating a part of an electronic circuit board according to an embodiment of the present invention. The electron micrograph showing the cross section in which the void generate | occur | produced in the fillet part of a chip component in the test board | substrate which concerns on the comparative example of this invention. The photograph taken from the chip component side using the X-ray transmissive apparatus showing the area | region under the electrode of a chip component, and the area | region in which the fillet is formed in the test board which concerns on the Example and comparative example of this invention.

  Hereinafter, an embodiment of a lead-free solder alloy, an electronic circuit board, and an electronic control device of the present invention will be described in detail. Of course, the present invention is not limited to the following embodiments.

(1) Lead-free solder alloy The lead-free solder alloy of this embodiment can contain 1 wt% or more and 3.1 wt% or less of Ag. By adding Ag, the Ag ₃ Sn compound can be precipitated in the Sn grain boundary of the lead-free solder alloy, and mechanical strength can be imparted.
However, when the Ag content is less than 1% by weight, the Ag ₃ Sn compound is less precipitated, and the mechanical strength and thermal shock resistance of the lead-free solder alloy are lowered, which is not preferable. Moreover, even if Ag is added in an amount exceeding 3.1% by weight, the tensile strength is not significantly improved, and it does not lead to a dramatic improvement in thermal fatigue resistance. It is economically undesirable to increase the content of expensive Ag. Furthermore, when the Ag content exceeds 4% by weight, the stretchability of the lead-free solder alloy is hindered, and a solder joint formed using this may cause an electrode peeling phenomenon of an electronic component, which is not preferable.
Further, when the Ag content is 2% by weight or more and 3.1% by weight or less, the balance between strength and stretchability of the lead-free solder alloy can be improved. A more preferable Ag content is 2.5 wt% or more and 3.1 wt% or less.

The lead-free solder alloy of this embodiment can contain 1 wt% or less of Cu. By adding Cu in this range, the effect of preventing Cu erosion to Cu lands of electronic circuits is exhibited, and the thermal shock resistance of the lead-free solder alloy is improved by precipitating Cu ₆ Sn ₅ compounds in Sn grain boundaries. Can be improved. When the Cu content is 0.5 wt% to 1 wt%, a good Cu erosion prevention effect can be exhibited. In particular, when the Cu content is 0.7% by weight or less, the Cu erosion preventing effect on the Cu land can be exhibited, and the viscosity of the lead-free solder alloy at the time of melting can be kept in a good state. Generation | occurrence | production of the void at the time of reflow can be suppressed, and the thermal shock resistance of the solder joint part to form can be improved. Furthermore, fine Cu ₆ Sn ₅ is dispersed in the Sn grain boundary of the molten lead-free solder alloy, thereby suppressing changes in Sn crystal orientation and suppressing deformation of the solder joint shape (fillet shape). Can do.
If the Cu content exceeds 1% by weight, the Cu ₆ Sn ₅ compound is likely to be deposited near the interface between the electronic component and the electronic circuit board in the solder joint, thereby improving the joint reliability and the stretchability of the solder joint. Since there exists a possibility of inhibiting, it is not preferable.

  The lead-free solder alloy of this embodiment can contain 1 wt% or more and 5 wt% or less of Sb. By adding Sb within this range, it is possible to improve the crack growth suppressing effect of the solder joint without inhibiting the stretchability of the Sn—Ag—Cu solder alloy. In particular, when the Sb content is 2% by weight or more and 4% by weight or less, the crack growth suppressing effect can be further improved.

Here, in order to withstand the external stress of being exposed to a harsh environment for a long time in a severe temperature difference, the toughness of lead-free solder alloy (the size of the area surrounded by the stress-strain curve) is increased and stretched. It is considered effective to enhance the solid solution by adding an element which dissolves in the Sn matrix and dissolves in the Sn matrix. Then, Sb is an optimum element for solid solution strengthening of the lead-free solder alloy while ensuring sufficient toughness and stretchability.
That is, by adding Sb in the above range to a lead-free solder alloy having Sn as a base material (in this specification, the main constituent elements of a lead-free solder alloy; the same shall apply hereinafter), Sn A part of the crystal lattice is replaced with Sb, and distortion occurs in the crystal lattice. Therefore, in the solder joint formed using such a lead-free solder alloy, the energy necessary for transition in the crystal is increased by Sb substitution of a part of the Sn crystal lattice, and the metal structure is strengthened. . Furthermore, the fine SnSb and ε-Ag ₃ (Sn, Sb) compound precipitates on the Sn grain boundary, thereby preventing the deformation of cracks occurring in the solder joints by preventing the sliding deformation of the Sn grain boundary. obtain.

Compared to Sn-3Ag-0.5Cu solder alloy, the structure of the solder joint formed using the lead-free solder alloy with Sb added in the above range is exposed to harsh environments where the temperature difference is severe for a long time. After that, it was confirmed that the Sn crystal had a fine structure and the crack was difficult to progress. This is because the SnSb and ε-Ag ₃ (Sn, Sb) compounds precipitated at the Sn grain boundaries are finely dispersed in the solder joint even after being exposed to a harsh environment where the temperature difference is severe. Therefore, it is thought that the coarsening of the Sn crystal is suppressed. That is, in the solder joint portion using the lead-free solder alloy with Sb added within the above range, Sb solid solution in the Sn matrix is high temperature state, SnSb, ε-Ag ₃ (Sn, Sb) in the low temperature state. Since precipitation of compounds occurs, even when exposed to harsh environments where there is a great difference in temperature, the process of solid solution strengthening at high temperatures and precipitation strengthening at low temperatures is repeated, resulting in excellent cold resistance. It is thought that impact properties can be secured.

  Furthermore, the lead-free solder alloy to which Sb is added in the above range can improve the strength of the Sn-3Ag-0.5Cu solder alloy without lowering the stretchability, so that it has sufficient toughness against external stress. Can be secured, and the residual stress can be reduced. Here, when a solder joint formed using a solder alloy having low stretchability is placed in an environment where there is a great difference in temperature, the stress generated repeatedly is likely to accumulate on the electronic component side of the solder joint. Therefore, deep cracks often occur at solder joints near the electrodes of electronic components. As a result, a stress may be concentrated on the electrode of the electronic component near the crack, and a phenomenon may occur in which the solder joint peels off the electrode on the electronic component side. However, since the solder alloy of this embodiment contains Sb within the above range, even if an element that affects the extensibility of the solder alloy such as Bi is contained, the extensibility of the solder alloy is hardly hindered. Even when exposed to a harsh environment for a long time, the electrode peeling phenomenon of electronic components can be suppressed.

However, if the Sb content exceeds 5% by weight, the melting temperature of the lead-free solder alloy increases, and Sb does not re-dissolve at high temperatures. Therefore, when exposed to a harsh environment where the difference between the temperature and the temperature is severe, only precipitation strengthening by the SnSb, ε-Ag ₃ (Sn, Sb) compound is performed, so that these intermetallic compounds become coarse over time. And the effect of suppressing slip deformation at the Sn grain boundary is lost. Further, in this case, the heat resistance temperature of the electronic component becomes a problem due to an increase in the melting temperature of the lead-free solder alloy, which is not preferable.

The lead-free solder alloy of this embodiment can contain 0.5 wt% or more and 4.5 wt% or less of Bi. If it is the structure of the lead-free solder alloy of this embodiment, by adding Bi within this range, the strength of the lead-free solder alloy will be improved without affecting the stretchability of the lead-free solder alloy and increased by the addition of Sb. The melting temperature can be lowered. That is, since Bi also dissolves into the Sn matrix in the same manner as Sb, the lead-free solder alloy can be further strengthened. However, if the Bi content exceeds 4.5% by weight, the extensibility of the lead-free solder alloy is lowered and the brittleness is increased. Therefore, when the Bi is exposed to a harsh environment where the temperature difference is severe, It is not preferable because a deep crack is likely to occur in a solder joint formed by a free solder alloy.
If the Bi content is 2 wt% or more and 4.5 wt% or less, the strength of the solder joint portion can be further improved. Moreover, when using together with Ni and / or Co mentioned later, preferable content of Bi is 3.1 weight% or more and 4.5 weight% or less.

The lead-free solder alloy of this embodiment can contain 0.01 wt% or more and 0.25 wt% or less of Ni. If it is the structure of the lead-free solder alloy of this embodiment, by adding Ni in this range, fine (Cu, Ni) ₆ Sn ₅ is formed in the molten lead-free solder alloy, and in the base material Since it disperse | distributes, the progress of the crack in a solder joint part can be suppressed, and also the heat-resistant fatigue characteristic can be improved.
In addition, the lead-free solder alloy of the present embodiment allows Ni to move to the vicinity of the interface at the time of soldering even when soldering an electronic component that is not subjected to Ni / Pd / Au plating or Ni / Au plating. Since the fine (Cu, Ni) ₆ Sn ₅ is formed, the growth of the Cu ₃ Sn layer in the vicinity of the interface can be suppressed, and the crack growth suppressing effect in the vicinity of the interface can be improved.

However, if the content of Ni is less than 0.01% by weight, the effect of modifying the intermetallic compound becomes insufficient, so that the crack suppressing effect near the interface is not sufficiently obtained. On the other hand, if the Ni content exceeds 0.25% by weight, it becomes difficult for supercooling to occur as compared with the conventional Sn-3Ag-0.5Cu alloy, and the timing at which the solder alloy solidifies becomes earlier. Therefore, in the fillet of the solder joint portion to be formed, the gas that tried to escape to the outside during melting of the solder alloy is solidified while remaining in it, and a hole (void) due to the gas is generated in the fillet. The case that ends up is confirmed. The voids in the fillet deteriorate the heat-resistant fatigue characteristics of the solder joint particularly in an environment where the temperature difference is severe, such as -40 ° C to 140 ° C and -40 ° C to 150 ° C.
As described above, Ni is likely to generate voids in the fillet. However, in the configuration of the lead-free solder alloy of this embodiment, Ni is reduced to a value of 0.1 from the balance of the content of Ni and other elements. Even when the content is 25% by weight or less, the generation of the voids can be suppressed.

  Further, when the Ni content is 0.01% by weight or more and 0.15% by weight or less, it is possible to improve the suppression of void generation while improving the crack growth suppressing effect and heat fatigue resistance near the interface.

The lead-free solder alloy of this embodiment can contain 0.001 wt% or more and 0.25 wt% or less of Co in addition to Ni. If it is the structure of the lead-free solder alloy of this embodiment, by adding Co in this range, the above-mentioned effect by addition of Ni is enhanced and fine (Cu, Co) ₆ Sn _{5 is} contained in the molten lead-free solder alloy. Is formed and dispersed in the base metal, it is possible to improve the thermal fatigue resistance of the solder joints, especially in environments with severe temperature differences, while suppressing creep deformation and crack growth in the solder joints. it can. In addition, the lead-free solder alloy of the present embodiment enhances the above-described effect due to the addition of Ni even when soldering an electronic component that is not subjected to Ni / Pd / Au plating or Ni / Au plating. Since it moves to the vicinity of the interface during solder bonding to form fine (Cu, Co) ₆ Sn ₅ , it is possible to suppress the growth of the Cu ₃ Sn layer in the vicinity of the interface and to suppress the crack propagation in the vicinity of the interface. Can be improved.

However, when the Co content is less than 0.001% by weight, the modification effect of the intermetallic compound becomes insufficient, and therefore, the crack suppression effect near the interface is hardly obtained. On the other hand, if the Co content exceeds 0.25% by weight, it is difficult for supercooling to occur as compared with the conventional Sn-3Ag-0.5Cu alloy, and the timing at which the solder alloy solidifies becomes earlier. Therefore, in the fillet of the solder joint portion to be formed, there is a case in which the gas that tried to escape outside during melting of the solder alloy is solidified while remaining in it, and a void due to the gas is generated in the fillet. It is confirmed. The voids in the fillet deteriorate the thermal fatigue characteristics of the solder joint, particularly in an environment where the temperature difference is severe.
As described above, Co easily generates voids in the fillet. However, in the configuration of the lead-free solder alloy of this embodiment, Co is reduced to 0. 0 from the balance of the contents of Co and other elements. Even when the content is 25% by weight or less, the generation of the voids can be suppressed.

  Further, when the Co content is 0.001% by weight or more and 0.15% by weight or less, it is possible to improve the suppression of void generation while improving the good crack growth suppressing effect and heat fatigue resistance.

Here, when Ni and Co are used together in the lead-free solder alloy of the present embodiment, the contents (% by weight) of Ag, Cu, Sb, Bi, Ni, and Co are expressed by the following formulas (A) to (D). It is preferable to satisfy all of the above.
1.6 ≦ Ag content + (Cu content / 0.5) ≦ 5.9 A
0.85 ≦ (Ag content / 3) + (Bi content / 4.5) ≦ 2.10 B
3.6 ≦ Ag content + Sb content ≦ 8.9… C
0 <(Ni content / 0.25) + (Co content / 0.25) ≦ 1.19... D
By making the contents of Ag, Cu, Sb, Bi, Ni and Co within the above ranges, the stretchability of the solder joints is inhibited and the increase in brittleness, the strength and thermal fatigue characteristics of the solder joints are improved, and the fillet In the vicinity of the interface at the time of solder jointing of electronic parts not subjected to Ni / Pd / Au plating or Ni / Au plating Thus, it is possible to exert a well-balanced effect of suppressing the crack propagation, and to further improve the reliability of the solder joint.

The lead-free solder alloy of this embodiment can contain 6% by weight or less of In. By adding In within this range, it is possible to lower the melting temperature of the lead-free solder alloy that has been raised by the addition of Sb and to improve the crack growth suppressing effect. That is, since In dissolves in the Sn matrix as well as Sb, not only can the lead-free solder alloy be further strengthened, but AgSnIn and InSb compounds are formed and precipitated at the Sn grain boundaries. It has the effect of suppressing slip deformation at grain boundaries.
When the content of In added to the solder alloy of the present invention exceeds 6% by weight, the stretchability of the lead-free solder alloy is hindered, and while being exposed to a harsh environment where the temperature difference is severe for a long time. Since γ-InSn ₄ is formed and the lead-free solder alloy is self-deformed, it is not preferable.
The more preferable content of In is 4% by weight or less, and 1% by weight to 2% by weight is particularly preferable.

  Moreover, the lead-free solder alloy of this embodiment can contain 0.001 wt% or more and 0.05 wt% or less of at least one of P, Ga, and Ge. By adding at least one of P, Ga, and Ge within this range, oxidation of the lead-free solder alloy can be prevented. However, if these contents exceed 0.05% by weight, the melting temperature of the lead-free solder alloy rises, or voids are likely to be generated in the soldered joint, which is not preferable.

Furthermore, the lead-free solder alloy of this embodiment can contain 0.001 wt% or more and 0.05 wt% or less of at least one of Fe, Mn, Cr, and Mo. By adding at least one of Fe, Mn, Cr, and Mo within this range, the effect of suppressing crack growth of the lead-free solder alloy can be improved. However, if these contents exceed 0.05% by weight, the melting temperature of the lead-free solder alloy rises, or voids are likely to be generated in the soldered joint, which is not preferable.

  In addition, the lead-free solder alloy of this embodiment contains other components (elements) such as Cd, Tl, Se, Au, Ti, Si, Al, Mg, Zn, and the like as long as the effect is not hindered. be able to. In addition, the lead-free solder alloy of this embodiment naturally includes unavoidable impurities.

  Moreover, it is preferable that the remainder of the lead-free solder alloy of this embodiment is made of Sn. In addition, preferable Sn content is 79.8 weight% or more and less than 97.49 weight%.

  Any method can be used for forming the solder joints of the present embodiment as long as the solder joints can be formed, such as a flow method, mounting with solder balls, and a reflow method using a solder paste composition. good. Of these, a reflow method using a solder paste composition is particularly preferred.

(2) Solder paste composition Such a solder paste composition is produced, for example, by kneading the powdered lead-free solder alloy and a flux into a paste.

  As such a flux, for example, a flux containing a resin, a thixotropic agent, an activator, and a solvent is used.

Examples of the resin include rosin resins including rosin derivatives such as tall oil rosin, gum rosin, wood rosin and the like and hydrogenated rosin, polymerized rosin, heterogeneous rosin, acrylic acid modified rosin, maleic acid modified rosin; acrylic acid , Methacrylic acid, various esters of acrylic acid, various esters of methacrylic acid, crotonic acid, itaconic acid, maleic acid, maleic anhydride, maleic anhydride ester, maleic anhydride ester, acrylonitrile, methacrylonitrile, acrylamide, methacrylamide An acrylic resin obtained by polymerizing at least one monomer such as vinyl chloride or vinyl acetate; an epoxy resin; a phenol resin, or the like. These can be used alone or in combination.
Of these, rosin resins, particularly hydrogenated acid-modified rosin obtained by hydrogenating acid-modified rosin, are preferably used. A combined use of a hydrogenated acid-modified rosin and an acrylic resin is also preferred.

  The acid value of the resin is preferably 10 mgKOH / g or more and 250 mgKOH / g or less, and the blending amount thereof is preferably 10% by weight or more and 90% by weight or less with respect to the total amount of the flux.

  Examples of the thixotropic agent include hydrogenated castor oil, fatty acid amides, and oxy fatty acids. These can be used alone or in combination. The amount of the thixotropic agent is preferably 3% by weight or more and 15% by weight or less based on the total amount of the flux.

  Examples of the activator include amine salts (inorganic acid salts and organic acid salts) such as organic amine hydrogen halide salts, organic acids, organic acid salts, and organic amine salts. More specifically, diphenylguanidine hydrobromide, cyclohexylamine hydrobromide, diethylamine salt, acid salt, succinic acid, adipic acid, sebacic acid and the like can be mentioned. These can be used alone or in combination. The blending amount of the activator is preferably 5% by weight to 15% by weight with respect to the total amount of the flux.

As said solvent, isopropyl alcohol, ethanol, acetone, toluene, xylene, ethyl acetate, ethyl cellosolve, butyl cellosolve, glycol ether etc. can be used, for example. These can be used alone or in combination.
The amount of the solvent is preferably 20% by weight or more and 40% by weight or less based on the total amount of the flux.

In the flux, an antioxidant can be blended for the purpose of suppressing oxidation of the lead-free solder alloy. Examples of the antioxidant include hindered phenolic antioxidants, phenolic antioxidants, bisphenolic antioxidants, and polymer-type antioxidants. Of these, hindered phenol-based oxidizing agents are particularly preferably used. These can be used alone or in combination. The blending amount of the antioxidant is not particularly limited, but generally it is preferably about 0.5 wt% or more and about 5 wt% or less with respect to the total flux.

You may add other resin and additives, such as a halogen, a delustering agent, an antifoamer, and an inorganic filler, to the said flux.
The blending amount of the additive is preferably 10% by weight or less based on the total amount of the flux. Moreover, these more preferable compounding quantities are 5 weight% or less with respect to the flux whole quantity.

  The blending ratio of the lead-free solder alloy and the flux is preferably 65:35 to 95: 5 in the ratio of solder alloy: flux. A more preferred blending ratio is 85:15 to 93: 7, and a particularly preferred blending ratio is 87:13 to 92: 8.

(3) Electronic circuit board The structure of the electronic circuit board of this embodiment is demonstrated using FIG. The electronic circuit board 100 of this embodiment includes a substrate 1, an insulating layer 2, an electrode part 3, an electronic component 4, and a solder joint body 10. The solder joint body 10 has a solder joint portion 6 and a flux residue 7, and the electronic component 4 has an external electrode 5 and an end portion 8.
The substrate 1 can be used as the substrate 1 as long as it is used for mounting and mounting electronic components such as a printed wiring board, a silicon wafer, and a ceramic package substrate.
The electrode portion 3 is electrically joined to the external electrode 5 of the electronic component 4 via the solder joint portion 6.
Moreover, the solder joint part 6 is formed using the solder alloy which concerns on this embodiment.

  Since the electronic circuit board 100 according to the present embodiment having such a configuration has an alloy composition in which the solder joint portion 6 exhibits an effect of suppressing crack propagation, the crack is generated even when the solder joint portion 6 is cracked. Can suppress the progress of In particular, even when the electronic component 4 is not subjected to Ni / Pd / Au plating or Ni / Au plating, the effect of suppressing crack propagation near the interface between the solder joint 6 and the electronic component 4 can also be exhibited. . Thereby, the electrode peeling phenomenon of the electronic component 4 can also be suppressed.

Such an electronic circuit board 100 is manufactured as follows, for example.
First, the solder paste composition is printed according to the above pattern on a substrate 1 provided with an insulating layer 2 and an electrode portion 3 formed to have a predetermined pattern.
Next, the electronic component 4 is mounted on the printed board 1 and reflowed at a temperature of 230 ° C. to 260 ° C. By this reflow, the solder joint 10 having the solder joint 6 and the flux residue 7 is formed on the substrate 1, and the electronic circuit board 100 in which the substrate 1 and the electronic component 4 are electrically joined is manufactured.

  In addition, by incorporating such an electronic circuit board 100, the electronic control device of this embodiment is manufactured.

  Hereinafter, the present invention will be described in detail with reference to Examples and Comparative Examples. The present invention is not limited to these examples.

Production of Flux The following components were kneaded to obtain fluxes according to Examples and Comparative Examples.
Hydrogenated acid-modified rosin (product name: KE-604, manufactured by Arakawa Chemical Industries, Ltd.) 51% by weight
Hardened castor oil 6% by weight
10% by weight of dodecanedioic acid (product name: SL-12, manufactured by Okamura Oil Co., Ltd.)
Malonic acid 1% by weight
Diphenylguanidine hydrobromide 2% by weight
Hindered phenolic antioxidant (Product name: Irganox 245, manufactured by BASF Japan Ltd.) 1% by weight
Diethylene glycol monohexyl ether 29% by weight

Preparation of Solder Paste Composition 11.0% by weight of the flux was mixed with 89.0% by weight of each lead-free solder alloy powder (powder particle size 20 μm to 38 μm) listed in Tables 1 and 2. The solder paste compositions according to 22, 25 to 31, Reference Examples 1 to 21, 23, 24 and Comparative Examples 1 to 19 were prepared.

(1) Solder crack test (-40 ° C to 125 ° C)
・ 3.2mm × 1.6mm chip parts (chip A)
A chip component (Ni / Sn plating) having a size of 3.2 mm × 1.6 mm, a solder resist having a pattern capable of mounting the chip component of the size, and an electrode (1.6 mm × 1.2 mm) connecting the chip component And a 150 μm-thick metal mask having the same pattern were prepared.
Each solder paste composition was printed on the glass epoxy substrate using the metal mask, and the chip component was mounted on each of the solder paste compositions.
Thereafter, using a reflow furnace (product name: TNP-538EM, manufactured by Tamura Seisakusho Co., Ltd.), each of the glass epoxy substrates is heated to electrically bond the glass epoxy substrate and the chip component to each other. A part was formed, and the chip component was mounted. The reflow conditions at this time are: preheating from 170 ° C. to 190 ° C. for 110 seconds, peak temperature of 245 ° C., time of 200 ° C. or higher for 65 seconds, time of 220 ° C. or higher for 45 seconds, peak temperature to 200 ° C. The cooling rate was 3 ° C. to 8 ° C./second, and the oxygen concentration was set to 1500 ± 500 ppm.
Next, using a thermal shock test apparatus (product name: ES-76LMS, manufactured by Hitachi Appliances Co., Ltd.) set to -40 ° C. (30 minutes) to 125 ° C. (30 minutes), the thermal shock cycle is 1, Each glass epoxy substrate was exposed to each other in an environment where 000, 1,500, 2,000, 2,500, and 3,000 cycles were repeated, and then taken out to prepare each test substrate.
Subsequently, the target part of each test board | substrate was cut out, and this was sealed using the epoxy resin (Product name: Epomount (main agent and hardening | curing agent), the refine tech Co., Ltd. product). Further, a solder joint formed by using a wet polishing machine (product name: TegraPol-25, manufactured by Marumoto Struers Co., Ltd.) so that the center cross section of the chip component mounted on each test substrate can be seen. Was observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corporation) to determine whether or not the cracks generated in the sample completely crossed the solder joint and led to the fracture. And evaluated. The results are shown in Table 3 and Table 4. The number of evaluation chips in each thermal shock cycle was 10.
A: No crack that completely traverses the solder joint until 3,000 cycles. O: A crack that completely traverses the solder joint occurs between 2,501 and 3,000 cycles. Δ: 2,001 to 2 , Cracks that completely traverse the solder joints occur during 500 cycles ×: cracks that completely traverse the solder joints occur in less than 2,000 cycles

・ 2.0 × 1.2mm chip parts (chip B)
A chip part (Ni / Sn plating) having a size of 2.0 × 1.2 mm, a solder resist having a pattern capable of mounting the chip part of the size, and an electrode for connecting the chip part (1.25 mm × 1.0 mm) A test substrate was prepared under the same conditions as those of a 3.2 mm × 1.6 mm chip component except that a glass epoxy substrate provided with the above was used, and evaluated by the same method. The results are shown in Table 3 and Table 4.

(2) Solder crack test in Sn-plated SON 1.3 mm pitch SON (Small Outline Non-leaded package) parts with 6 mm x 5 mm x 0.8 tmm size (8 pins, product name: STL60N3LLH5, manufactured by STM Microelectronics) A glass epoxy substrate provided with a solder resist having a pattern on which the SON component can be mounted and an electrode (according to the manufacturer's recommended design) for connecting the SON component, and a 150 μm thick metal mask having the same pattern were prepared.
Each solder paste composition was printed on the glass epoxy substrate using the metal mask, and the SON component was mounted on each of the solder paste compositions. Thereafter, the glass epoxy board was subjected to a thermal shock under the same conditions as in the solder crack test (1) except that each glass epoxy board was placed in an environment where the thermal shock cycle was repeated 1,000, 2,000, and 3,000 cycles. Each test substrate was prepared.
Subsequently, the target part of each test board | substrate was cut out, and this was sealed using the epoxy resin (Product name: Epomount (main agent and hardening | curing agent), the refine tech Co., Ltd. product). Furthermore, using a wet polishing machine (product name: TegraPol-25, manufactured by Marumoto Struers Co., Ltd.), the cracks occurred in the solder joints so that the center cross section of the SON component mounted on each test board can be seen. Was observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corporation) as to whether or not the solder joint part completely crossed and reached the fracture. Based on this observation, with respect to the solder joint portion, the solder base material (in this specification, the solder base material refers to the portion other than the interface of the electrode of the SON component and the vicinity thereof in the solder joint portion. In Table 4, it is simply described as “base metal”.) Evaluation was performed as follows by dividing into cracks occurring at the interface between the solder joint and the electrode of the SON component (intermetallic compound). . The results are shown in Table 3 and Table 4. Note that the number of SONs evaluated in each thermal shock cycle was 20, and one terminal of the gate electrode was observed per SON, and the cross section of a total of 20 terminals was confirmed.

-Cracks that occurred in the solder base material ◎: No cracks that completely traverse the solder base material until 3,000 cycles ○: Cracks that completely traverse the solder base material between 2,001 and 3,000 cycles Occurrence Δ: A crack that completely traverses the solder base material occurs between 1,001 and 2,000 cycles. ×: A crack that completely traverses the solder base material occurs in less than 1,000 cycles.

・ A crack that occurred at the interface between the solder joint and the electrode of the SON part ◎: No crack that completely traverses the interface until 3,000 cycles ○: The interface was completely completed between 2,001 to 3,000 cycles Δ: A crack that completely crosses the interface between 1,001 and 2,000 cycles is generated. ×: A crack that completely crosses the interface is generated in less than 1,000 cycles.

(3) Solder crack test (-40 ° C to 150 ° C)
Since in-vehicle boards and the like are placed in a severe environment where the temperature difference is extremely severe, it is required that the solder alloy used therein exhibits a good crack growth suppressing effect even in such an environment. Therefore, in order to clarify whether or not the solder alloy according to the present embodiment can exhibit the effect even under such severe conditions, it is −40 ° C. to 150 ° C. using a liquid tank type thermal shock test apparatus. The solder crack test in the temperature difference of was conducted. The conditions are as follows.
First, a liquid bath type thermal shock test apparatus (product name: ETAC WINTECH LT80, Enomoto Co., Ltd.) in which each glass epoxy board after solder joint formation was set to conditions of -40 ° C. (5 minutes) to 150 ° C. (5 minutes). 3.2 × 1.6 mm chip component under the same conditions as in the solder crack test (1) except that the thermal shock cycle is exposed to an environment where 1,000, 2,000, and 3,000 cycles are repeated. Each test substrate mounted and mounted with 2.0 × 1.2 mm chip components was prepared.
Subsequently, the target part of each test board | substrate was cut out, and this was sealed using the epoxy resin (Product name: Epomount (main agent and hardening | curing agent), the refine tech Co., Ltd. product). Further, a solder joint formed by using a wet polishing machine (product name: TegraPol-25, manufactured by Marumoto Struers Co., Ltd.) so that the center cross section of the chip component mounted on each test substrate can be seen. Was observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corporation) to determine whether or not the cracks generated in the sample completely crossed the solder joint and led to the fracture. And evaluated. The results are shown in Table 3 and Table 4. The number of evaluation chips in each thermal shock cycle was 10.
A: No crack that completely crosses the solder joint until 3,000 cycles ○: A crack that completely crosses the solder joint occurs between 2,001 to 3,000 cycles Δ: 1,001 to 2 Cracks that completely traverse the solder joints occur during 1,000 cycles ×: Cracks that completely traverse the solder joints occur in less than 1,000 cycles

(4) Void test Under the same conditions as the solder crack test (1), each test substrate mounted with a 3.2 × 1.6 mm chip component and a 2.0 × 1.2 mm chip component was prepared.
Next, the surface state of each test substrate was observed with an X-ray transmission device (product name: SMX-160E, manufactured by Shimadzu Corporation), and the area under the electrode of the chip component (see FIG. 3 is the void area ratio (ratio of the total area of voids; the same applies hereinafter) and the area where fillets are formed (area (b) surrounded by broken lines in FIG. 3). The average value of the area ratio of voids in each was obtained and evaluated for each as follows. The results are shown in Table 3 and Table 4.
A: The average value of the void area ratio is 3% or less and the effect of suppressing the generation of voids is very good. ○: The average value of the void area ratio is more than 3% and 5% or less, and the effect of suppressing the generation of voids. △: The average value of the void area ratio is more than 5% and 8% or less, and the effect of suppressing the generation of voids is sufficient. ×: The average value of the void area ratio exceeds 8%, and the effect of suppressing the generation of voids insufficient

As described above, the solder joint formed by using the lead-free solder alloy according to the embodiment can be used regardless of the size of the chip even in a harsh environment where the difference in temperature is intense and vibration is applied. In addition, regardless of whether the electrode is Ni / Pd / Au plated or Ni / Au plated, it is possible to exert a crack growth suppressing effect in the vicinity of the solder joint and the interface. In particular, it can be seen that the solder joints of the examples have a good crack suppression effect even in a very severe environment where the difference in temperature is -40 ° C. to 150 ° C. using a liquid tank type thermal shock test apparatus.
In particular, in Examples 18 to 31 in which Ni and Co are used in combination, a good solder joint and crack growth suppressing effect near the interface can be exhibited under any conditions.
Moreover, even if it is a case where 0.25 weight% of Ni and Co are contained like Example 19 and Example 22, generation | occurrence | production of the void in a fillet can be suppressed, for example.
Therefore, an electronic circuit board having such a solder joint can be suitably used for an electronic circuit board that has a severe temperature difference and requires high reliability, such as an in-vehicle electronic circuit board.
Furthermore, such an electronic circuit board can be suitably used for an electronic control device that requires higher reliability.

DESCRIPTION OF SYMBOLS 1 Board | substrate 2 Insulating layer 3 Electrode part 4 Electronic component 5 External electrode 6 Solder joint part 7 Flux residue 8 End part 10 Solder joint body 100 Electronic circuit board

Claims (8)

Ag is more than 2% by weight and 3.1% by weight or less, Cu is 1% by weight or less, Sb is 3% by weight or more and 5% by weight or less, Bi is 3.1% by weight or more and 3.2% by weight or less, A lead-free solder alloy comprising 0.01 wt% or more and 0.25 wt% or less of Ni, and 0.001 wt% or more and 0.25 wt% or less of Co, the balance being Sn,
From −40 ° C. (5 minutes) to a solder joint formed using the lead-free solder alloy for joining a 3.2 × 1.6 mm chip component and a 2.0 × 1.2 mm chip component and a substrate, respectively. Even when the thermal shock cycle is applied 2,000 times using a liquid bath type thermal shock test apparatus set at 150 ° C. (5 minutes), cracks that completely traverse the solder joint are not generated. Lead-free solder alloy characterized by Ag is more than 2% by weight and 3.1% by weight or less, Cu is 1% by weight or less, Sb is 3% by weight or more and 5% by weight or less, Bi is 3.1% by weight or more and 3.2% by weight or less, Ni is 0.01 wt% or more and 0.25 wt% or less, Co is 0.001 wt% or more and 0.25 wt% or less, and the balance is Sn, and each of Ag, Cu, Sb, Bi, Ni and Co The content (% by weight) of the following satisfies all of the following formulas (A) to (D),
From −40 ° C. (5 minutes) to 150 for solder joints formed using the lead-free solder alloy that joins the 3.2 × 1.6 mm chip component and the 2.0 × 1.2 mm chip component and the substrate, respectively. Even when the thermal shock cycle is applied 2,000 times using a liquid bath type thermal shock test apparatus set to the condition of ℃ (5 minutes), the crack that completely crosses the solder joint is not generated. The lead-free solder alloy according to claim 1.
1.6 ≦ Ag content + (Cu content / 0.5) ≦ 5.9 A
0.85 ≦ (Ag content / 3) + (Bi content / 4.5) ≦ 2.10 B
3.6 ≦ Ag content + Sb content ≦ 8.9… C
0 <(Ni content / 0.25) + (Co content / 0.25) ≦ 1.19... D   The lead-free solder alloy according to claim 1 or 2, wherein the Ni content is 0.01% by weight or more and 0.03% by weight or less.   The lead-free solder alloy according to any one of claims 1 to 3, wherein the Co content is 0.001 wt% or more and 0.008 wt% or less.   The lead-free solder according to any one of claims 1 to 4, further comprising at least one of P, Ga, and Ge in a total amount of 0.001 wt% or more and 0.05 wt% or less. alloy.   The lead according to any one of claims 1 to 5, further comprising at least one of Fe, Mn, Cr, and Mo in a total amount of 0.001 wt% to 0.05 wt%. Free solder alloy.   An electronic circuit board comprising a solder joint formed by using the lead-free solder alloy according to claim 1. An electronic control device comprising the electronic circuit board according to claim 7.