JP2018025769A - 半導体装置、表示システム及び電子機器 - Google Patents
半導体装置、表示システム及び電子機器 Download PDFInfo
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- JP2018025769A JP2018025769A JP2017139698A JP2017139698A JP2018025769A JP 2018025769 A JP2018025769 A JP 2018025769A JP 2017139698 A JP2017139698 A JP 2017139698A JP 2017139698 A JP2017139698 A JP 2017139698A JP 2018025769 A JP2018025769 A JP 2018025769A
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/8258—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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Abstract
Description
本実施の形態では、本発明の一態様に係る表示システムについて説明する。
図1に、プロセッサ11、制御部12、表示部13を有する表示システム10の構成例を示す。表示システム10は、所定の映像を表示するための信号(以下、映像信号ともいう)を生成し、当該映像信号に基づいて映像を表示する機能を有するシステムである。
次に、補正回路22の具体的な構成例について説明する。図4に、補正回路22の構成例を示す。
次に、PLD100を用いて異なるガンマ補正を行う場合の動作例を、図5を用いて説明する。なお、図5にはスイッチ回路170としてトランジスタ171を用いた例を示している。また、ここでは、2つのコンテキスト(context[0]、[1])を用いてテーブル近似と折れ線近似を行う場合の動作例について説明する。
図5(A)に、context[0]を用いてテーブル近似を行う際のPLD100の動作例を示す。このときPLD100には、context[0]を指定する信号Sconが入力される。また、データDconとして、context[0]をテーブル近似を行う回路に再構成するためのコンフィギュレーションデータ(Dtab)が入力される。
図5(B)に、context[1]を用いて折れ線近似を行う際のPLD100の動作例を示す。このときPLD100には、context[1]を指定する信号Sconが入力される。また、データDconとして、context[1]を折れ線近似を行う回路に再構成するためのコンフィギュレーションデータ(Dlin)が入力される。
図5に示すアレイ120は、一部の領域ごとに再構成を行うこともできる。例えば、図5(B)に示すブロック123乃至125をそれぞれ異なる領域に配置し、ブロックごとに再構成を行うことができる。この場合、図6(A)に示すように、ブロック125がデータDoutの算出及び出力を行っている期間に、ブロック124に新たなa、bの値を入力して、近似直線の更新を行うことができる。これにより、PLD100の動的再構成を行うことができる。
次に、表示システムの変形例について説明する。ここでは、表示部が複数の画素群50を有する構成について説明する。
本実施の形態では、上記実施の形態で説明した半導体装置に用いることができるPLD及び記憶装置の構成例について説明する。
図9に、PLD200の構成を示す。PLD200は、上記実施の形態におけるPLD100として用いることができる。なお、PLD200にはマルチコンテキスト方式を適用することができる。
図10に、LE240の構成例を示す。LE240はプログラム可能な論理回路であり、コンフィギュレーションメモリ部250、ロジックセル(LCELL)260を有する。
PLD200が有するLE240及びRS280は、それぞれコンフィギュレーションメモリを有する。以下、LE240及びRS280に用いることができるコンフィギュレーションメモリの構成例について説明する。
次に、上記実施の形態で用いることができる記憶装置の構成例について説明する。
本実施の形態では、上記実施の形態で説明した表示システムの、より具体的な構成例について説明する。ここでは特に、図7に示すように表示部が複数の画素群を有する場合の構成について説明する。
本実施の形態では、上記実施の形態で説明した表示システムに用いることができる表示装置の構成例について説明する。
図18は、画素ユニット502の構成例を示す回路図である。図18では、隣接する2つの画素ユニット502を示している。画素ユニット502はそれぞれ、画素505aと画素505bを有する。画素505a、505bはそれぞれ、図7における画素51a、51bに相当する。
図20は、本発明の一態様の表示装置500の斜視概略図である。表示装置500は、基板551と基板561とが貼り合わされた構成を有する。図20では、基板561を破線で示している。
表示装置が有する基板には、平坦面を有する材料を用いることができる。表示素子からの光を取り出す側の基板には、該光を透過する材料を用いる。例えば、ガラス、石英、セラミック、サファイア、有機樹脂などの材料を用いることができる。
トランジスタは、ゲート電極として機能する導電層と、半導体層と、ソース電極として機能する導電層と、ドレイン電極として機能する導電層と、ゲート絶縁層として機能する絶縁層と、を有する。上記では、ボトムゲート構造のトランジスタを適用した場合を示している。
トランジスタのゲート、ソースおよびドレインのほか、表示装置を構成する各種配線および電極などの導電層に用いることのできる材料としては、アルミニウム、チタン、クロム、ニッケル、銅、イットリウム、ジルコニウム、モリブデン、銀、タンタル、またはタングステンなどの金属、またはこれを主成分とする合金などが挙げられる。またこれらの材料を含む膜を単層で、または積層構造として用いることができる。例えば、シリコンを含むアルミニウム膜の単層構造、チタン膜上にアルミニウム膜を積層する二層構造、タングステン膜上にアルミニウム膜を積層する二層構造、銅−マグネシウム−アルミニウム合金膜上に銅膜を積層する二層構造、チタン膜上に銅膜を積層する二層構造、タングステン膜上に銅膜を積層する二層構造、チタン膜または窒化チタン膜と、その上に重ねてアルミニウム膜または銅膜を積層し、さらにその上にチタン膜または窒化チタン膜を形成する三層構造、モリブデン膜または窒化モリブデン膜と、その上に重ねてアルミニウム膜または銅膜を積層し、さらにその上にモリブデン膜または窒化モリブデン膜を形成する三層構造等がある。なお、酸化インジウム、酸化錫または酸化亜鉛等の酸化物を用いてもよい。また、マンガンを含む銅を用いると、エッチングによる形状の制御性が高まるため好ましい。
各絶縁層に用いることのできる絶縁材料としては、例えば、アクリル、エポキシなどの樹脂、シリコーンなどのシロキサン結合を有する樹脂の他、酸化シリコン、酸化窒化シリコン、窒化酸化シリコン、窒化シリコン、酸化アルミニウムなどの無機絶縁材料を用いることもできる。
液晶素子としては、例えば垂直配向(VA:Vertical Alignment)モードが適用された液晶素子を用いることができる。垂直配向モードとしては、MVA(Multi−Domain Vertical Alignment)モード、PVA(Patterned Vertical Alignment)モード、ASV(Advanced Super View)モードなどを用いることができる。
発光素子は、トップエミッション型、ボトムエミッション型、デュアルエミッション型などがある。光を取り出す側の電極には、可視光を透過する導電膜を用いる。また、光を取り出さない側の電極には、可視光を反射する導電膜を用いることが好ましい。本発明の一態様では、特にボトムエミッション型の発光素子を用いることが好ましい。
接着層としては、紫外線硬化型等の光硬化型接着剤、反応硬化型接着剤、熱硬化型接着剤、嫌気型接着剤などの各種硬化型接着剤を用いることができる。これら接着剤としてはエポキシ樹脂、アクリル樹脂、シリコーン樹脂、フェノール樹脂、ポリイミド樹脂、イミド樹脂、PVC(ポリビニルクロライド)樹脂、PVB(ポリビニルブチラル)樹脂、EVA(エチレンビニルアセテート)樹脂等が挙げられる。特に、エポキシ樹脂等の透湿性が低い材料が好ましい。また、二液混合型の樹脂を用いてもよい。また、接着シート等を用いてもよい。
接続層としては、異方性導電フィルム(ACF:Anisotropic Conductive Film)や、異方性導電ペースト(ACP:Anisotropic Conductive Paste)などを用いることができる。
着色層に用いることのできる材料としては、金属材料、樹脂材料、顔料または染料が含まれた樹脂材料などが挙げられる。
遮光層として用いることのできる材料としては、カーボンブラック、チタンブラック、金属、金属酸化物、複数の金属酸化物の固溶体を含む複合酸化物等が挙げられる。遮光層は、樹脂材料を含む膜であってもよいし、金属などの無機材料の薄膜であってもよい。また、遮光層に、着色層の材料を含む膜の積層膜を用いることもできる。例えば、ある色の光を透過する着色層に用いる材料を含む膜と、他の色の光を透過する着色層に用いる材料を含む膜との積層構造を用いることができる。着色層と遮光層の材料を共通化することで、装置を共通化できるほか工程を簡略化できるため好ましい。
次に、可撓性を有する基板を用いた表示装置の作製方法の例について説明する。
本実施の形態では、上記実施の形態において用いることができるOSトランジスタの構成例について説明する。
図22(A)は、トランジスタの構成例を示す上面図である。図22(B)は、図22(A)のX1−X2線断面図であり、図22(C)はY1−Y2線断面図である。ここでは、X1−X2線の方向をチャネル長方向と、Y1−Y2線方向をチャネル幅方向と呼称する場合がある。図22(B)は、トランジスタのチャネル長方向の断面構造を示す図であり、図22(C)は、トランジスタのチャネル幅方向の断面構造を示す図である。なお、デバイス構造を明確にするため、図22(A)では、一部の構成要素が省略されている。
次に、OSトランジスタと他のトランジスタを積層した構造について説明する。以下で説明する積層構造は、上記実施の形態で説明した各種回路に適用することができる。
次に、上記のOSトランジスタに用いることができる、金属酸化物について説明する。以下では特に、金属酸化物とCAC(Cloud−Aligned Composite)の詳細について説明する。
本実施の形態では、上記実施の形態で説明した表示装置を用いた表示モジュールの構成例について説明する。
本実施の形態では、本発明の一態様の表示システムを適用可能な電子機器について説明する。
11 プロセッサ
12 半導体装置
13 表示部
20 画像処理部
21 プロセッサ
22 補正回路
30 駆動回路
30a 駆動回路
30b 駆動回路
40 タイミングコントローラ
50 画素群
50a 画素群
50b 画素群
51 画素
51a 画素
51b 画素
60 駆動回路
60a 駆動回路
60b 駆動回路
100 PLD
110 制御回路
120 アレイ
121 ブロック
122 ブロック
123 ブロック
124 ブロック
125 ブロック
140 駆動回路
150 入出力回路
160 記憶装置
170 スイッチ回路
171 トランジスタ
200 PLD
211 LA
212 LA
221 SWA
222 SWA
223 SWA
224 IOA
225 IOA
230 クロック信号生成装置
231 コンフィギュレーションコントローラ
232 コンテキストコントローラ
234 列ドライバ回路
235 行ドライバ回路
240 LE
250 コンフィギュレーションメモリ部
260 ロジックセル
261 回路群
262 LUT
263 キャリーロジック
265 フリップフロップ
280 RS
300 記憶回路
301 記憶回路
310 回路
311 トランジスタ
312 トランジスタ
313 トランジスタ
314 容量素子
315 回路
320 回路
321 トランジスタ
322 トランジスタ
323 容量素子
324 トランジスタ
325 トランジスタ
326 容量素子
327 トランジスタ
330 回路
331 インバータ
332 トランジスタ
350 記憶装置
360 セルアレイ
370 駆動回路
380 駆動回路
390 メモリセル
391 トランジスタ
392 容量素子
393 トランジスタ
394 トランジスタ
395 容量素子
396 トランジスタ
400 表示システム
410 表示部
411 表示ユニット
411a 表示ユニット
411b 表示ユニット
412 タッチセンサユニット
415 トランジスタ
420 制御部
421 インターフェース
422 フレームメモリ
423 デコーダ
424 センサコントローラ
425 コントローラ
426 クロック生成回路
430 画像処理部
431 ガンマ補正回路
432 調光回路
433 調色回路
434 EL補正回路
441 記憶装置
442 タイミングコントローラ
443 レジスタ
450 駆動回路
451 ソースドライバ
451a ソースドライバ
451b ソースドライバ
461 タッチセンサコントローラ
470 ホスト
480 光センサ
481 外光
500 表示装置
501 画素部
502 画素ユニット
503 駆動回路
503a 駆動回路
503b 駆動回路
504 駆動回路
504a 駆動回路
504b 駆動回路
505a 画素
505b 画素
506b 副画素
506bb 副画素
506bg 副画素
506br 副画素
506bw 副画素
510 液晶素子
518 絶縁層
520 発光素子
520b 発光素子
520g 発光素子
520r 発光素子
520w 発光素子
523 金属酸化物膜
530 導電層
530a 導電層
530b 導電層
540 開口
551 基板
561 基板
562 表示領域
564 回路
565 配線
572 FPC
573 IC
612 液晶
613 導電層
617 絶縁層
621 絶縁層
630 偏光板
631 着色層
632 遮光層
633a 配向膜
633b 配向膜
634 着色層
641 接着層
642 接着層
691 導電層
692 EL層
693a 導電層
693b 導電層
701 トランジスタ
704 接続部
705 トランジスタ
706 トランジスタ
707 接続部
711 絶縁層
712 絶縁層
713 絶縁層
714 絶縁層
715 絶縁層
716 絶縁層
717 絶縁層
720 絶縁層
721 導電層
722 導電層
723 導電層
724 導電層
731 半導体層
742 接続層
743 接続体
752 接続部
801 トランジスタ
810 携帯情報端末
811 絶縁層
812 絶縁層
813 絶縁層
814 絶縁層
815 絶縁層
816 絶縁層
817 絶縁層
818 絶縁層
819 絶縁層
820 絶縁層
821 金属酸化物膜
822 金属酸化物膜
823 金属酸化物膜
824 金属酸化物膜
830 酸化物層
850 導電層
851 導電層
852 導電層
853 導電層
860 回路
870 単結晶シリコンウエハ
871 CMOS層
872 トランジスタ層
873 ゲート電極
874 電極
875 電極
1000 表示モジュール
1001 上部カバー
1002 下部カバー
1003 FPC
1004 タッチパネル
1005 FPC
1006 表示装置
1009 フレーム
1010 プリント基板
1011 バッテリ
2000 携帯情報端末
2001 筐体
2002 筐体
2003 表示部
2004 表示部
2005 ヒンジ部
2010 携帯情報端末
2011 筐体
2012 表示部
2013 操作ボタン
2014 外部接続ポート
2015 スピーカ
2016 マイク
2017 カメラ
2020 カメラ
2021 筐体
2022 表示部
2023 操作ボタン
2024 シャッターボタン
2026 レンズ
Claims (8)
- 画像処理部と、駆動回路と、を有し、
前記画像処理部は、プロセッサと、補正回路と、を有し、
前記補正回路は、プログラマブルロジックデバイスを有し、
前記補正回路は、前記プログラマブルロジックデバイスを用いて、前記プロセッサから入力されたデータを補正する機能を有し、
前記プロセッサは、前記補正回路によって補正されたデータを映像信号として前記駆動回路に出力する機能を有し、
前記プログラマブルロジックデバイスは、第1のコンフィギュレーションデータの入力により、第1のガンマ補正を行う機能を有し、
前記プログラマブルロジックデバイスは、第2のコンフィギュレーションデータの入力により、第2のガンマ補正を行う機能を有し、
前記第1のガンマ補正は、前記第2のガンマ補正と内容が異なる半導体装置。 - 請求項1において、
前記プログラマブルロジックデバイスは、第1のコンテキストと第2のコンテキストを構成する機能を有し、
前記第1のコンテキストは、前記第1のガンマ補正を行う回路を構成する機能を有し、
前記第2のコンテキストは、前記第2のガンマ補正を行う回路を構成する機能を有する半導体装置。 - 請求項1又は2において、
前記第1のガンマ補正にはテーブル近似が用いられ、
前記第2のガンマ補正には折れ線近似が用いられる半導体装置。 - 請求項3において、
前記補正回路は、記憶装置と、スイッチ回路と、を有し、
前記記憶装置は、前記第1のガンマ補正に用いられるルックアップテーブルを格納する機能を有し、
前記スイッチ回路は、前記第2のガンマ補正が行われる期間に、前記記憶装置への電力の供給を停止する機能を有し、
前記記憶装置は、チャネル形成領域に金属酸化物を含むトランジスタを有する半導体装置。 - 請求項1乃至4のいずれか一項において、
前記プログラマブルロジックデバイスはコンフィギュレーションメモリを有し、
前記コンフィギュレーションメモリは、チャネル形成領域に金属酸化物を含むトランジスタを有する半導体装置。 - 請求項1乃至5のいずれか一項に記載の半導体装置を用いた制御部と、表示部と、を有し、
前記制御部は、前記制御部に入力された画像データを用いて前記映像信号を生成する機能を有し、
前記表示部は、前記制御部で生成された前記映像信号を用いて表示を行う機能を有する表示システム。 - 請求項6において、
前記表示部は、複数の第1の画素によって構成される第1の画素群と、複数の第2の画素によって構成される第2の画素群と、を有し、
前記第1の画素は、発光素子を有し、
前記第2の画素は、反射型の液晶素子を有し、
前記第1の画素群には、テーブル近似を用いた前記第1のガンマ補正が行われた映像信号が供給され、
前記第2の画素群には、折れ線近似を用いた前記第2のガンマ補正が行われた映像信号が供給される表示システム。 - 請求項6又は7に記載の表示システムを有し、
前記表示部に設けられたタッチセンサを用いて、文字、図形、又はイメージを識別する機能を有する電子機器。
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JP6962731B2 (ja) | 2021-11-05 |
US10559499B2 (en) | 2020-02-11 |
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