JP2018004449A - Measurement device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a measurement device capable of efficiently and accurately controlling the temperature of a semiconductor chip when measuring electrical characteristics of the semiconductor chip.SOLUTION: Disclosed measurement device includes: a stage; a test jig having upper plane and lower plane in contact with the stage, in which plural first concaves are formed in the upper plane; and a temperature control part which is disposed in the test jig for heating or cooling the test jig.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a measuring apparatus for measuring electrical characteristics of a semiconductor chip.

  When evaluating the electrical characteristics of the semiconductor device that is the object to be measured in the state of the semiconductor wafer, after fixing the installation surface of the object to be measured in contact with the surface of the chuck stage by vacuum suction or the like, A non-installation surface is contacted with a contact probe for electrical input / output. In the past, contact probes have been increased in pin count to meet the demands for large current and high voltage application.

  Under such circumstances, it is known that damage or failure occurs in the measurement object due to a partial discharge phenomenon or the like during the evaluation of the measurement object with application of a large current and a large voltage. If the object to be measured is in the state of a semiconductor wafer, the individual semiconductor devices provided on the semiconductor wafer cannot be used in subsequent processes due to damage or failure of the semiconductor wafer. Further, when the object to be measured is damaged, the surface of the chuck stage may be roughened due to the damage, or a part of the damaged object to be measured may be in close contact with or embedded in the surface of the chuck stage. A defect on the surface of the chuck stage deteriorates the adhesion between the object to be measured and the chuck stage in subsequent evaluation, and may cause damage such as a scratch or a chip to the object to be measured, which adversely affects evaluation accuracy or yield. Therefore, it is important to properly protect the surface of the chuck stage.

  Patent Document 1 discloses a semiconductor element storage device that can prevent a semiconductor element mounting surface of a semiconductor element storage tray from closely contacting a semiconductor element and transfer the semiconductor element smoothly from the semiconductor element storage tray. A tray is disclosed.

JP-A-6-13454

  One method for protecting the surface of the chuck stage is to contact a test jig on which a semiconductor chip is placed, that is, to place the semiconductor chip on the stage via the test jig. Further, in the evaluation of the semiconductor device, the semiconductor chip may be heated or cooled via a test jig by heating or cooling the stage. In this case, the test jig itself has a heat capacity, and it is difficult to control the temperature of the semiconductor chip efficiently and accurately. Therefore, a measuring apparatus that can control the temperature of the semiconductor chip efficiently and accurately has been demanded.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a measuring apparatus that can efficiently and accurately control the temperature of a semiconductor chip.

  A measuring apparatus according to the invention of the present application has a stage, an upper surface and a lower surface, the lower surface is in contact with the stage, and a plurality of first recesses are formed on the upper surface. And a temperature adjusting unit for heating or cooling the test jig.

  Other features will be clarified below.

  According to the present invention, since the temperature adjusting unit is provided in the test jig for housing the semiconductor chip provided on the stage, the temperature of the semiconductor chip can be controlled efficiently and accurately.

1 is a diagram showing a measuring apparatus according to Embodiment 1. FIG. It is a top view of a test jig. It is sectional drawing of the test jig along the AA line of FIG. It is a top view of one 1st crevice. It is sectional drawing of the 1st recessed part in the BB line of FIG. It is a figure which shows operation | movement of a contact probe. It is a top view of a stage. It is a top view of a test jig and a semiconductor chip after a slide process. 6 is a partial cross-sectional view of a test jig and a stage according to Embodiment 2. FIG. 10 is a partial cross-sectional view of a test jig and a stage according to Embodiment 3. FIG. 10 is a partial cross-sectional view of a test jig and a stage according to Embodiment 3. FIG.

  A measurement apparatus and a semiconductor chip measurement method according to an embodiment of the present invention will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repeated description may be omitted.

Embodiment 1 FIG.
FIG. 1 shows a measuring apparatus 10 according to the first embodiment. The measuring apparatus 10 includes a stage 12. The stage 12 is a chuck stage formed of a conductive material. A connecting portion 14 is fixed to the side wall of the stage 12. The connection unit 14 is electrically connected to the control unit 16 through a signal line 15. A test jig 13 is placed on the stage 12. The test jig 13 accommodates a plurality of semiconductor chips. The test jig 13 has an upper surface 13 a and a lower surface 13 b, and the lower surface 13 b is in contact with the stage 12. The test jig 13 is made of metal, for example.

  A probe card 20 is provided above the test jig 13. The probe card 20 includes a contact probe 20a, an insulating base 20b, and a connection portion 20c. The probe card 20 can be moved in an arbitrary direction by a moving arm 22. Note that the probe card 20 may be stably held by the plurality of moving arms 22. Further, instead of moving the probe card 20, the probe card 20 may be fixed and the stage 12 may be moved.

  The contact probe 20a is connected to the insulating base 20b. The contact probe 20a is connected to the connection portion 20c via a metal plate formed on the insulating base 20b. The connection unit 20 c is connected to the signal line 24, and the signal line 24 is connected to the control unit 16. The control unit 16 can apply a current and a voltage to the contact probe 20a through the signal line 24, the connection unit 20c, and the metal plate.

  It is desirable to install a plurality of contact probes 20a for each semiconductor chip on the assumption that a large current of, for example, 5 A or more is applied. Connected to a position where the current path length from the connection portion 20c to the connection portion 14 provided on the side surface of the stage 12 substantially matches through any contact probe 20a so that the current densities of the contact probes 20a substantially match. It is good to provide the parts 20c and 14. Specifically, it is desirable that the connection portion 20c and the connection portion 14 face each other, and the contact probe 20a be provided therebetween.

  A connection terminal 30 is connected to the side surface of the test jig 13. The connection terminal 30 is connected to the connection portion 14 via a wiring 31. Further, the measuring apparatus 10 includes a wafer transfer device 40 that can transfer a wafer. The wafer transfer device 40 is a well-known device. As a well-known usage method, the wafer is placed on the stage 12 or the wafer is collected from the stage 12.

  FIG. 2 is a plan view of the test jig 13. The test jig 13 has a circular shape in plan view. The test jig 13 has an outer shape that substantially matches a wafer of a predetermined size. Accordingly, the test jig 13 can be transferred to the stage 12 by using a known wafer transfer device 40 for transferring the wafer.

  A plurality of first recesses 13 </ b> A are formed on the upper surface 13 a of the test jig 13. One semiconductor chip is accommodated in one first recess 13A. The first recess 13A is a counterbore for positioning and installing a semiconductor chip made of a semiconductor material. Here, 32 semiconductor chips can be installed in one test jig 13 by providing the first recess 13A at 32 locations. The number of the first recesses 13A can be changed to an arbitrary number.

  In the test jig 13, a temperature adjusting unit 50 for heating the test jig 13 is provided. The temperature adjustment unit 50 includes a first temperature adjustment unit 50a, a second temperature adjustment unit 50b, a third temperature adjustment unit 50c, and a fourth temperature adjustment unit 50d. The first temperature adjustment unit 50 a is a linear heater that heats the lower left portion of the test jig 13. The second temperature adjustment unit 50 b is a linear heater that heats the lower right portion of the test jig 13. The third temperature adjustment unit 50 c is a linear heater that heats the upper right portion of the test jig 13. The fourth temperature adjustment unit 50 d is a linear heater that heats the upper left portion of the test jig 13. These heaters have an insulating coating on the outside. The first to fourth temperature adjustment units 50 a, 50 b, 50 c, 50 d are individually connected to the connection terminal 30. Thereby, the control part 16 can control 1st-4th temperature adjustment part 50a, 50b, 50c, 50d separately.

  A through hole 13c is formed in the bottom surface of the first recess 13A. By subjecting the metal test jig 13 to machining such as counterboring, the through hole 13c and the first recess 13A described above can be formed. The position of the through hole 13c was not the center of the first recess 13A but a position close to the corner of the first recess 13A. Here, the through hole 13c is formed at a position close to the lower left corner of the first recess 13A. The through hole 13c is a hole used for vacuum-sucking the semiconductor chip to the test jig 13. By providing the through hole 13c near the corner of the first recess 13A, various sizes of semiconductor chips can be vacuum-sucked. For example, after a semiconductor chip having a smaller planar shape than the first recess 13A is provided in the first recess 13A, the test jig 13 is tilted to bring the small semiconductor chip closer to the lower left corner of the first recess 13A. The semiconductor chip can be positioned immediately above the through hole 13c.

  A thermometer 52 for measuring the temperature of the test jig 13 is provided on the test jig 13. The thermometer 52 is connected to the control unit 16 via the connection terminal 30, the wiring 31, the connection unit 14, and the signal line 15.

  FIG. 3 is a cross-sectional view of the test jig 13 taken along line AA in FIG. A bottom surface 13d and a side surface 13e are formed by the first recess 13A. The bottom surface 13d is desirably free of burrs or protrusions by securing a flat surface through a cleaning or polishing process so as not to damage the mounting surface of the semiconductor chip. The side surface 13e of the first concave portion 13A is a slope. As a result, the opening width of the first recess 13A is maximized at the upper end of the first recess 13A.

  The through hole 13 c is a hole that is provided at the bottom of the first recess 13 </ b> A and penetrates the test jig 13. By making the side surface of the through-hole 13c an inclined surface, the through-hole 13c has a tapered shape. Thereby, the width of the through hole 13c is maximized at the lower end of the through hole 13c.

  A storage hole 13 </ b> B is provided on the upper surface of the test jig 13. The first temperature adjustment unit 50a and the second temperature adjustment unit 50b of the temperature adjustment unit 50 are accommodated in the accommodation hole 13B. The entire temperature adjustment unit 50 is accommodated in the accommodation hole 13B. Therefore, the temperature adjustment unit 50 is below the upper surface 13a of the test jig 13 and is not above the upper surface 13a. Further, the temperature adjusting unit 50 is above the lower surface 13b of the test jig 13 and is not below the lower surface 13b. Thereby, the test jig | tool 13 and the stage 12 can be stuck.

  A second recess 13C is formed in the storage hole 13B in which each adjacent temperature adjustment unit is stored, in this case, the storage hole 13B of the test jig 13 between the first temperature adjustment unit 50a and the second temperature adjustment unit 50b. ing. The second recess 13C is formed on the bottom surface of the storage hole 13B, and the depth from the top surface of the test jig 13 is a recess that is deeper than the storage hole 13B. The first temperature adjustment unit 50a heats only the portion surrounded by the first temperature adjustment unit 50a, and the second to fourth temperature adjustment units 50b, 50c, and 50d also include the second to fourth temperature adjustment units 50b, It is preferable to heat only the portions surrounded by 50c and 50d. However, for example, when the first temperature adjustment unit 50a and the second temperature adjustment unit 50b are close to each other, the heat of the first temperature adjustment unit 50a heats the region surrounded by the second temperature adjustment unit 50b, The heat of the temperature adjustment unit 50b heats the region surrounded by the first temperature adjustment unit 50a. In order to prevent such unintended heating of the adjacent region, the second recess 13C is provided between a certain temperature adjustment unit and another temperature adjustment unit. As a result, the first to fourth temperature adjustment units 50a, 50b, 50c, and 50d mainly heat only the region surrounded by the first to fourth temperature adjustment units 50a, 50b, 50c, and 50d, to an unintended region. Heat transfer can be suppressed.

  A third recess 13D is formed on the lower surface 13b of the test jig 13 so as to avoid a position directly below the first recess 13A. The third recess 13D is provided to reduce the contact area between the test jig 13 and the stage 12. By reducing the contact area between the test jig 13 and the stage 12, heat transfer from the test jig 13 to the stage 12 can be suppressed, and the temperature rise of the test jig 13 can be made efficient. In order to further suppress the heat conduction from the test jig 13 to the stage 12, it is preferable to provide a heat insulating portion having a lower thermal conductivity than the test jig 13 in the third recess 13D. Although the material of a heat insulation part is not specifically limited, For example, glass wool can be used.

  When the semiconductor chip to be measured is a vertical device that allows current to flow in the vertical direction, current flows in a portion of the test jig 13 below the first recess 13A. The reason why the third recess 13D is provided so as to avoid a position directly below the first recess 13A is to secure such a current path.

  A metal test jig 13 is placed on the stage 12, and the test jig 13 is brought into close contact with the stage 12 using the vacuum chuck of the stage 12. Since the metal test jig 13 hardly bends, an adsorption leakage that hinders the close contact between the portion along the outer edge of the test jig 13 and the stage 12 may occur. The cause of the suction leakage is a gap generated between the test jig 13 and the stage 12. In order to prevent such adsorption leakage, a frame portion 60 is attached to the lower surface 13 b of the test jig 13. The frame part 60 has a shape along the outer edge of the test jig 13. Therefore, there is a frame portion 60 between the portion along the outer edge of the test jig 13 and the stage 12. The frame part 60 is formed of a thin material having elasticity. As the frame portion 60, for example, a seal tape material made of Teflon (registered trademark) is desirably provided.

  The first recess 13A will be described in detail with reference to FIGS. FIG. 4 is a plan view of one first recess 13A. A groove 13f is provided in a part of the first recess 13A. The groove 13f is annularly provided along the side surface 13e. FIG. 5 is a cross-sectional view of the first recess 13A taken along line BB in FIG. FIG. 5 shows a semiconductor chip 80 to be measured. The semiconductor chip 80 is obtained by dividing a semiconductor wafer into pieces. Foreign matter often adheres to the end of the semiconductor chip or in the vicinity thereof, and if such foreign matter enters between the semiconductor chip 80 and the bottom surface 13d, it may cause measurement failure. Therefore, the above-described groove 13f is provided, and the foreign matter from the semiconductor chip is stored in the groove 13f.

  FIG. 6 is a diagram illustrating the operation of the contact probe 20a. FIG. 6A is a diagram showing a state in which the contact probe 20a and the semiconductor chip 80 are separated from each other. The contact probe 20a is formed by assembling a distal end portion 20a2 having a contact portion 20a1, a pushing portion 20a3, a base portion 20a4, and an electrical connection portion 20a5. The contact portion 20a1 is a portion that mechanically and electrically contacts a connection pad on the surface of the semiconductor chip 80. The pushing portion 20a3 is a portion in which a spring member such as a spring is incorporated. By receiving the force in the z direction, the spring member of the pushing portion 20a3 shrinks, and the pushing portion 20a3 shrinks in appearance. The base part 20a4 is a part fixed to the insulating base 20b. The electrical connection portion 20a5 is a portion that is in electrical communication with the contact portion 20a1. The electrical connection portion 20a5 is a portion serving as an output terminal to the outside. The contact probe 20a is made of a conductive material. For example, it can be made of a metal material such as copper, tungsten, or rhenium tungsten. From the viewpoint of improving conductivity and durability, the contact portion 20a1 may be coated with, for example, gold, palladium, tantalum, or platinum.

  The contact probe 20a descends from the initial state of FIG. 6A toward the semiconductor chip 80 below the z-axis. Then, as shown in FIG. 6B, the contact pads 20a1 are in contact with the connection pads on the upper surface of the semiconductor chip 80. Thereafter, the contact probe 20a is further lowered, and as shown in FIG. 6C, the spring member of the push-in portion 20a3 is shrunk so that the push-in portion 20a3 is contracted in appearance, and the contact between the contact portion 20a1 and the semiconductor chip 80 is ensured Make things.

  Here, the spring-type contact probe 20a that expands and contracts in the z-axis direction has been described. However, the contact probe 20a is not limited to this, and may have an arbitrary configuration. For example, a laminated probe, a wire probe, a cantilever contact probe, or the like can be used.

  FIG. 7 is a plan view of the stage 12. The stage 12 is a chuck stage for vacuum-sucking the test jig 13 and the semiconductor chip placed in the first recess 13A on the test jig 13 to the stage 12 side. A groove 12 </ b> A is formed on the surface of the stage 12. Four grooves 12A extending in the x direction and four grooves 12A extending in the y direction are formed. A hole 12B for vacuum suction is provided on a part of the bottom surface of the groove 12A. The hole 12B is connected to a vacuum pump outside the stage 12. Such a stage 12 is well known.

  A broken circle in FIG. 7 indicates the outer shape of the test jig 13. In FIG. 7, the first recess 13A and the through hole 13c are indicated by broken lines. Since the through hole 13c is directly above the groove 12A, the through hole 13c and the groove 12A are connected. Therefore, when the hole 12B and the groove 12A of the stage 12 are evacuated, the through hole 13c is evacuated and the semiconductor chip is vacuum-sucked to the bottom surface 13d of the first recess 13A.

  The stage 12 is provided with a closing portion 12C that closes the groove 12A in the middle. By dividing the groove 12A at the closing portion 12C, a plurality of independent adsorption paths can be provided. Therefore, the influence in one groove 12A does not affect the adsorption capacity of another groove 12A separated by the closing portion 12C.

  A semiconductor chip measurement method using the measurement apparatus 10 according to the first embodiment of the present invention will be described. First, as shown in FIG. 5, one semiconductor chip 80 is housed in each of the plurality of first recesses 13 </ b> A provided on the upper surface 13 a of the test jig 13. This process is called a storing process. In the storing step, one semiconductor chip 80 is placed in one first recess 13A. Since the side surface 13e of the first recess 13A is inclined, the semiconductor chip 80 can be slid using the inclined surface as a guide, and the semiconductor chip 80 can be placed on the bottom surface 13d. Thereby, installation of the semiconductor chip 80 becomes easy.

  Next, by tilting the test jig 13 once, the plurality of semiconductor chips are slid in the first direction, and the plurality of semiconductor chips 80 are positioned immediately above the through holes 13c. The first direction is a direction from the center of the first recess 13A toward the through hole 13c. In this case, the test jig 13 is tilted to slide the plurality of semiconductor chips 80 to the lower left of the first recess 13A. This process is called a slide process. A through hole 13c is formed at a position shifted in the first direction from the center of the bottom surface 13d, and the semiconductor chip is slid in the first direction in the sliding step. The first direction can be any direction. FIG. 8 is a plan view of the test jig 13 and the semiconductor chip 80 after the sliding process. By the sliding process, all the semiconductor chips 80 are brought to the lower left of each first recess 13A. In FIG. 8, the through hole 13c is visualized for convenience of explanation.

  Next, the test jig 13 on which the semiconductor chip 80 is placed is placed on the surface of the stage 12 using the wafer transfer device 40. At this time, as shown in FIG. 7, the position of the test jig 13 is adjusted so that the groove 12 </ b> A of the stage 12 is positioned directly below the through hole 13 c. This process is referred to as an on-stage installation process. Since the width of the through hole 13c is maximized at the lower end of the through hole 13c, the alignment of the through hole 13c and the groove 12A can be easily performed. Moreover, since the through hole 13c has the smallest width at the upper end, the contact probe 20a in contact with the semiconductor chip 80 is located immediately above the through hole 13c, and the contact probe 20a damages the semiconductor chip 80. Can be prevented. Thereafter, the connection terminal 30 provided on the side surface of the test jig 13 and the connection portion 14 provided on the side surface of the stage 12 are connected by the wiring 31.

  Next, the air in the hole 12B and the groove 12A of the stage 12 in which the test jig 13 is installed and the upper part is covered is evacuated, so that the semiconductor chip 80 is formed through the through hole 13c communicating with the groove 12A. Close contact with the test jig 13. As a result, the test jig 13 comes into close contact with the stage 12. Thereby, the contact resistance between the semiconductor chip 80 and the test jig 13 can be reduced. In this manner, the electrical characteristics of the plurality of semiconductor chips 80 are measured in a state where the plurality of semiconductor chips 80 are fixed to the test jig 13 by evacuating the through holes 13c. This process is called a measurement process.

  In the measurement process, as described with reference to FIG. 6, the contact probe 20 a is brought into contact with the semiconductor chip 80, and the electrical characteristics of the semiconductor chip 80 are measured under the control of the control unit 16. When the semiconductor chip 80 has a vertical structure in which current flows in the vertical direction, the back surface of the semiconductor chip 80 is electrically connected to the control unit 16 via the test jig 13, the stage 12, and the connection unit 14. The test jig 13 and the stage 12 are made of a conductive material such as copper or aluminum. However, the conductivity of the test jig 13 and the stage 12 is not required if the measurement is limited to the measurement of a semiconductor chip having a horizontal structure in which current flows in the horizontal direction. In that case, the test jig 13 and the stage 12 may be made of an insulating material such as a resin material. When the resin material is employed, the first recess 13A, the through hole 13c, and the like can be easily formed by molding.

  In the measurement process or in the previous stage, the control unit 16 controls the temperature adjusting unit 50 so that the temperature measured by the thermometer 52 attached to the test jig 13 becomes a predetermined temperature. In the embodiment of the present invention, the temperature adjusting unit 50 raises the temperature of the test jig 13 to a predetermined temperature. In the measurement process, the electrical characteristics of the plurality of semiconductor chips 80 are measured in a state where the test jig 13 is heated by the temperature adjustment unit 50 provided in the test jig 13 and the temperature of the test jig 13 is controlled. To do. In order to accurately control the temperatures of the test jig 13 and the semiconductor chip 80, it is preferable to install thermometers 52 at a plurality of locations of the test jig 13.

  When the measurement process for all the semiconductor chips 80 is completed, the probe card 20 is separated from the semiconductor chip 80 by using the moving arm 22. Then, the signal line connected to the connection terminal 30 is removed, and the test jig 13 is retracted from the stage 12 by the wafer transfer device 40. When it is desired to continuously measure another semiconductor chip, another test jig 13 containing a semiconductor chip to be measured next is placed on the stage 12 and the evaluation is continued.

  At this time, the next measurement may be performed by changing the temperature distribution of the test jig 13 in the immediately preceding measurement without replacing the test jig 13. In the first embodiment of the present invention, since the movement of heat is suppressed by the second recess 13C shown in FIG. 3, the temperature distribution of the test jig 13 by the first to fourth temperature adjustment units 50a, 50b, 50c, 50d. Can be controlled arbitrarily. In addition, since the heat conduction from the test jig 13 to the stage 12 is suppressed by the third recess 13D, the temperature of the test jig 13 in the previous measurement is the next measurement performed without replacing the test jig 13. The impact on is small.

  Moreover, since the temperature adjustment unit 50 is below the upper surface 13a of the test jig 13, the temperature adjustment unit 50 does not interfere with the movement of the contact probe 20a. In addition, by providing the temperature adjusting unit 50 in the test jig 13, the temperature of the semiconductor chip 80 can be efficiently and accurately compared with the case where the semiconductor chip 80 is heated from the stage 12 via the test jig 13. Can be controlled. In the present embodiment, the test jig 13 is divided into four regions, and four temperature adjustment units for heating each region are installed, and the temperature can be individually increased. By so doing, for example, when the semiconductor chip is not installed in all of the plurality of first recesses 13A, only the region where the semiconductor chip is installed can be heated, and excess power consumption can be suppressed. Note that the temperature adjustment unit 50 is preferably connected to an external power source via the connection terminal 30 and the connection unit 14.

  Since it is not necessary to evacuate the through-hole 13c under the first recess 13A where the semiconductor chip is not installed, it is preferable that the through-hole 13c to be evacuated on the stage 12 can be switched. As shown in FIG. 7, since the groove 12A of the stage 12 is separated into four by the closing part 12C, at least one of the four separated grooves 12A is evacuated by a command from the control unit 16.

  According to the first embodiment of the present invention, by using the circular test jig 13, a conventional apparatus corresponding to the measurement of a semiconductor wafer can be used as it is. Specifically, since the wafer transfer device 40, the stage 12, and the probe card 20 which are conventionally well-known configurations can be used, the measuring device 10 can be provided at a very low cost. In addition, since the stage 12 is protected by the test jig 13 during the measurement of the semiconductor chip, it is possible to prevent the stage 12 from being damaged due to the measurement.

  The temperature adjusting unit 50 is not particularly limited as long as it heats or cools the test jig 13. Therefore, the temperature adjustment unit 50 is not limited to a heater. For example, a pipe through which heated air or cooling air passes or a Peltier element may be provided as the temperature adjustment unit 50. Further, the temperature adjustment unit is not limited to the upper surface 13a side of the test jig 13, and may be installed on the lower surface 13b side or both the upper surface 13a side and the lower surface 13b side. For example, the temperature adjustment unit 50 may be provided in the third recess 13D.

  The semiconductor chip 80 to be measured is not limited to a vertical structure in which a large current flows in the vertical direction, and may be a horizontal semiconductor chip that performs input / output on one surface of the semiconductor chip. When measuring a semiconductor chip having a vertical structure, the contact probe 20a is brought into contact with a connection pad on the upper surface of the semiconductor chip, and the lower surface of the semiconductor chip is brought into contact with the bottom surface 13d of the first recess 13A, which has the same potential as the stage 12. And On the other hand, when measuring a semiconductor chip having a horizontal structure, the contact probe 20a is brought into contact with an input terminal and an output terminal provided on the upper surface of the semiconductor chip.

  The through-hole 13c is provided in a place near the lower left corner of the first recess 13A in plan view, but the first recess according to various sizes of different semiconductor chips used by sharing one test jig 13 What is necessary is just to provide in the position which shifted | deviated from the center of 13A. These modifications can be applied as appropriate to the measuring apparatus and semiconductor chip measuring method according to the following embodiments. Note that the measurement apparatus and the semiconductor chip measurement method according to the following embodiment have much in common with the first embodiment, and therefore, differences from the first embodiment will be mainly described.

Embodiment 2. FIG.
FIG. 9 is a partial cross-sectional view of the test jig 13 and the stage 12 according to the second embodiment. Only the upper part of the side surface 13e of the first recess 13A was a slope, and the other side surface 13e was a vertical surface. A slope may be formed on a part of the side surface 13e, not limited to the upper portion of the side surface 13e of the first recess 13A.

  In order to make the entire side surface 13e an inclined surface, a considerable processing time is required. However, as described above, the processing time of the test jig 13 can be shortened by forming only a part of the side surface 13e as a slope. If the semiconductor chip has a certain degree of strength, the semiconductor chip is not damaged even if the entire side surface 13e is not inclined. However, for example, a thin semiconductor chip is easily damaged, so it is desirable that the entire side surface 13e be a slope.

Embodiment 3 FIG.
FIG. 10 is a partial cross-sectional view of the test jig 13 and the stage 12 according to the third embodiment. Two through holes 13c are provided on the bottom surface of one first recess 13A. A lower surface groove 29 that connects the through hole 13 c of the test jig 13 and the groove 12 </ b> A of the stage 12 is formed on the lower surface of the test jig 13. The lower surface groove 29 connects the two through holes 13c. In the first embodiment, it is necessary to arrange the through hole 13c of the test jig 13 directly above the groove 12A of the stage 12. However, by providing the lower surface groove 29 on the test jig 13 side, if the lower surface groove 29 is located immediately above the groove 12A of the stage 12, the through hole 13c can be evacuated. Thereby, the accuracy of the alignment of the test jig 13 with respect to the stage 12 can be relaxed, and the alignment becomes easy. Further, the degree of freedom of the position of the through hole 13c is improved as compared with the case where the lower surface groove 29 is not provided, and the manufacture of the through hole 13c is facilitated. In FIG. 10, the x-direction length of the lower surface groove 29 is longer than the x-direction length of the first recess 13A. However, if the lower surface groove 29 having a large area is provided, the current of the semiconductor chip 80 may not flow easily. Therefore, the length of the lower surface groove 29 in the x direction may be, for example, such that the two through holes 13c are connected.

  FIG. 11 is a partial cross-sectional view of the test jig 13 and the stage 12 according to the third embodiment. FIG. 10 is a diagram of the xz plane, while FIG. 11 is a diagram of the yz plane. The through-hole 13c shown with the broken line of FIG. 11 is described virtually. In the cross section of FIG. 11, there is no through hole 13c immediately above the groove 12A of the stage 12. However, the groove 12A is connected to the through hole 13c via the lower surface groove 29.

  The technical features described in each embodiment may be used in appropriate combination.

  10 measuring device, 12 stage, 12A groove, 12B hole, 13 test jig, 13a upper surface, 13b lower surface, 13c through hole, 13A first recess, 13B storage hole, 13C second recess, 13D third recess, 50 temperature adjustment Part, 52 thermometer, 80 semiconductor chip

Claims (22)

Stage,
A test jig having an upper surface and a lower surface, wherein the lower surface is in contact with the stage, and a plurality of first recesses are formed on the upper surface;
And a temperature adjusting unit provided in the test jig for heating or cooling the test jig.   The measuring apparatus according to claim 1, wherein the temperature adjustment unit is below the upper surface of the test jig and is not above the upper surface. A control unit for controlling the temperature adjustment unit;
The measurement apparatus according to claim 1, wherein the temperature adjustment unit includes a first temperature adjustment unit and a second temperature adjustment unit that are individually controlled by the control unit.   The measuring apparatus according to claim 3, wherein a second recess is formed in the test jig between the first temperature adjusting unit and the second temperature adjusting unit.   The measurement apparatus according to claim 1, wherein a third recess is formed on the lower surface of the test jig so as to avoid a position directly below the first recess.   The measuring apparatus according to claim 5, further comprising a heat insulating portion provided in the third recess and having a lower thermal conductivity than the test jig.   The measuring apparatus according to claim 1, wherein the temperature adjusting unit is housed in a housing hole provided on an upper surface side of the test jig.   The measurement apparatus according to claim 5, wherein the temperature adjustment unit is provided in the third recess.   The measuring apparatus according to claim 1, wherein the temperature adjusting unit is a linear heater, a pipe through which heated air or cooling air passes, or a Peltier element. A through hole penetrating the test jig is formed at the bottom of the first recess,
A groove and a hole provided in the bottom of the groove are formed on the surface of the stage,
The measuring apparatus according to claim 1, wherein the through hole and the groove are connected to each other.   The measurement according to any one of claims 1 to 10, wherein an opening width of the first recess is maximized at an upper end of the first recess by making the side surface of the first recess an inclined surface. apparatus.   The measuring apparatus according to claim 11, wherein the slope is formed on a part of a side surface of the first recess.   The measuring apparatus according to claim 10, wherein the width of the through hole is maximized at a lower end of the through hole.   The measurement device according to claim 10, wherein the through hole is provided at a position shifted from a center of the first recess in plan view.   The measurement apparatus according to claim 10, wherein a lower surface groove that connects the through hole and the groove is formed on the lower surface of the test jig.   The measuring apparatus according to claim 10, wherein the stage is provided with a blocking portion that blocks the groove in the middle.   The measuring apparatus according to claim 1, wherein the test jig has a circular shape in plan view. With contact probe,
A through hole penetrating the test jig is formed at the bottom of the first recess;
The through hole has a minimum width at the upper end,
The measurement apparatus according to claim 3, wherein the control unit applies a current and a voltage to the contact probe.   19. The frame according to claim 1, further comprising an elastic frame portion attached to the lower surface of the test jig and having a shape along an outer edge of the test jig. measuring device.   The measuring apparatus according to claim 1, wherein the test jig and the stage are made of a conductive material. A thermometer for measuring the temperature of the test jig;
The said control part controls the said temperature adjustment part so that the temperature measured with the said thermometer may become predetermined temperature, The measuring apparatus of Claim 3 characterized by the above-mentioned.   The measuring apparatus according to claim 1, wherein the temperature adjustment unit is above the lower surface of the test jig and is not below the lower surface.

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