JP2017538171A - Ffsアレイ基板及び液晶表示パネル - Google Patents
Ffsアレイ基板及び液晶表示パネル Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 149
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 74
- 239000002184 metal Substances 0.000 claims abstract description 111
- 239000010409 thin film Substances 0.000 claims description 52
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- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F1/136286—Wiring, e.g. gate line, drain line
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- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02F1/136295—Materials; Compositions; Manufacture processes
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- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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Abstract
Description
本発明の実施例はFFSアレイ基板を提供し、このFFSアレイ基板は、
ベース基板と、
走査線及び薄膜トランジスタのゲート電極を形成するように、前記ベース基板に設けられる第1金属層と、
前記第1金属層と第2金属層を分離するために、前記第1金属層上に設けられる第1絶縁層と、
データ線、前記薄膜トランジスタのソース電極及び前記薄膜トランジスタのドレイン電極を形成するように、前記第1絶縁層上に設けられる前記第2金属層と、
前記第2金属層と透明電極層を分離するために、前記第2金属層上に設けられる第2絶縁層と、
透明画素電極を形成するように、前記第2絶縁層上に設けられ、前記第2絶縁層の第1貫通孔を通じて前記薄膜トランジスタのドレイン電極に接続される前記透明電極層と、
前記透明電極層と共通電極層を分離するために、前記透明電極層上に設けられる第3絶縁層と、
前記第3絶縁層上に設けられた共通電極線と、前記共通電極線及び前記第3絶縁層上に設けられた透明共通電極とを備える前記共通電極層と、を備え、ここで、前記共通電極線の抵抗率は、前記透明共通電極の抵抗率より小さい。
ベース基板と、
走査線及び薄膜トランジスタのゲート電極を形成するように、前記ベース基板に設けられる第1金属層と、
前記第1金属層と第2金属層を分離し、前記第1金属層と透明電極層を分離するために、前記第1金属層上に設けられる、第1絶縁層と、
データ線、前記薄膜トランジスタのソース電極及び前記薄膜トランジスタのドレイン電極を形成するように、前記第1絶縁層上に設けられる第2金属層と、
透明画素電極を形成するように、前記第1絶縁層上に設けられ、前記薄膜トランジスタのドレイン電極に接続される前記透明電極層と、
前記第2金属層と共通電極層を分離し、及び前記透明電極層と前記共通電極層を分離するために、前記第2金属層及び前記透明電極層上に設けられる第2絶縁層と、
前記第2絶縁層上に設けられた共通電極線と、前記共通電極線及び前記第2絶縁層上に設けられた透明共通電極とを備える前記共通電極層と、を備え、ここで、前記共通電極線の抵抗率は、前記透明共通電極の抵抗率より小さい。
ベース基板と、
走査線及び薄膜トランジスタのゲート電極を形成するように、前記ベース基板に設けられる第1金属層と、
前記第1金属層と第2金属層を分離するために、前記第1金属層上に設けられる第1絶縁層と、
データ線、前記薄膜トランジスタのソース電極及び前記薄膜トランジスタのドレイン電極を形成するように、前記第1絶縁層上に設けられる前記第2金属層と、
前記第2金属層と透明電極層を分離するために、前記第2金属層上に設けられる第2絶縁層と、
透明画素電極を形成するように、前記第2絶縁層上に設けられ、前記第2絶縁層の第1貫通孔を通じて前記薄膜トランジスタのドレイン電極に接続される前記透明電極層と、
前記透明電極層と共通電極層を分離するために、前記透明電極層上に設けられる第3絶縁層と、
前記第3絶縁層上に設けられた共通電極線と、前記共通電極線及び前記第3絶縁層上に設けられた透明共通電極とを備える前記共通電極層と、を備え、ここで、前記共通電極線の抵抗率は、前記透明共通電極の抵抗率より小さい。
本好ましい実施例のFFSアレイ基板10は、複数の表示ドメインを備え、FFSアレイ基板10の透明共通電極182の表面にはスリット構造183が設けられる。FFSアレイ基板10の各表示ドメインの透明共通電極182のスリット構造183において、スリットの延伸方向は異なる。共通電極線181は、隣接する表示ドメインの境界に設けられる。
本好ましい実施例のFFSアレイ基板20は、複数の表示ドメインを備え、FFSアレイ基板20の透明共通電極282の表面にはスリット構造283が設けられる。FFSアレイ基板20の各表示ドメインの透明共通電極282のスリット構造283において、スリットの延伸方向は異なる。共通電極線281は、隣接する表示ドメインの境界に設けられる。
本好ましい実施例のFFSアレイ基板30は、複数の表示ドメインを備え、FFSアレイ基板30の透明共通電極372の表面にはスリット構造373が設けられる。FFSアレイ基板30の各表示ドメインの透明共通電極372のスリット構造373において、スリットの延伸方向は異なる。共通電極線371は、隣接する表示ドメインの境界に設けられる。
Claims (18)
- FFSアレイ基板であって、
ベース基板と、
走査線及び薄膜トランジスタのゲート電極を形成するように、前記ベース基板に設けられる第1金属層と、
前記第1金属層と第2金属層を分離するために、前記第1金属層上に設けられる第1絶縁層と、
データ線、前記薄膜トランジスタのソース電極及び前記薄膜トランジスタのドレイン電極を形成するように、前記第1絶縁層上に設けられる前記第2金属層と、
前記第2金属層と透明電極層を分離するために、前記第2金属層上に設けられる第2絶縁層と、
透明画素電極を形成するように、前記第2絶縁層上に設けられ、前記第2絶縁層の第1貫通孔を通じて前記薄膜トランジスタのドレイン電極に接続される前記透明電極層と、
前記透明電極層と共通電極層を分離するために、前記透明電極層上に設けられる第3絶縁層と、
前記第3絶縁層上に設けられた共通電極線と、前記共通電極線及び前記第3絶縁層上に設けられた透明共通電極とを備える前記共通電極層と、を備え、ここで、前記共通電極線の抵抗率は、前記透明共通電極の抵抗率より小さい、FFSアレイ基板。 - 前記透明共通電極の表面には、スリット構造が設けられる、請求項1に記載のFFSアレイ基板。
- 前記FFSアレイ基板は、複数の表示ドメインを備える、請求項1に記載のFFSアレイ基板。
- 各前記表示ドメインの前記透明共通電極のスリット構造において、スリットの延伸方向は異なる、請求項3に記載のFFSアレイ基板。
- 前記共通電極線は、隣接する前記表示ドメインの境界に設けられる、請求項3に記載のFFSアレイ基板。
- 前記第2金属層は、共通信号を提供するための共通線をさらに備え、前記共通電極線は、前記第3絶縁層、前記透明電極層及び前記第2絶縁層を貫通する第2貫通孔を介して、前記第2金属層上の前記共通線に接続される、請求項1に記載のFFSアレイ基板。
- FFSアレイ基板であって、
ベース基板と、
走査線及び薄膜トランジスタのゲート電極を形成するように、前記ベース基板に設けられる第1金属層と、
前記第1金属層と第2金属層を分離し、前記第1金属層と透明電極層を分離するために、前記第1金属層上に設けられる、第1絶縁層と、
データ線、前記薄膜トランジスタのソース電極及び前記薄膜トランジスタのドレイン電極を形成するように、前記第1絶縁層上に設けられる第2金属層と、
透明画素電極を形成するように、前記第1絶縁層上に設けられ、前記薄膜トランジスタのドレイン電極に接続される前記透明電極層と、
前記第2金属層と共通電極層を分離し、及び前記透明電極層と前記共通電極層を分離するために、前記第2金属層及び前記透明電極層上に設けられる第2絶縁層と、
前記第2絶縁層上に設けられた共通電極線と、前記共通電極線及び前記第2絶縁層上に設けられた透明共通電極とを備える前記共通電極層と、を備え、ここで、前記共通電極線の抵抗率は、前記透明共通電極の抵抗率より小さい、FFSアレイ基板。 - 前記透明共通電極の表面には、スリット構造が設けられる、請求項7に記載のFFSアレイ基板。
- 前記FFSアレイ基板は、複数の表示ドメインを備える、請求項7に記載のFFSアレイ基板。
- 各前記表示ドメインの前記透明共通電極のスリット構造において、スリットの延伸方向は異なる、請求項9に記載のFFSアレイ基板。
- 前記共通電極線は、隣接する前記表示ドメインの境界に設けられる、請求項9に記載のFFSアレイ基板。
- 前記第1金属層は、共通信号を提供するための共通線をさらに備え、前記共通電極線は、前記第2絶縁層、前記透明電極層及び前記第1絶縁層を貫通する貫通孔を介して、前記第1金属層上の前記共通線に接続される、請求項7に記載のFFSアレイ基板。
- FFSアレイ基板の液晶表示装置であって、上基板、FFSアレイ基板、及び上基板とFFSアレイ基板との間に設けられた液晶層を備え、前記FFSアレイ基板は、
ベース基板と、
走査線及び薄膜トランジスタのゲート電極を形成するように、前記ベース基板に設けられる第1金属層と、
前記第1金属層と第2金属層を分離するために、前記第1金属層上に設けられる第1絶縁層と、
データ線、前記薄膜トランジスタのソース電極及び前記薄膜トランジスタのドレイン電極を形成するように、前記第1絶縁層上に設けられる前記第2金属層と、
前記第2金属層と透明電極層を分離するために、前記第2金属層上に設けられる第2絶縁層と、
透明画素電極を形成するように、前記第2絶縁層上に設けられ、前記第2絶縁層の第1貫通孔を通じて前記薄膜トランジスタのドレイン電極に接続される前記透明電極層と、
前記透明電極層と共通電極層を分離するために、前記透明電極層上に設けられる第3絶縁層と、
前記第3絶縁層上に設けられた共通電極線と、前記共通電極線及び前記第3絶縁層上に設けられた透明共通電極とを備える前記共通電極層と、を備え、ここで、前記共通電極線の抵抗率は、前記透明共通電極の抵抗率より小さい、FFSアレイ基板の液晶表示装置。 - 前記透明共通電極の表面には、スリット構造が設けられる、請求項13に記載のFFSアレイ基板の液晶表示装置。
- 前記FFSアレイ基板は、複数の表示ドメインを備える、請求項13に記載のFFSアレイ基板の液晶表示装置。
- 各前記表示ドメインの前記透明共通電極のスリット構造において、スリットの延伸方向は異なる、請求項15に記載のFFSアレイ基板の液晶表示装置。
- 前記共通電極線は、隣接する前記表示ドメインの境界に設けられる、請求項15に記載のFFSアレイ基板の液晶表示装置。
- 前記第2金属層は、共通信号を提供するための共通線をさらに備え、前記共通電極線は、前記第3絶縁層、前記透明電極層及び前記第2絶縁層を貫通する第2貫通孔を介して、前記第2金属層上の前記共通線に接続される、請求項13に記載のFFSアレイ基板の液晶表示装置。
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