JP2017537464A - Energy storage device and manufacturing method thereof - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/14—Organic dielectrics
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
- C08L33/00—Compositions of homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and only one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides or nitriles thereof; Compositions of derivatives of such polymers
- C08L33/02—Homopolymers or copolymers of acids; Metal or ammonium salts thereof
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
- C08L79/00—Compositions of macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing nitrogen with or without oxygen or carbon only, not provided for in groups C08L61/00 - C08L77/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/14—Organic dielectrics
- H01G4/18—Organic dielectrics of synthetic material, e.g. derivatives of cellulose
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/20—Dielectrics using combinations of dielectrics from more than one of groups H01G4/02 - H01G4/06
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
- C08L2203/00—Applications
- C08L2203/20—Applications use in electrical or conductive gadgets
Abstract
本発明は、第1の電極と、第2の電極と、前記第1の電極と前記第2の電極との間に配置された固体多層構造を含むエネルギー蓄積デバイスを提供する。固体多層構造は、前記第1および第2の電極と接触してもよい。固体多層構造は、前記電極に平行に配置された層を含むことができ、前記層はシーケンス(A−B)m−Aを有し、ここで、Aは絶縁層であり、Bは絶縁体マトリックス中に導電性ナノ粒子の微小分散体を有するコロイド状複合体を含有する分極層であり、「m」は1以上の数である。層Aは、少なくとも約0.05ボルト/ナノメートル(nm)の破壊電圧を有し、層Bは少なくとも約100の誘電率を有することができる。【選択図】図1The present invention provides an energy storage device that includes a first electrode, a second electrode, and a solid multilayer structure disposed between the first electrode and the second electrode. The solid multilayer structure may be in contact with the first and second electrodes. The solid multilayer structure may include layers arranged parallel to the electrodes, the layers having the sequence (AB) mA, where A is an insulating layer and B is an insulator. It is a polarization layer containing a colloidal composite having a fine dispersion of conductive nanoparticles in a matrix, and “m” is a number of 1 or more. Layer A can have a breakdown voltage of at least about 0.05 volts / nanometer (nm), and layer B can have a dielectric constant of at least about 100. [Selection] Figure 1
Description
背景技術
コンデンサは、静電界の形でエネルギーを蓄積するために使用される受動電子部品であり、誘電体層によって分離された一対の電極を含む。2つの電極間に電位差が存在するとき、電界が誘電体層に存在する。この電界はエネルギーを蓄積し、理想的なコンデンサは、各電極上の電荷とそれらの間の電位差との比である単一の一定の静電容量値によって特徴付けられる。実際には、電極間の誘電体層は少量の漏れ電流を通過させる。電極およびリード線は等価直列抵抗を生成し、誘電体層は破壊電圧をもたらす電界強度に制限を有する。最も単なるコンデンサは、誘電率εの誘電体層によって分離された2つの平行な電極からなり、各電極は面積Sを有し、互いに距離dをおいて配置されている。電極は面積Sにわたって均一に延びていると考えられ、表面電荷密度は式:±ρ=±Q/Sで表すことができる。電極の幅が間隔(距離)dよりもはるかに大きいので、コンデンサの中心付近の電場は、大きさE=ρ/εで均一になる。電圧は、電極間の電界の線積分として定義される。理想的なコンデンサは、式(1)で定義される一定の静電容量Cで特徴付けられる。
破壊電界強度Ebdとして知られる特性電界は、コンデンサ内の誘電体層が導電性になる電界である。これが起こる電圧は、デバイスの絶縁破壊電圧と呼ばれ、絶縁耐力と電極間の間隔との積によって与えられ、
コンデンサに蓄積される最大体積エネルギー密度は、〜ε・E2 bdに比例する値によって制限され、εは誘電率であり、Ebdは破壊強度である。したがって、コンデンサの蓄積エネルギーを増加させるためには、誘電体の透磁率εおよび誘電体の破壊強度Ebdを高める必要がある。 The maximum volumetric energy density stored in the capacitor is limited by a value proportional to ~ ε · E 2 bd , where ε is the dielectric constant and E bd is the breakdown strength. Therefore, in order to increase the stored energy of the capacitor, it is necessary to increase the magnetic permeability ε of the dielectric and the breakdown strength E bd of the dielectric.
高電圧用途では、はるかに大きなコンデンサを使用しなければならない。破壊電圧を劇的に下げる要因はいくつかある。導電性電極の形状はこれらの用途にとって重要である。特に、鋭いエッジまたは点は、電界強度を局所的に著しく増大させ、局所的な破壊を招く可能性がある。任意の位置でローカル破壊が開始されると、破壊は、誘電体層を通って対向電極に到達して短絡するまでに、速やかに“トレース”する。 For high voltage applications, much larger capacitors must be used. There are several factors that dramatically reduce the breakdown voltage. The shape of the conductive electrode is important for these applications. In particular, sharp edges or points can significantly increase the field strength locally, leading to local breakdown. When local breakdown is initiated at an arbitrary location, the breakdown “traces” quickly until it reaches the counter electrode through the dielectric layer and shorts.
誘電体層の破壊は、通常、以下のように起こる。電場の強さが十分に高くなると、誘電材料の原子からの自由電子が、一方の電極から他方の電極へ電流を伝導させる。誘電体における不純物の存在または結晶構造の不完全性によっては、半導体デバイスにおいて観察されるようなアバランシェブレークダウンをもたらし得る。 The breakdown of the dielectric layer usually occurs as follows. When the electric field strength is sufficiently high, free electrons from the atoms of the dielectric material conduct current from one electrode to the other. The presence of impurities in the dielectric or imperfections in the crystal structure can lead to avalanche breakdown as observed in semiconductor devices.
誘電体材料の他の重要な特性は、その誘電率である。コンデンサには様々な種類の誘電体が使用され、セラミックス、ポリマーフィルム、紙、電解コンデンサなどの各種のコンデンサがある。最も広く使用されるポリマーフィルム材料は、ポリプロピレンおよびポリエステルである。誘電率を増加するとともに体積エネルギー密度を増加するのが重要な技術課題となる。 Another important property of the dielectric material is its dielectric constant. Various types of dielectrics are used as capacitors, and there are various types of capacitors such as ceramics, polymer films, paper, and electrolytic capacitors. The most widely used polymer film materials are polypropylene and polyester. Increasing the dielectric constant and volume energy density is an important technical issue.
ドデシルベンゼンスルホネート(DBSA)の存在下でのポリアクリル酸(PAA)の水性分散液中のアニリンの現場重合を用いて、ポリアニリンの超高誘電率複合体PANI−DBSA/PAAを合成した(Chao−Hsien Hoaら、「in situ重合によって調製された高誘電率ポリアニリン/ポリ(アクリル酸)複合体」、Synthetic Metals 158(2008)、第630−637ページ)。水溶性PAAは高分子安定剤として働き、巨視的凝集からPANI粒子を保護した。重量で30%のPANIを含有する複合体について、ca.2.0×105(1kHzで)との非常に高い誘電率が得られた。PANI含有量によって複合材料の形態学的、誘電的および電気的特性に及ぼす影響が調べられた。誘電率、誘電損失、損失係数および電気係数の周波数依存性が、0.5kHz〜10MHzの周波数範囲で分析された。SEM顕微鏡写真では、高いPANI含有量(すなわち、20重量%)を有する複合材が、PAAマトリックス内に均一に分布した多数のナノスケールPANI粒子からなることを明らかにした。高誘電率は、PANI粒子の小さなコンデンサの合計に起因するものであった。この材料の欠点は、電場の増加に伴ってそのような事象が増加する確率で、電場の下でのパーコレーションおよび少なくとも1つの連続導電路の形成の可能性があることである。隣接する導電性PANI粒子を通る少なくとも1つの連続的な経路(トラック)がコンデンサの電極間に形成されると、そのコンデンサの破壊電圧を低下させる。 An in situ polymerization of aniline in an aqueous dispersion of polyacrylic acid (PAA) in the presence of dodecylbenzenesulfonate (DBSA) was used to synthesize a polyaniline ultrahigh dielectric constant complex PANI-DBSA / PAA (Chao- Hsien Hoa et al., “High Dielectric Polyaniline / Poly (Acrylic Acid) Composites Prepared by In Situ Polymerization”, Synthetic Metals 158 (2008), pages 630-637). Water-soluble PAA served as a polymeric stabilizer and protected the PANI particles from macroscopic aggregation. For complexes containing 30% PANI by weight, ca. A very high dielectric constant of 2.0 × 10 5 (at 1 kHz) was obtained. The effect of PANI content on the morphological, dielectric and electrical properties of the composite was investigated. The frequency dependence of dielectric constant, dielectric loss, loss factor and electrical coefficient was analyzed in the frequency range of 0.5 kHz to 10 MHz. SEM micrographs revealed that a composite with a high PANI content (ie 20% by weight) consists of a large number of nanoscale PANI particles evenly distributed within the PAA matrix. The high dielectric constant was attributed to the sum of small capacitors with PANI particles. The disadvantage of this material is the possibility of percolation under the electric field and the formation of at least one continuous conducting path with the probability that such events increase with increasing electric field. When at least one continuous path (track) through adjacent conductive PANI particles is formed between the electrodes of a capacitor, the breakdown voltage of that capacitor is reduced.
水溶性ポリマー、ポリ(N−ビニルピロリドン)[ポリ(1−ビニルピロリジン−2−オン)]で安定化されたコロイド状ポリアニリン粒子は、分散重合によって調製された。平均粒径241±50nmは、動的光散乱にて確定された(Jaroslav StejskalおよびIrina Sapurina、「ポリアニリン:薄膜およびコロイド分散(IUPAC Technical Report)」、Pure and Applied Chemistry、77巻、 No.5、第815−826ページ(2005)を参照)。 Colloidal polyaniline particles stabilized with a water-soluble polymer, poly (N-vinylpyrrolidone) [poly (1-vinylpyrrolidin-2-one)], were prepared by dispersion polymerization. The average particle size of 241 ± 50 nm was determined by dynamic light scattering (Jaroslav Stejskal and Irina Sapurina, “Polyaniline: Thin Film and Colloidal Dispersion”, Pure and Applied Chemistry, Vol. 77, No. 5). Pp. 815-826 (2005)).
ドープされたアニリンオリゴマーの単結晶は、単純な溶液に基づく自己組織化法を介して製造される(Yue Wangら、“ドーピングされたオリゴアニリン単結晶の階層的アセンブリを介した形態学的および次元的制御”、J.Am.Chem.Soc.、2012、134、第9251−9262ページ)。機械学についての詳細的な研究は、異なる形態および寸法の結晶を「ボトムアップ」階層アセンブリによって生成し、1次元(1−D)ナノファイバーような構造を高次構造に集約することができることを明らかにした。1−Dナノファイバーおよびナノワイヤ、2−Dナノリボンおよびナノシート、3−Dナノプレート、積み重ねシート、ナノフロア、多孔質ネットワーク、中空球およびねじれコイルを含む、多種多様な結晶ナノ構造を、結晶の制御およびドープされたオリゴマー間の非共有相互作用によって取得することができる。これらのナノスケールの結晶質は、その多量の対等物と比較して導電性が向上し、形状依存性の結晶性などの興味深い構造特性の関係も示される。さらに、吸収研究を介して、これらの構造の形態および寸法は、分子−溶媒相互作用を監視することによって、大幅に合理化および予測することができる。ドーピングされたテトラアニリンをモデルシステムとして用いて、この論文で提示された結果および戦略は、有機材料の形状およびサイズ制御の一般的なスキームについての示唆を提供する。 Single crystals of doped aniline oligomers are produced via a simple solution-based self-assembly method (Yue Wang et al., “Morphological and dimensionality via hierarchical assembly of doped oligoaniline single crystals. Control ", J. Am. Chem. Soc., 2012, 134, pages 9251-9262). Detailed studies on mechanics have shown that crystals of different forms and dimensions can be generated by “bottom-up” hierarchical assemblies, and structures like one-dimensional (1-D) nanofibers can be aggregated into higher order structures. Revealed. A wide variety of crystalline nanostructures, including 1-D nanofibers and nanowires, 2-D nanoribbons and nanosheets, 3-D nanoplates, stacked sheets, nanofloors, porous networks, hollow spheres and torsion coils, control crystals and It can be obtained by non-covalent interaction between the doped oligomers. These nanoscale crystals have improved electrical conductivity compared to their large counterparts and show interesting structural property relationships such as shape-dependent crystallinity. Furthermore, through absorption studies, the morphology and dimensions of these structures can be greatly rationalized and predicted by monitoring molecule-solvent interactions. Using doped tetraaniline as a model system, the results and strategies presented in this paper provide suggestions for a general scheme for organic material shape and size control.
多層構造に基づく公知のエネルギー蓄積装置(コンデンサ)が存在する。エネルギー蓄積デバイスは、第1および第2の電極と、遮断層および誘電体層を含む多層構造とを含む。第1遮断層は、第1電極と誘電体層との間に配置され、第2遮断層は、第2電極と誘電体層との間に配置される。第1および第2の阻止層の誘電率は、いずれも誘電体層の誘電率よりも独立して大きい。この装置の欠点は、電極と直接接触して位置する高誘電率の層を遮断することが、エネルギー蓄積装置の破壊を招く可能性があることである。複合材料をベースとし、分極粒子(PANI粒子など)を含む高誘電率の材料は、パーコレーション現象を示すことがある。形成された層の多結晶構造は、結晶間の境界に複数のもつれ化学結合を有する。高誘電率の材料が多結晶構造を有する場合には、結晶粒の境界に沿ってパーコレーションが生じることがある。公知の装置の別の欠点は、すべての層の真空蒸着である高価な製造手順である。 There are known energy storage devices (capacitors) based on multilayer structures. The energy storage device includes first and second electrodes and a multilayer structure including a barrier layer and a dielectric layer. The first blocking layer is disposed between the first electrode and the dielectric layer, and the second blocking layer is disposed between the second electrode and the dielectric layer. The dielectric constants of the first and second blocking layers are both independently greater than the dielectric constant of the dielectric layer. The disadvantage of this device is that blocking the high dielectric constant layer located in direct contact with the electrodes can lead to the destruction of the energy storage device. High dielectric constant materials based on composite materials and including polarized particles (such as PANI particles) may exhibit a percolation phenomenon. The polycrystalline structure of the formed layer has a plurality of entangled chemical bonds at the boundaries between the crystals. When a high dielectric constant material has a polycrystalline structure, percolation may occur along the boundaries of the crystal grains. Another disadvantage of the known apparatus is the expensive manufacturing procedure, which is the vacuum deposition of all layers.
エネルギー蓄積デバイスとしてのコンデンサは、電気化学的エネルギー蓄積に対して、周知の利点を有する。電池と比較して、コンデンサは、非常に高い電力密度、すなわち充電/再充電速度でエネルギーを蓄積することができ、劣化の少なく長い蓄積寿命を有し、数十万回または数百万回の充放電が可能である。しかし、コンデンサは、電池のように小さな体積または重量でエネルギーを貯蔵しないことが多く、エネルギー蓄積コストが低いので、電気自動車などの一部のアプリケーションではコンデンサが実用的ではない。したがって、体積および質量エネルギー蓄積密度が高く、コストが低いコンデンサを提供することは、エネルギー蓄積技術の進歩であり得る。 Capacitors as energy storage devices have well-known advantages over electrochemical energy storage. Compared to batteries, capacitors can store energy at a very high power density, i.e. charge / recharge rate, have a long storage life with little degradation, hundreds of thousands or millions of times Charging / discharging is possible. However, capacitors often do not store energy in a small volume or weight like batteries and have low energy storage costs, making capacitors impractical for some applications such as electric vehicles. Thus, providing capacitors with high volume and mass energy storage density and low cost can be an advance in energy storage technology.
本発明は、エネルギー蓄積デバイス(例えば、コンデンサ)およびその製造方法を提供する。本発明のエネルギー蓄積デバイスは、いくつかのエネルギー蓄積デバイスに関連する蓄積エネルギーの体積および質量密度のさらなる増加の問題を解決すると同時に、材料および製造プロセスのコストを削減することができる。 The present invention provides an energy storage device (eg, a capacitor) and a method of manufacturing the same. The energy storage device of the present invention can solve the problem of further increase in the volume and mass density of stored energy associated with some energy storage devices while simultaneously reducing the cost of materials and manufacturing processes.
一つの形態では、コンデンサは、第1の電極、第2の電極、および前記第1および第2の電極の間に配置された固体多層構造を含む。前記電極は平面であり、互いに平行に配置され、前記固体多層構造は、前記電極に平行に配置された層を含み、以下のシーケンスを有する:(A−B)m−A。ここで、Aは絶縁層であり、Bは、絶縁体マトリックスにおける導電性ナノ粒子の微小分散を含む分極層であり、数m≧1である。ある場合では、mは、1、2、3、4、5、6、7、8、9、10、20、30、40、50、100、200、300、400、500、600またはそれ以上であり得る。いくつかの例において、mは、1〜1000、1〜100、または1〜50である。電極は、互いにほぼ平行であってもよく、または実質的に平行であってもよい。電極は、平行配置からオフセットすることができる。 In one form, the capacitor includes a first electrode, a second electrode, and a solid multilayer structure disposed between the first and second electrodes. The electrodes are planar and arranged parallel to each other, and the solid multilayer structure includes layers arranged parallel to the electrodes and has the following sequence: (AB) m -A. Here, A is an insulating layer, B is a polarization layer including fine dispersion of conductive nanoparticles in an insulator matrix, and several m ≧ 1. In some cases, m is 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 20, 30, 40, 50, 100, 200, 300, 400, 500, 600 or more. possible. In some examples, m is 1-1000, 1-100, or 1-50. The electrodes may be substantially parallel to each other or substantially parallel. The electrodes can be offset from the parallel arrangement.
別の形態では、コンデンサの製造方法は、(a)電極の1つとして機能する導電性基板の準備、(b)固体多層構造の形成、および(c)多層構造上への第2の電極の形成を含み、多層構造の形成は、絶縁層および分極層の交互適用のステップまたは層の同時押出しのステップを含む。 In another form, a method of manufacturing a capacitor includes: (a) preparing a conductive substrate that functions as one of the electrodes; (b) forming a solid multilayer structure; and (c) forming a second electrode on the multilayer structure. Formation of the multi-layer structure, including formation, includes the step of alternating application of the insulating and polarization layers or the step of co-extrusion of the layers.
別の形態では、コンデンサの製造方法は、両方の電極上に絶縁層をコーティングするステップと、第2電極を多層構造に積層して電極の一方に多層構造をコーティングするステップとを含む。 In another form, a method of manufacturing a capacitor includes coating an insulating layer on both electrodes, and laminating a second electrode in a multilayer structure and coating one of the electrodes with the multilayer structure.
本発明のさらなる形態および利点は、本発明の例示的な実施形態のみが示され記載される以下の詳細な説明から、当業者に容易に明らかになるであろう。理解されるように、本発明は、他の異なる実施形態が可能であり、そのいくつかの詳細は、本発明から逸脱することなく様々な点で変更可能である。したがって、図面および説明は、本質的に例示的であり、限定的ではないとみなされるべきである。 Further aspects and advantages of the present invention will become readily apparent to those skilled in the art from the following detailed description, wherein only exemplary embodiments of the invention are shown and described. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various respects, without departing from the invention. Accordingly, the drawings and descriptions are to be regarded as illustrative in nature and not as restrictive.
参照による組み込み
個々の刊行物、特許、または特許出願が具体的かつ個別に参照により組み込まれると示されていると同様に、本明細書中に言及されるすべての刊行物、特許および特許出願は、参照により本明細書に援用される。
INCORPORATION BY REFERENCE All publications, patents and patent applications mentioned in this specification should be considered in the same manner as individual publications, patents or patent applications are specifically and individually indicated to be incorporated by reference. Which is incorporated herein by reference.
本発明の新規な特徴は、添付の特許請求の範囲に詳細に記載されている。本発明の特徴および利点のより良い理解は、本発明の原理が利用される例示的な実施形態を示す以下の詳細な説明および添付の図面を参照することによって得られるであろう。 The novel features of the invention are set forth with particularity in the appended claims. A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description that sets forth illustrative embodiments, in which the principles of the invention are utilized, and the accompanying drawings of which:
本発明の様々な実施形態を本明細書に示し説明してきたが、当業者には、そのような実施形態は単なる例示として提供されていることが明らかであろう。本発明から逸脱することなく、多くの変形、変更、および置換が当業者に生じ得る。本明細書に記載された本発明の実施形態に対する様々な代替物を使用することができることを理解されたい。 While various embodiments of the invention have been shown and described herein, it will be apparent to those skilled in the art that such embodiments are provided by way of example only. Many variations, modifications and substitutions may occur to those skilled in the art without departing from the invention. It should be understood that various alternatives to the embodiments of the invention described herein can be used.
本発明は、コンデンサなどのエネルギー蓄積デバイスを提供する。本発明の一実施形態では、絶縁層は結晶質である。絶縁層は、単結晶材料、バッチ結晶材料、または非晶質材料を含む任意の適切な結晶材料から製造することができる。用途に応じて、絶縁誘電体材料の誘電率は広範囲にあり得る。絶縁層は、4eVより大きいバンドギャップ、および約0.001ボルト(V)/ナノメートル(nm)、0.01V/nm、0.05V/nm、0.1V/nm0.2V/nm、0.3V/nm、0.4V/nm、0.5V/nm、1V/nm、または10V/nmより大きい破壊電界強度によって特徴付けられる材料を含む。分極層の材料は、広範囲にあり得る誘電率εpolを有する。場合によっては、εpolは、少なくとも約100、200、300、400、500、1000、2000、3000、4000、5000、6000、7000、8000、9000、10000または100000である。 The present invention provides an energy storage device such as a capacitor. In one embodiment of the invention, the insulating layer is crystalline. The insulating layer can be made from any suitable crystalline material, including single crystal materials, batch crystal materials, or amorphous materials. Depending on the application, the dielectric constant of the insulating dielectric material can be in a wide range. The insulating layer has a band gap greater than 4 eV, and about 0.001 volts (V) / nanometer (nm), 0.01 V / nm, 0.05 V / nm, 0.1 V / nm 0.2 V / nm,. Includes materials characterized by breakdown field strengths greater than 3 V / nm, 0.4 V / nm, 0.5 V / nm, 1 V / nm, or 10 V / nm. The material of the polarization layer has a dielectric constant ε pol that can be in a wide range. In some cases, ε pol is at least about 100, 200, 300, 400, 500, 1000, 2000, 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10,000 or 100,000.
本発明では、固体絶縁誘電体層は、使用される材料および製造手順に応じて、アモルファス層と結晶固体層との間の範囲において異なる構造を有することができる。開示されたコンデンサの一実施形態では、絶縁層は、酸化物、窒化物、酸窒化物およびフッ化物から選択される材料を含む。開示されたコンデンサの別の実施形態では、絶縁層は、SiO2、HFO2、Al2O3またはSi3N4から選択される材料を含む。開示されるコンデンサの一実施形態では、絶縁層は、一般構造式I:
本発明の別の実施形態において、修飾官能基は、アルキル、アリール、置換アルキル、置換アリール、およびそれらの任意の組み合わせを含むリストから選択される。修飾官能基は、製造段階での有機化合物の溶解性と、コンデンサの固体絶縁層のさらなる絶縁特性とを提供する。本発明のさらに別の実施形態では、絶縁層は、フッ素化アルキル、ポリエチレン、ケブラー、ポリ(フッ化ビニリデン−ヘキサフルオロプロピレン)、ポリプロピレン、フッ素化ポリプロピレン、ポリジメチルシロキサンを含むリストから選択されるポリマー材料を含む。本発明のさらに別の実施形態では、絶縁層は、表2に示す構造44〜49から選択される水溶性ポリマーに基づいて形成されたポリマー材料を含む。
本発明の別の実施形態では、絶縁層は、表3に示す構造50〜55から選択される有機溶媒に可溶なポリマーに基づいて形成されたポリマー材料を含む。
本発明の一実施形態では、分極層は結晶質である。本発明の一実施形態では、分極層は、導電性オリゴマーのナノ粒子を含む。本発明の別の実施形態では、導電性オリゴマーの縦軸は、電極表面に対して主に垂直に向けられる。本発明の1つの実施形態において、導電性オリゴマーは、表4に示す構造式57〜63のうちの1つに対応する以下の構造式を含むリストから選択される。
本発明の別の実施形態では、電極は銅からなり、数mは1であり、絶縁層Aの誘電材料はポリエチレンであり、分極層Bの材料は微分散PANI−DBSA/PAAドデシルベンゼンスルホネート(DBSA)の存在下でのポリアクリル酸(PAA)の水性分散液中のアニリンの現場重合を用いて合成されたものであり、複合体中のPANI対PAAの比は20重量%絶縁層の厚さはdins=25nm、分極層の厚さdpol=10mmである。本発明のさらに別の実施形態では、電極は銅からなり、数mは1に等しく、絶縁層Aの誘電材料はポリエチレンであり、分極層Bの材料はポリ(N−ビニルピロリドン)(PVP)であり、絶縁層の厚さはdins=25nmであり、分極層の厚さdcond=50μmである。本発明の別の実施形態において、分極層は、ドデシルベンゼンスルホネート(DBSA)、ポリオキシエチレングリコールアルキルエーテル、ポリオキシプロピレングリコールアルキルエーテル、ポリオキシエチレングリコールオクチルフェノールエーテル、ポリオキシエチレングリコールソルビタンアルキルエステル、ソルビタンアルキルエステル、ドデシルジメチルアミンオキシドである。 In another embodiment of the present invention, the electrode is made of copper, the number m is 1, the dielectric material of the insulating layer A is polyethylene, and the material of the polarizing layer B is a finely dispersed PANI-DBSA / PAA dodecylbenzenesulfonate ( Synthesized using in situ polymerization of aniline in an aqueous dispersion of polyacrylic acid (PAA) in the presence of DBSA), the ratio of PANI to PAA in the composite was 20% by weight of insulating layer thickness The thickness is d ins = 25 nm, and the thickness of the polarization layer d pol = 10 mm. In yet another embodiment of the invention, the electrode is made of copper, the number m is equal to 1, the dielectric material of the insulating layer A is polyethylene, and the material of the polarizing layer B is poly (N-vinylpyrrolidone) (PVP). The thickness of the insulating layer is d ins = 25 nm, and the thickness of the polarization layer d cond = 50 μm. In another embodiment of the present invention, the polarizing layer comprises dodecylbenzene sulfonate (DBSA), polyoxyethylene glycol alkyl ether, polyoxypropylene glycol alkyl ether, polyoxyethylene glycol octyl phenol ether, polyoxyethylene glycol sorbitan alkyl ester, sorbitan. Alkyl ester, dodecyldimethylamine oxide.
また、本発明は、上記のコンデンサの製造方法を提供する。開示された方法の一実施形態では、多層構造の形成のステップ(b)は、絶縁材料の溶液の塗布と分極材料の溶液の塗布の交互のステップを含み、両方の塗布ステップの後には、乾燥させて固体絶縁層および分極層を形成するステップを有し、多層構造の形成が完了するまで前記の交互のステップが繰り返され、最初の層および最後の層が電極に直接接触するように絶縁層が形成される。開示された方法の別の実施形態では、多層構造の形成のステップ(b)は、絶縁材料の溶融物の塗布と分極材料の溶融物の塗布の交互のステップを含み、両方の塗布工程の後には、冷却して固体の絶縁層および分極層を形成するステップを有し、多層構造の形成が完了するまで前記の交互のステップが繰り返され、最初の層および最後の層が電極と直接接触するように絶縁層が形成される。開示された方法のさらに別の実施形態では、固体多層構造を形成するステップ(b)は、交互の分極材料および絶縁性誘電材料を連続して含む層のセットを基板上に共押出しするステップを含み、その後には、乾燥させて固体多層構造を形成するステップを有する。開示された方法のさらに別の実施形態では、前記の固体多層構造を形成するステップは、分極材料と絶縁性誘電材料との交互溶融物を連続的に含む層のセットを共押出するステップを含み、その後には、冷却して固体の多層構造を形成するステップを有する。また、本発明は、(d)両電極上に絶縁層を被覆するステップと、(e)一方の電極上に多層構造を被覆して第2の電極を多層構造に被覆するステップとを含む、上記のコンデンサの製造方法を提供する。 The present invention also provides a method for manufacturing the above capacitor. In one embodiment of the disclosed method, step (b) of forming the multilayer structure comprises alternating steps of applying a solution of insulating material and applying a solution of polarizing material, and after both application steps, drying Forming a solid insulating layer and a polarizing layer, and the alternating steps are repeated until the formation of the multilayer structure is completed, so that the first layer and the last layer are in direct contact with the electrode. Is formed. In another embodiment of the disclosed method, the step (b) of forming the multilayer structure comprises alternating steps of applying a melt of insulating material and applying a melt of polarizing material, after both application steps. Has a step of cooling to form a solid insulating layer and a polarizing layer, and the alternating steps described above are repeated until the formation of the multilayer structure is complete, with the first and last layers in direct contact with the electrode Thus, an insulating layer is formed. In yet another embodiment of the disclosed method, the step (b) of forming a solid multilayer structure comprises co-extruding onto the substrate a set of layers comprising successive alternating polarization materials and insulating dielectric materials. Including, and thereafter, drying to form a solid multilayer structure. In yet another embodiment of the disclosed method, forming the solid multilayer structure includes coextruding a set of layers that continuously comprise alternating melts of polarizing and insulating dielectric materials. Thereafter, it has a step of cooling to form a solid multilayer structure. Further, the present invention includes (d) a step of coating an insulating layer on both electrodes, and (e) a step of coating a multilayer structure on one electrode and coating a second electrode on the multilayer structure. A method for manufacturing the above capacitor is provided.
実施例1
図2は、電極1および2と、分極層(5)で分離された絶縁誘電体(3および4)の2つの絶縁層を含む固体多層構造を含む開示されたエネルギー蓄積デバイスの実施形態を示す。本発明のこの実施形態では、ドデシルベンゼンスルホネート(DBSA)の存在下でのポリアクリル酸(PAA)の水性分散液中のアニリンの現場重合を用いて合成された、ポリアニリンとPANI−DBSA/PAAとの複合体が分極層の材質、ポリエチレンなどが絶縁性誘電体材料としてそれぞれ用いられる。絶縁層の厚さdinsは2.5nmである。電極10および11は銅からなる。ポリエチレンの誘電率は2.2に等しい(すなわち、εins= 2.2)。ポリアニリンとPANI−DBSA/PAAとの複合体は、誘電率εpolが100000であり、分子伝導性を有する導電層の厚さがdpol=1.0mmである。
Example 1
FIG. 2 shows an embodiment of the disclosed energy storage device comprising a solid multilayer
実施例2
図3は、電極6および7と、交互の絶縁層および分極層を含む固体多層構造を含む開示されたエネルギー蓄積デバイスの実施形態を示し、絶縁誘電材料(11、12、13、14)の層は分極層(8、9、10)で分離される。本発明のこの実施形態では、分極層の材料としてPANI−DBSA/PAA複合材料を使用し、絶縁誘電材料としてポリエチレンを使用する。絶縁層の厚さ=2.5〜1000nm。電極6および7は銅で作られている。ポリエチレンの誘電率は2.2(すなわち、εins=2.2)であり、絶縁破壊電圧Vbd=1ミリメートルの厚さで40キロボルトである。一実施形態では、分極層の材料は、100000に等しい誘電率εpolを有するポリアニリン(PANI)/ポリ(アクリル酸)(PAA)複合材料である。この例では、分極層の厚さdpol=1.0〜5.0mmである。
Example 2
FIG. 3 shows an embodiment of the disclosed energy storage device comprising electrodes 6 and 7 and a solid multilayer structure comprising alternating insulating and polarizing layers, wherein the layers of insulating dielectric material (11, 12, 13, 14) Are separated by polarization layers (8, 9, 10). In this embodiment of the present invention, a PANI-DBSA / PAA composite material is used as the material of the polarization layer, and polyethylene is used as the insulating dielectric material. Insulating layer thickness = 2.5-1000 nm. Electrodes 6 and 7 are made of copper. The dielectric constant of polyethylene is 2.2 (ie, ε ins = 2.2), and the dielectric breakdown voltage V bd = 1 millimeter is 40 kilovolts thick. In one embodiment, the material of the polarization layer is a polyaniline (PANI) / poly (acrylic acid) (PAA) composite material having a dielectric constant ε pol equal to 100,000. In this example, the polarization layer thickness d pol = 1.0 to 5.0 mm.
本発明を特定の好ましい実施形態を参照して詳細に説明してきたが、当業者であれば、特許請求の範囲の趣旨および範囲から逸脱することなく、様々な修正および改良がなされることができる。 Although the present invention has been described in detail with reference to certain preferred embodiments, various modifications and improvements can be made by those skilled in the art without departing from the spirit and scope of the claims. .
本発明の好ましい実施形態が本明細書に示され説明されてきたが、そのような実施形態が単なる例示として提供されることは、当業者には明らかであろう。本発明から逸脱することなく、当業者には数多くの変形、変更、および置換が可能である。本明細書に記載された本発明の実施形態に対する様々な代替物が、本発明の実施において採用され得ることを理解されたい。以下の特許請求の範囲は、本発明の範囲を定義し、これらの特許請求の範囲内の方法および構造およびそれらの均等物がそれによってカバーされることが意図される。 While preferred embodiments of the present invention have been shown and described herein, it will be apparent to those skilled in the art that such embodiments are provided by way of example only. Numerous variations, changes, and substitutions can be made by those skilled in the art without departing from the invention. It should be understood that various alternatives to the embodiments of the invention described herein can be employed in the practice of the invention. The following claims define the scope of the invention and are intended to cover the methods and structures within these claims and their equivalents.
Claims (31)
第2の電極と、
前記第1の電極と前記第2の電極との間に配置された固体多層構造と、
を有し、
前記固体多層構造は、前記第1および第2の電極と接触しており、前記電極に平行に配置された層を含み、前記固体多層構造は、前記層(A−B)m−Aのシーケンスを有し、ただし、Aは絶縁層であり、Bは絶縁体マトリックス中に導電性ナノ粒子の微小分散体を有するコロイド状複合体を含有する分極層であり、mは1以上の数であり、
Aは1ナノメートル(nm)当たり少なくとも約0.05ボルト(V)の破壊電圧を有し、
Bは少なくとも約100の誘電率を有する
ことを特徴とするコンデンサ。 A first electrode;
A second electrode;
A solid multilayer structure disposed between the first electrode and the second electrode;
Have
The solid multilayer structure is in contact with the first and second electrodes and includes a layer disposed parallel to the electrode, the solid multilayer structure comprising a sequence of the layers (AB) m -A Where A is an insulating layer, B is a polarization layer containing a colloidal composite having a fine dispersion of conductive nanoparticles in an insulator matrix, and m is a number of 1 or more. ,
A has a breakdown voltage of at least about 0.05 volts (V) per nanometer (nm);
A capacitor wherein B has a dielectric constant of at least about 100.
a)第1の電極として機能する導電性基板を準備するステップと、
b)前記第1の電極に隣接して固体多層構造を形成するステップと、
c)多層構造に隣接する第2の電極を形成するステップとを有し、
ただし、多層構造の形成ステップは、絶縁層および分極層の適用の交互操作または絶縁層および分極層の同時押出し操作を含み、個々の絶縁層は、ナノメートル(nm)当たり少なくとも約0.05ボルトの誘電率を有し、個々の分極層は、少なくとも約100の誘電率を有することを特徴とするコンデンサの製造方法。 A method for manufacturing a capacitor, comprising:
a) providing a conductive substrate that functions as a first electrode;
b) forming a solid multilayer structure adjacent to the first electrode;
c) forming a second electrode adjacent to the multilayer structure;
However, the step of forming the multilayer structure includes alternating operations of applying insulating layers and polarizing layers or co-extrusion operations of insulating layers and polarizing layers, wherein each insulating layer is at least about 0.05 volts per nanometer (nm) And the individual polarization layers have a dielectric constant of at least about 100.
a)第1および第2の電極上に絶縁層をコーティングするステップと、
b)第1および第2の電極の一方の絶縁層上に多層構造をコーティングし、第1および第2の電極の他方を多層構造に積層し、
個々の絶縁層は少なくとも約0.05ボルト/ナノメートル(nm)の破壊電圧を有し、多層構造は少なくとも約100の誘電率を有する分極層を含むことを特徴とするコンデンサの製造方法。
A method for manufacturing a capacitor, comprising:
a) coating an insulating layer on the first and second electrodes;
b) coating a multilayer structure on one insulating layer of the first and second electrodes, laminating the other of the first and second electrodes in the multilayer structure,
A method of manufacturing a capacitor, wherein each insulating layer has a breakdown voltage of at least about 0.05 volts / nanometer (nm) and the multilayer structure includes a polarizing layer having a dielectric constant of at least about 100.
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KR20170102209A (en) | 2017-09-08 |
US20160314901A1 (en) | 2016-10-27 |
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SG11201703441YA (en) | 2017-05-30 |
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AU2015343211A1 (en) | 2017-04-27 |
CA2965870A1 (en) | 2016-05-12 |
WO2016073522A1 (en) | 2016-05-12 |
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