JP2017525284A - Ｉ／ｏインターフェース信号の動的な電圧調整 - Google Patents

Ｉ／ｏインターフェース信号の動的な電圧調整 Download PDF

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Publication number
JP2017525284A
JP2017525284A JP2017501713A JP2017501713A JP2017525284A JP 2017525284 A JP2017525284 A JP 2017525284A JP 2017501713 A JP2017501713 A JP 2017501713A JP 2017501713 A JP2017501713 A JP 2017501713A JP 2017525284 A JP2017525284 A JP 2017525284A
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JP
Japan
Prior art keywords
voltage
temperature
swing
interface
signal
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Pending
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JP2017501713A
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English (en)
Japanese (ja)
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JP2017525284A5 (enExample
Inventor
パク、ヘ・ジュン
チュン、デクスター・タミオ
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Qualcomm Inc
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Qualcomm Inc
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Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of JP2017525284A publication Critical patent/JP2017525284A/ja
Publication of JP2017525284A5 publication Critical patent/JP2017525284A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Sources (AREA)
  • Logic Circuits (AREA)
JP2017501713A 2014-07-14 2015-05-18 Ｉ／ｏインターフェース信号の動的な電圧調整 Pending JP2017525284A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/330,464 2014-07-14
US14/330,464 US9461626B2 (en) 2014-07-14 2014-07-14 Dynamic voltage adjustment of an I/O interface signal
PCT/US2015/031433 WO2016010623A1 (en) 2014-07-14 2015-05-18 Dynamic voltage adjustment of an i/o interface signal

Publications (2)

Publication Number Publication Date
JP2017525284A true JP2017525284A (ja) 2017-08-31
JP2017525284A5 JP2017525284A5 (enExample) 2018-06-07

Family

ID=53404851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017501713A Pending JP2017525284A (ja) 2014-07-14 2015-05-18 Ｉ／ｏインターフェース信号の動的な電圧調整

Country Status (5)

Country Link
US (1) US9461626B2 (enExample)
EP (1) EP3170177A1 (enExample)
JP (1) JP2017525284A (enExample)
CN (1) CN106796566A (enExample)
WO (1) WO2016010623A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105283854B (zh) * 2013-06-11 2019-05-07 株式会社索思未来 半导体集成电路及包括该半导体集成电路的数据接口系统
US11487341B2 (en) * 2018-08-09 2022-11-01 Nvidia Corporation Techniques for configuring a processor to execute instructions efficiently
CN114489235B (zh) * 2022-01-18 2024-09-27 上海天数智芯半导体有限公司 一种用于异常温度处理的芯片频率动态调节方法及系统
WO2025250808A1 (en) 2024-05-29 2025-12-04 The Brigham And Women’S Hospital, Inc. Anti-crispr delivery compositions and methods

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002045268A1 (en) * 2000-11-30 2002-06-06 Hitachi, Ltd Semiconductor integrated circuit and data processing system
US20060066351A1 (en) * 2004-09-15 2006-03-30 Lau Benedict C Scalable I/O signaling topology using source-calibrated reference voltages
WO2008076700A2 (en) * 2006-12-13 2008-06-26 Rambus Inc. Interface with variable data rate
JP2008227696A (ja) * 2007-03-09 2008-09-25 Nec Corp インタフェース回路および信号出力調整方法
JP2010178262A (ja) * 2009-02-02 2010-08-12 Fujitsu Semiconductor Ltd ドライバストレングス調整回路、半導体集積回路、及びドライバストレングスの調整方法

Family Cites Families (14)

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Publication number Priority date Publication date Assignee Title
US6928559B1 (en) 1997-06-27 2005-08-09 Broadcom Corporation Battery powered device with dynamic power and performance management
US6218901B1 (en) 1999-10-12 2001-04-17 International Business Machines Corporation High speed differential output driver with increased voltage swing and predrive common mode adjustment
US7941675B2 (en) * 2002-12-31 2011-05-10 Burr James B Adaptive power control
US6600346B1 (en) 2002-07-30 2003-07-29 National Semiconductor Corporation Low voltage differential swing (LVDS) signal driver circuit with low PVT and load sensitivity
US7583555B2 (en) 2003-04-11 2009-09-01 Qualcomm Incorporated Robust and Efficient dynamic voltage scaling for portable devices
US20060072241A1 (en) * 2004-09-30 2006-04-06 Feliss Norbert A System, method, and apparatus for a wireless hard disk drive
US7301410B2 (en) 2006-03-07 2007-11-27 International Business Machines Corporation Hybrid current-starved phase-interpolation circuit for voltage-controlled devices
US7405594B1 (en) 2006-06-16 2008-07-29 Integrated Device Technology, Inc. Current mode driver with constant voltage swing
US7616509B2 (en) * 2007-07-13 2009-11-10 Freescale Semiconductor, Inc. Dynamic voltage adjustment for memory
KR100889314B1 (ko) * 2007-09-10 2009-03-18 주식회사 하이닉스반도체 버퍼 회로
US8143911B2 (en) 2008-03-31 2012-03-27 Intel Corporation Input/output driver swing control and supply noise rejection
US8055477B2 (en) 2008-11-20 2011-11-08 International Business Machines Corporation Identifying deterministic performance boost capability of a computer system
CN102063144B (zh) * 2010-11-17 2014-08-13 东南大学 一种面向低功耗应用的动态电压调节系统及实现方法
US8578222B2 (en) * 2011-02-17 2013-11-05 Qualcomm Incorporated SerDes power throttling as a function of detected error rate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002045268A1 (en) * 2000-11-30 2002-06-06 Hitachi, Ltd Semiconductor integrated circuit and data processing system
US20060066351A1 (en) * 2004-09-15 2006-03-30 Lau Benedict C Scalable I/O signaling topology using source-calibrated reference voltages
WO2008076700A2 (en) * 2006-12-13 2008-06-26 Rambus Inc. Interface with variable data rate
JP2008227696A (ja) * 2007-03-09 2008-09-25 Nec Corp インタフェース回路および信号出力調整方法
JP2010178262A (ja) * 2009-02-02 2010-08-12 Fujitsu Semiconductor Ltd ドライバストレングス調整回路、半導体集積回路、及びドライバストレングスの調整方法

Also Published As

Publication number Publication date
CN106796566A (zh) 2017-05-31
WO2016010623A1 (en) 2016-01-21
EP3170177A1 (en) 2017-05-24
US20160013774A1 (en) 2016-01-14
US9461626B2 (en) 2016-10-04

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