JP2017516226A5 - - Google Patents
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- Publication number
- JP2017516226A5 JP2017516226A5 JP2016567367A JP2016567367A JP2017516226A5 JP 2017516226 A5 JP2017516226 A5 JP 2017516226A5 JP 2016567367 A JP2016567367 A JP 2016567367A JP 2016567367 A JP2016567367 A JP 2016567367A JP 2017516226 A5 JP2017516226 A5 JP 2017516226A5
- Authority
- JP
- Japan
- Prior art keywords
- gpr
- instruction
- value
- gprs
- pipeline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 12
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/275,047 US9747104B2 (en) | 2014-05-12 | 2014-05-12 | Utilizing pipeline registers as intermediate storage |
| US14/275,047 | 2014-05-12 | ||
| PCT/US2015/026850 WO2015175173A1 (en) | 2014-05-12 | 2015-04-21 | Utilizing pipeline registers as intermediate storage |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017516226A JP2017516226A (ja) | 2017-06-15 |
| JP2017516226A5 true JP2017516226A5 (enExample) | 2017-11-09 |
| JP6301501B2 JP6301501B2 (ja) | 2018-03-28 |
Family
ID=53267556
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016567367A Expired - Fee Related JP6301501B2 (ja) | 2014-05-12 | 2015-04-21 | パイプラインレジスタを中間ストレージとして利用すること |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9747104B2 (enExample) |
| EP (1) | EP3143495B1 (enExample) |
| JP (1) | JP6301501B2 (enExample) |
| KR (1) | KR101863483B1 (enExample) |
| CN (1) | CN106462391B (enExample) |
| WO (1) | WO2015175173A1 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102299008B1 (ko) * | 2014-10-16 | 2021-09-06 | 삼성전자주식회사 | 어플리케이션 프로세서와 이를 포함하는 반도체 시스템 |
| US11144367B2 (en) | 2019-02-08 | 2021-10-12 | International Business Machines Corporation | Write power optimization for hardware employing pipe-based duplicate register files |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6145075A (en) | 1998-02-06 | 2000-11-07 | Ip-First, L.L.C. | Apparatus and method for executing a single-cycle exchange instruction to exchange contents of two locations in a register file |
| US6052769A (en) | 1998-03-31 | 2000-04-18 | Intel Corporation | Method and apparatus for moving select non-contiguous bytes of packed data in a single instruction |
| US6094716A (en) | 1998-07-14 | 2000-07-25 | Advanced Micro Devices, Inc. | Register renaming in which moves are accomplished by swapping rename tags |
| US6745319B1 (en) * | 2000-02-18 | 2004-06-01 | Texas Instruments Incorporated | Microprocessor with instructions for shuffling and dealing data |
| JP3719509B2 (ja) * | 2002-04-01 | 2005-11-24 | 株式会社ソニー・コンピュータエンタテインメント | シリアル演算パイプライン、演算装置、算術論理演算回路およびシリアル演算パイプラインによる演算方法 |
| US6934831B2 (en) * | 2002-05-09 | 2005-08-23 | International Business Machines Corporation | Power reduction mechanism for floating point register file reads |
| JP2006522398A (ja) * | 2003-03-19 | 2006-09-28 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | パイプライン型命令プロセッサにおけるバイパスの使用 |
| US7337305B2 (en) * | 2003-11-24 | 2008-02-26 | Sun Microsystems, Inc. | Method and pipeline architecture for processing multiple swap requests to reduce latency |
| GB2409059B (en) | 2003-12-09 | 2006-09-27 | Advanced Risc Mach Ltd | A data processing apparatus and method for moving data between registers and memory |
| US7613905B2 (en) * | 2006-04-06 | 2009-11-03 | Texas Instruments Incorporated | Partial register forwarding for CPUs with unequal delay functional units |
| US20120254591A1 (en) * | 2011-04-01 | 2012-10-04 | Hughes Christopher J | Systems, apparatuses, and methods for stride pattern gathering of data elements and stride pattern scattering of data elements |
| WO2013101323A1 (en) | 2011-12-30 | 2013-07-04 | Intel Corporation | Micro-architecture for eliminating mov operations |
| US9575754B2 (en) | 2012-04-16 | 2017-02-21 | Apple Inc. | Zero cycle move |
-
2014
- 2014-05-12 US US14/275,047 patent/US9747104B2/en active Active
-
2015
- 2015-04-21 KR KR1020167031480A patent/KR101863483B1/ko active Active
- 2015-04-21 EP EP15724805.5A patent/EP3143495B1/en active Active
- 2015-04-21 CN CN201580024902.1A patent/CN106462391B/zh not_active Expired - Fee Related
- 2015-04-21 JP JP2016567367A patent/JP6301501B2/ja not_active Expired - Fee Related
- 2015-04-21 WO PCT/US2015/026850 patent/WO2015175173A1/en not_active Ceased
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