JP2017201651A - Method for manufacturing oxide semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing an oxide semiconductor thin film, which hard to cause the unevenness in thin film transistor quality owing to the increase of free carriers.SOLUTION: A method for manufacturing an oxide semiconductor according to the present invention is arranged to manufacture an oxide semiconductor on a surface of a substrate by sputtering, using a target including In, Ga, Zn, Sn or a combination thereof. The method comprises the steps of: growing a thin film on the substrate surface by atoms sputtered from the target; and exposing the thin film to active species including oxygen radicals produced by plasma. In the method, the film-growing step and the active species-exposure step are alternately repeated more than once. A sputtering time in the film-growing step is preferably 0.01-0.08 second for each sputtering. In the active species-exposure step, the active species exposure time is preferably 0.01-0.08 second for each exposure. The target may include In, Ga and Zn.SELECTED DRAWING: Figure 3

Description

  The present invention relates to an oxide semiconductor manufacturing method, an oxide semiconductor, and a thin film transistor.

  In recent years, thin film transistors using an amorphous oxide semiconductor have attracted attention. As such an oxide semiconductor, for example, an In—Ga—Zn—O thin film formed by a pulse laser deposition method or a sputtering deposition method is known (see Japanese Patent Application Laid-Open No. 2006-165529 and Non-Patent Document 1). A thin film transistor using this In—Ga—Zn—O thin film has a field effect mobility of 10 times or more that of an amorphous silicon thin film transistor. In addition, a thin film transistor using an In—Ga—Zn—O thin film has an SS (Subthreshold Swing) value representing the steepness of switching characteristics of about 0.1 V, and is excellent in switching characteristics.

  Further, since the amorphous oxide semiconductor can be formed at a low temperature, it can be formed on the surface of a flexible substrate such as a resin film. Furthermore, an amorphous oxide semiconductor is transparent because it has a large optical band gap. Therefore, amorphous oxide semiconductors are expected to be applied as switching elements for flexible displays and transparent displays.

  For such display applications, a thin film transistor formed using an amorphous oxide semiconductor is a normally-off type in which a channel is not formed when no voltage is applied to the gate, and a voltage is applied to the gate. It is necessary for a sufficient drain current to flow. In order to realize this, it is necessary to control the threshold voltage of the thin film transistor.

  However, in an oxide semiconductor manufactured by a conventional manufacturing method, free carriers in the oxide semiconductor increase due to unintentionally taken-in hydrogen atoms, and the carrier concentration increases. For example, the threshold voltage of a thin film transistor shifts. It is known that the quality of transistors varies (see Non-Patent Document 2).

  It is known that this increase in free carriers occurs after forming a passivation insulating film of a silicon oxide film and performing a heat treatment (annealing process) in forming a thin film transistor, for example (see Non-Patent Document 3). In other words, the passivation insulating film formed by CVD (Chemical Vapor Deposition) contains about 30 atomic% of hydrogen, so that the hydrogen in the passivation insulating film is oxidized by heat treatment performed at 200 ° C. or higher after the formation of the passivation insulating film. Move into a physical semiconductor. When the hydrogen that has moved into the oxide semiconductor is trapped in oxygen vacancies (oxygen vacancy) in the oxide semiconductor, free carriers (free electrons) are generated, whereby the carrier concentration of the oxide semiconductor changes. As a result, the quality of the thin film transistor varies. Therefore, an oxide semiconductor that can suppress variations in quality of thin film transistors is desired.

JP 2006-165529 A

Kenji Nomura et al., Nature, VOL432 (2004), p488-492. Hyo Jin Kim et al. Phys. D: Appl. Phys. VOL46 (2013) 055104, p. 1-6 Md Delwar Hossain Chowdhury et al., IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL62 (2015), p869-874

  The present invention has been made on the basis of the above-described circumstances, and an object of the present invention is to provide a method for manufacturing an oxide semiconductor thin film in which variation in quality due to an increase in free carriers due to hydrogen atom injection is unlikely to occur. An oxide semiconductor thin film and a thin film transistor using the oxide semiconductor thin film are provided.

  The invention made to solve the above problems is a method for manufacturing an oxide semiconductor on the surface of a substrate by a sputtering method using a target including In, Ga, Zn, Sn, or a combination thereof. A step of forming a thin film on the surface of the substrate by the sputtered atoms, and a step of irradiating the thin film with active species containing oxygen radicals generated by plasma, the film forming step and the active species irradiation step, Is repeated a plurality of times alternately.

  In the method for manufacturing an oxide semiconductor, a film formation process using atoms sputtered from a target including In, Ga, Zn, Sn, or a combination thereof and an active species irradiation process including oxygen radicals are alternately repeated. For this reason, the metal of the thin film formed in the film formation step and the highly reactive oxygen irradiated in the active species irradiation step are easily bonded, and the dangling bonds of oxygen in the formed oxide semiconductor are reduced. . As a result, free carriers due to hydrogen atom injection are less likely to occur in a subsequent process for forming a transistor, and variation in quality can be suppressed.

  As sputtering time in the said film-forming process, 0.01 second or more and 0.08 second or less are preferable per time. Moreover, as active species irradiation time in the said active species irradiation process, 0.01 second or more and 0.08 second or less per time are preferable. In this way, by setting the sputtering time within the above range, a thin film before irradiation with active species containing oxygen radicals is formed with an appropriate thickness. For this reason, in the said active species irradiation process, the coupling | bonding of the metal atom and oxygen atom by an oxygen radical can be formed more reliably and efficiently. In addition, by setting the irradiation time of the active species within the above range, it is possible to irradiate oxygen radicals sufficient for bonding between metal atoms and oxygen atoms while suppressing damage to the substrate. Accordingly, the effect of suppressing variation in the quality of the oxide semiconductor thin film due to the increase in free carriers due to hydrogen atom implantation is enhanced.

  The plasma may be generated by ionization of a gas containing an inert gas. As described above, by generating the plasma by ionization of the gas containing the inert gas, the controllability of the generation amount of oxygen radicals is improved. As a result, the effect of suppressing variation in the quality of the oxide semiconductor thin film due to the increase in free carriers due to hydrogen atom implantation can be obtained more reliably.

  The target may contain In, Ga, and Zn. As described above, when the target contains In, Ga, and Zn, an In—Ga—Zn—O thin film with few free carriers due to hydrogen atom implantation can be manufactured. As a result, variation in quality caused by an increase in free carriers in the In—Ga—Zn—O thin film having a large variation in quality due to an increase in free carriers can be suppressed.

Another invention made to solve the above problems is an oxide semiconductor thin film containing In, Ga, Zn, Sn, or a combination thereof, and has a carrier concentration of 1 × 10 ¹² cm ⁻³ or more and 5 × 10 ^13. cm ^-3 or less, the absolute value of the difference with respect to the threshold voltage before the heat treatment threshold voltage in the MOS structure 30 minutes after heat treatment at 300 ° C. or higher 320 ° C. or less, is less than 8V.

  Since the oxide semiconductor thin film has a carrier concentration in the above range, a drain current when the thin film transistor is formed can be secured. Further, in the oxide semiconductor thin film, the difference in threshold voltage due to heat treatment is less than or equal to the above upper limit, so that an increase in free carriers due to hydrogen atom implantation is small. Therefore, the oxide semiconductor thin film can suppress the threshold voltage from being shifted to the negative side, conductive, and the occurrence of hysteresis of the threshold voltage when the gate voltage is applied a plurality of times. Therefore, variation in quality of the thin film transistor using the oxide semiconductor thin film hardly occurs.

  The present invention includes a thin film transistor using the oxide semiconductor thin film. Since the oxide semiconductor thin film is used for the thin film transistor, variation in transistor quality hardly occurs even during heat treatment during manufacture.

Here, “carrier concentration” refers to the carrier concentration obtained by Hall effect measurement. Further, “threshold voltage in MOS structure” Vth [V] is a semiconductor Fermi level in a MOS (Metal-Oxide-Semiconductor) structure in which a silicon oxide film having an average thickness of 250 nm is formed on the surface of a semiconductor thin film as φ. _f [eV], flat band shift amount is V _FB [eV], dielectric constant is ε, impurity density is N [m ⁻³ ], insulating film capacitance is C _ox [F], and electronic charge is q [C]. When it does, the quantity represented by the following formula | equation (1) is pointed out.

  As described above, by using the method for manufacturing an oxide semiconductor thin film of the present invention, an oxide semiconductor thin film in which quality variation due to an increase in free carriers due to hydrogen atom injection hardly occurs can be obtained. In addition, since the oxide semiconductor thin film of the present invention is less likely to cause quality variation due to an increase in free carriers due to hydrogen atom injection, a thin film transistor suitable for application to a display can be manufactured.

It is typical sectional drawing which shows the thin-film transistor of one Embodiment of this invention formed in the board | substrate surface. It is a schematic diagram which shows the manufacturing apparatus of the oxide semiconductor thin film of one Embodiment of this invention. It is a flowchart which shows the procedure of the manufacturing method of the oxide semiconductor thin film of one Embodiment of this invention. It is a graph which shows the example of a measurement result of the Id-Vg characteristic of the thin-film transistor of an Example. It is a graph which shows the result of the temperature-programmed desorption gas mass spectrometry of Example 4. 6 is a graph showing the results of thermal desorption gas mass spectrometry of Reference Example 1.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings as appropriate.

[Thin film transistor]
The thin film transistor 1 shown in FIG. 1 can be used for manufacturing a display device such as a liquid crystal display or an organic EL display. The thin film transistor 1 is a bottom-gate transistor formed on the surface of the substrate X. The thin film transistor 1 includes a gate electrode 2, a gate insulating film 3, an oxide semiconductor thin film 4, an ESL (Etch Stop Layer) protective film 5, a source and drain electrode 6, a passivation insulating film 7, and a conductive film 8.

(substrate)
Although it does not specifically limit as the board | substrate X, For example, the board | substrate used for a liquid crystal display device is used. Examples of such a substrate X include a transparent substrate such as a glass substrate and a silicon resin substrate. The glass used for the glass substrate is not particularly limited, and examples thereof include alkali-free glass, high strain point glass, and soda lime glass. In the case of a self-luminous display such as an organic EL display, a metal substrate such as a metal foil or a heat-resistant opaque resin substrate such as an imide resin can be used as the substrate X.

  Although the average thickness of the board | substrate X is suitably determined according to the liquid crystal display device etc. which are used, it can be 0.5 mm or more and 1.5 mm or less, for example. The size and shape of the substrate X are determined according to the size of the liquid crystal display device used, and can be, for example, a circular shape having a diameter of 1 inch to 100 inches.

(Gate electrode)
The gate electrode 2 is formed on the surface of the substrate X and has conductivity. The thin film constituting the gate electrode 2 is not particularly limited, and examples thereof include metal thin films such as Al, Cu, and Mo, thin films of these alloys, and transparent conductive films such as ITO (Indium Tin Oxide) and ZnO. The gate electrode 2 may have a single-layer structure of these metal thin films, or a multilayer structure in which two or more kinds of metal thin films are stacked.

  The shape of the gate electrode 2 is not particularly limited, but from the viewpoint of controllability of the channel length and channel width of the thin film transistor 1, a planar view shape in which the channel length direction and the channel width direction of the thin film transistor 1 are vertically and horizontally is preferable. . The gate electrode 2 may have any size as long as the channel length and channel width of the thin film transistor 1 can be secured. For example, the channel length direction of the thin film transistor 1 is 30 μm or more and 50 μm or less, and the channel width direction of the thin film transistor 1 is It can be 300 μm or more and 500 μm or less. Here, the channel length direction of the thin film transistor 1 is a direction in which the source electrode 6a and the drain electrode 6b of the thin film transistor 1 are opposed to each other. The channel width direction of the thin film transistor 1 is a direction orthogonal to the channel length direction of the thin film transistor 1 and parallel to the surface of the substrate X.

  The lower limit of the average thickness of the gate electrode 2 is preferably 50 nm, and more preferably 80 nm. On the other hand, the upper limit of the average thickness of the gate electrode 2 is preferably 200 nm, and more preferably 150 nm. When the average thickness of the gate electrode 2 is less than the lower limit, the resistance of the gate electrode 2 is large, so that power consumption at the gate electrode 2 may increase or disconnection may easily occur. On the other hand, when the average thickness of the gate electrode 2 exceeds the above upper limit, it is difficult to planarize the gate insulating film 3 and the like laminated on the surface side of the gate electrode 2, and the characteristics of the thin film transistor 1 may be deteriorated. .

  In order to improve the coverage of the gate insulating film 3, the cross section in the thickness direction of the gate electrode 2 is preferably tapered so as to expand toward the substrate X. The taper angle when the gate electrode 2 is tapered is preferably 30 ° or more and 40 ° or less.

(Gate insulation film)
The gate insulating film 3 is laminated on the surface side of the substrate X so as to cover the gate electrode 2. The thin film constituting the gate insulating film 3 is not particularly limited, and examples thereof include a silicon oxide film, a silicon nitride film, a silicon oxynitride film, and a metal oxide film such as Al ₂ O ₃ and Y ₂ O ₃ . The gate insulating film 3 may have a single-layer structure of these thin films or a multilayer structure in which two or more kinds of thin films are stacked. Among these, a silicon oxide film having a relatively low hydrogen concentration is preferable. Thus, by using the gate insulating film 3 as a silicon oxide film, carrier generation due to hydrogen injection into the oxide semiconductor thin film 4 can be suppressed.

  The shape of the gate insulating film 3 is not limited as long as the gate electrode 2 is covered. For example, the gate insulating film 3 may cover the entire surface of the substrate X.

  The lower limit of the average thickness of the gate insulating film 3 is preferably 100 nm, and more preferably 150 nm. Moreover, as an upper limit of the average thickness of the gate insulating film 3, 350 nm is preferable and 300 nm is more preferable. When the average thickness of the gate insulating film 3 is less than the lower limit, the withstand voltage of the gate insulating film 3 is insufficient, and the gate insulating film 3 may break down due to application of the gate voltage. Conversely, when the average thickness of the gate insulating film 3 exceeds the above upper limit, the capacity of the capacitor formed between the gate electrode 2 and the oxide semiconductor thin film 4 is insufficient, and the drain current may be insufficient. There is.

(Oxide semiconductor thin film)
The oxide semiconductor thin film 4 is stacked on the surface of the gate insulating film 3 and is disposed immediately above the gate electrode 2. The oxide semiconductor thin film 4 includes In, Ga, Zn, Sn, or a combination thereof. Examples of such an oxide semiconductor thin film 4 include In—Ga—Zn—O, In—Zn—Sn—O, In—Zn—O, Zn—Sn—O, Ga—Zn—Sn—O, and Zn—. The thin film containing O etc. can be mentioned. In particular, an In—Ga—Zn—O thin film that has a higher field effect mobility than an amorphous silicon thin film transistor and is excellent in SS value is preferable. In the case where an In—Ga—Zn—O thin film is used as the oxide semiconductor thin film 4, from the viewpoint of characteristics of the obtained thin film transistor 1, the atomic ratio of In, Ga, and Zn is In: Ga: Zn = 1: 1: 1 or In: Ga: Zn = 2: 2: 1 is preferred.

  As a minimum of the total metal content of In, Ga, Zn, and Sn which the said oxide semiconductor thin film 4 contains, 35 mol% is preferable and 40 mol% is more preferable. On the other hand, the upper limit of the total metal content is preferably 60 mol%, more preferably 55 mol%. When the said total metal content is less than the said minimum, there exists a possibility that the ratio of the O atom of the said oxide semiconductor thin film 4 may increase, and the free carrier resulting from hydrogen atom injection may increase. On the contrary, when the total metal content exceeds the upper limit, the oxide semiconductor thin film 4 may become a conductor.

  The shape of the oxide semiconductor thin film 4 in plan view is not particularly limited, but the same shape as the gate electrode 2 is preferable from the viewpoint of controllability of the channel length and channel width of the thin film transistor 1. The size of the oxide semiconductor thin film 4 in plan view may be any size as long as the channel length and channel width of the thin film transistor 1 can be ensured. For example, the channel length direction of the thin film transistor 1 is 25 μm to 45 μm. One channel width direction can be 290 μm or more and 490 μm or less.

  In addition, the size of the oxide semiconductor thin film 4 in plan view is preferably smaller than the size of the gate electrode 2 in plan view so that the oxide semiconductor thin film 4 is reliably disposed immediately above the gate electrode 2. The lower limit of the difference between the side lengths of the oxide semiconductor thin film 4 and the gate electrode 2 in the channel direction and the channel width direction is preferably 2 nm and more preferably 4 nm. On the other hand, the upper limit of the difference between the side lengths is preferably 10 nm, and more preferably 8 nm. When the difference in the length of the side is less than the lower limit, a part of the oxide semiconductor thin film 4 comes off from directly above the gate electrode 2 due to patterning deviation or the like, and as a result, the flatness of the oxide semiconductor thin film 4 is reduced. There is a risk that the characteristics of the thin film transistor 1 may deteriorate. On the contrary, when the difference in the length of the side exceeds the upper limit, the thin film transistor 1 may be unnecessarily large.

The average thickness of the oxide semiconductor thin film 4 can be determined from the conditions that allow the drain current to be turned off when used as a switching element. Specifically, the inside of the oxide semiconductor thin film 4 is preferably completely depleted by applying a gate voltage. For this purpose, when the dielectric constant of the insulating film is ε _OX , the dielectric constant of the semiconductor is ε _AOS , the Fermi level of the semiconductor is φ _f [eV], and the electronic charge is q [C], the oxide semiconductor thin film The average thickness t _ch [m] of 4 may satisfy the relationship of the following formula (2) with respect to the carrier concentration N _C [m ⁻³ ]. The average thickness of the oxide semiconductor thin film 4 is 20 nm or more from the viewpoint of the relationship between the following formula (2) and the carrier concentration described later and the control accuracy of the film thickness distribution when the oxide semiconductor thin film 4 is manufactured. It can be 50 nm or less.

  Note that, in order to improve the coverage of the source and drain electrodes 6, the cross section in the thickness direction of the oxide semiconductor thin film 4 is preferably tapered to expand toward the substrate X. The taper angle when the oxide semiconductor thin film 4 is tapered is preferably 30 ° or more and 40 ° or less.

The lower limit of the carrier concentration of the oxide semiconductor thin film 4 is 1 × 10 ¹² cm ⁻³ , more preferably 2 × 10 ¹² cm ⁻³ , and further preferably 4 × 10 ¹² cm ⁻³ . On the other hand, the upper limit of the carrier concentration of the oxide semiconductor thin film 4 is 5 × ¹⁰ 13 ^{cm -3,} more preferably 3 × ¹⁰ 13 ^{cm -3,} more preferably 1 × ¹⁰ 13 ^{cm -3.} When the carrier concentration of the oxide semiconductor thin film 4 is less than the lower limit, the drain current of the thin film transistor 1 may be insufficient. On the other hand, when the carrier concentration of the oxide semiconductor thin film 4 exceeds the upper limit, there are many free carriers due to hydrogen atom implantation, and the quality of the oxide semiconductor thin film 4 may easily vary. In particular, when the carrier concentration of the oxide semiconductor thin film 4 exceeds 10 ¹⁸ cm ⁻³ , it becomes difficult to completely deplete the inside of the oxide semiconductor thin film 4, and the threshold voltage shifts to the negative side. As a result, it may not function as a switching element.

  The upper limit of the absolute value (| V0−V1 |) of the difference between the threshold voltage V1 after the heat treatment for 30 minutes at 300 ° C. to 320 ° C. and the threshold voltage V0 before the heat treatment in the MOS structure of the oxide semiconductor thin film 4 is 8V. 6V is more preferable, and 5V is more preferable. When the absolute value of the difference between the threshold voltages exceeds the upper limit, quality variations may occur during the manufacture of the thin film transistor. On the other hand, the lower limit of the absolute value of the threshold voltage difference is 0V.

The lower limit of the density of the oxide semiconductor thin film 4 is preferably 5.8 g / cm ^3, more preferably 5.9 g / cm ^3, more preferably 6 g / cm ^3. When the density of the oxide semiconductor thin film 4 is less than the lower limit, defects in the film increase, and the field effect mobility of the thin film transistor 1 may be reduced. On the other hand, the upper limit of the density of the oxide semiconductor thin film 4 is not particularly limited, but the density of the oxide semiconductor thin film 4 is usually 10 g / cm ³ or less.

The lower limit of the Hall mobility of the oxide semiconductor thin film 4 is preferably ^{5 cm} 2 / Vs, more preferably 10 cm ² / Vs. When the hole mobility of the oxide semiconductor thin film 4 is less than the lower limit, the switching characteristics of the thin film transistor 1 may be deteriorated. On the other hand, the upper limit of the hole mobility of the oxide semiconductor thin film 4 is not particularly limited, but the hole mobility of the oxide semiconductor thin film 4 is usually 20 cm ² / Vs or less. Here, “Hall mobility” refers to carrier mobility obtained by Hall effect measurement.

(ESL protective film)
The ESL protective film 5 is a protective film that prevents the oxide semiconductor thin film 4 from being damaged when the source and drain electrodes 6 are formed by etching, thereby degrading the characteristics of the thin film transistor 1. The thin film constituting the ESL protective film 5 is not particularly limited, but a silicon oxide film having a relatively low hydrogen concentration is preferably used.

  As a minimum of average thickness of ESL protective film 5, 50 nm is preferred and 80 nm is more preferred. On the other hand, the upper limit of the average thickness of the ESL protective film 5 is preferably 250 nm, and more preferably 200 nm. When the average thickness of the ESL protective film 5 is less than the above lower limit, the protective effect of the oxide semiconductor thin film 4 of the ESL protective film 5 may be insufficient. On the other hand, when the average thickness of the ESL protective film 5 exceeds the above upper limit, it may be difficult to flatten the passivation insulating film 7 and the wiring from the source and drain electrodes 6 may be easily disconnected.

(Source and drain electrodes)
The source and drain electrodes 6 cover part of the gate insulating film 3 and the ESL protective film 5 and are electrically connected to the oxide semiconductor thin film 4 at both ends of the channel of the thin film transistor 1. A drain current of the thin film transistor 1 flows between the source electrode 6a and the drain electrode 6b according to the voltage between the gate electrode 2 and the source electrode 6a and the voltage between the source electrode 6a and the drain electrode 6b.

  The thin film constituting the source and drain electrodes 6 is not particularly limited as long as it has conductivity, and for example, a thin film similar to the gate electrode 2 can be used.

  As a minimum of average thickness of source and drain electrode 6, 50 nm is preferred and 80 nm is more preferred. On the other hand, the upper limit of the average thickness of the source and drain electrodes 6 is preferably 200 nm, and more preferably 150 nm. When the average thickness of the source and drain electrodes 6 is less than the lower limit, the resistance of the source and drain electrodes 6 is large, so that power consumption at the source and drain electrodes 6 may increase or disconnection may easily occur. is there. On the other hand, when the average thickness of the source and drain electrodes 6 exceeds the upper limit, it is difficult to planarize the passivation insulating film 7 and wiring with the conductive film 8 may be difficult.

  The opposing distance between the source electrode 6a and the drain electrode 6b, that is, the lower limit of the channel length of the thin film transistor 1, is preferably 5 μm, and more preferably 10 μm. On the other hand, the upper limit of the channel length of the thin film transistor 1 is preferably 50 μm, and more preferably 30 μm. When the channel length of the thin film transistor 1 is less than the above lower limit, high-precision processing is required, and the manufacturing yield may be reduced. Conversely, when the channel length of the thin film transistor 1 exceeds the upper limit, the switching time of the thin film transistor 1 may be long.

  The length of the source electrode 6a and the drain electrode 6b in the channel width direction, that is, the lower limit of the channel width of the thin film transistor 1, is preferably 100 μm, and more preferably 150 μm. On the other hand, the upper limit of the channel width of the thin film transistor 1 is preferably 300 μm, and more preferably 250 μm. When the channel width of the thin film transistor 1 is less than the lower limit, the drain current may be insufficient. On the contrary, when the channel width of the thin film transistor 1 exceeds the upper limit, the drain current becomes excessive, and the power consumption of the thin film transistor 1 may increase unnecessarily.

(Passivation insulation film)
The passivation insulating film 7 covers the gate electrode 2, the gate insulating film 3, the oxide semiconductor thin film 4, the ESL protective film 5, the source electrode 6 a and the drain electrode 6 b, and prevents the characteristics of the thin film transistor 1 from deteriorating. The thin film constituting the passivation insulating film 7 is not particularly limited, but a silicon nitride film is preferably used in order to suppress moisture intrusion from the outside of the thin film transistor 1.

  The lower limit of the average thickness of the passivation insulating film 7 is preferably 100 nm, and more preferably 200 nm. On the other hand, the upper limit of the average thickness of the passivation insulating film 7 is preferably 500 nm, and more preferably 400 nm. When the average thickness of the passivation insulating film 7 is less than the lower limit, the effect of preventing the deterioration of the characteristics of the thin film transistor 1 may be insufficient. On the other hand, when the average thickness of the passivation insulating film 7 exceeds the upper limit, the passivation insulating film 7 becomes unnecessarily thick, which may increase the manufacturing cost of the thin film transistor 1 and decrease the production efficiency.

  A contact hole 9 is opened in the passivation insulating film 7 so as to be electrically connected to the drain electrode 6b. The shape and size of the contact hole 9 in plan view are not particularly limited as long as electrical connection with the drain electrode 6b is ensured. For example, the contact hole 9 may have a square shape with sides of 10 μm to 30 μm in plan view.

(Conductive film)
The conductive film 8 is connected to the drain electrode 6 b through a contact hole 9 opened in the passivation insulating film 7. The conductive film 8 forms a wiring for obtaining a drain current from the thin film transistor 1.

  The conductive film 8 is not particularly limited, and a thin film similar to the gate electrode 2 can be used. Among these, a transparent conductive film suitable for application to a display is preferable. Examples of such a transparent conductive film include an ITO film and a ZnO film.

  The position where the conductive film 8 is connected to the drain electrode 6 b is preferably a position where the drain electrode 6 b is in contact with the gate oxide film 3 and not directly above the gate electrode 2. By connecting the conductive film 8 to the drain electrode 6b at such a position, the flatness of the connection portion between the conductive film 8 and the drain electrode 6b is increased, and thus an increase in contact resistance can be suppressed.

  The lower limit of the average wiring width of the conductive film 8 is preferably 5 μm and more preferably 10 μm. On the other hand, the upper limit of the average wiring width of the conductive film 8 is preferably 50 μm and more preferably 30 μm. When the average wiring width of the conductive film 8 is less than the above lower limit, the wiring by the conductive film 8 becomes high resistance, and there is a possibility that power consumption and voltage drop in the wiring by the conductive film 8 increase. Conversely, when the average wiring width of the conductive film 8 exceeds the above upper limit, the degree of integration of the thin film transistor 1 may be reduced. Here, the “average wiring width of the conductive film 8” means the average width of a wiring portion that is disposed on the surface of the passivation insulating film 7 in the conductive film 8 and obtains a drain current from the thin film transistor 1.

  The lower limit of the average thickness of the conductive film 8 is preferably 50 nm, and more preferably 80 nm. On the other hand, the upper limit of the average thickness of the conductive film 8 is preferably 200 nm, and more preferably 150 nm. When the average thickness of the conductive film 8 is less than the above lower limit, the wiring formed by the conductive film 8 has high resistance, and power consumption and voltage drop in the wiring formed by the conductive film 8 may increase. On the other hand, when the average thickness of the conductive film 8 exceeds the above upper limit, the average thickness of the conductive film 8 becomes too large with respect to the average wiring width of the wiring by the conductive film 8, so that the wiring tends to be inclined and the wiring itself There is a possibility that a disconnection or a short circuit with an adjacent wiring is likely to occur. Here, the “average thickness of the conductive film 8” means the average thickness of a wiring portion that is disposed on the surface of the passivation insulating film 7 of the conductive film 8 and obtains a drain current from the thin film transistor 1.

The lower limit of the threshold voltage of the thin film transistor 1 is preferably −5V, and more preferably 0V. On the other hand, the upper limit of the threshold voltage of the thin film transistor 1 is preferably 4V. When the threshold voltage of the thin film transistor 1 is less than the lower limit, a leakage current in an off state as a switching element in which no voltage is applied to the gate electrode 2 increases, and the standby power of the thin film transistor 1 may be excessively increased. Conversely, when the threshold voltage of the thin film transistor 1 exceeds the above upper limit, there is a possibility that the drain current in the on state as the switching element in which the voltage is applied to the gate electrode 2 is insufficient. The “threshold voltage of a thin film transistor” refers to a gate voltage at which the drain current of a transistor having a channel length of 20 μm and a channel width of 200 μm is 10 ⁻⁹ A.

The lower limit of the field-effect mobility of the thin film transistor 1 (electron mobility) is preferably ^{4 cm} 2 / Vs, more preferably ^{5 cm} 2 / Vs. When the field effect mobility of the thin film transistor 1 is less than the lower limit, the switching characteristics of the thin film transistor 1 may be deteriorated. On the other hand, the upper limit of the field effect mobility of the thin film transistor 1 is not particularly limited, but the field effect mobility of the thin film transistor 1 is usually 10 cm ² / Vs or less. Here, “field effect mobility” means gate voltage Vg [V], drain voltage Vd [V], drain current Id [A], channel length L [m], channel width W [m], gate insulating film The capacitance C _ox [F] is a value obtained by μ _FE [m ² / Vs] shown in the following formula (3) in the linear region of the current-voltage characteristics of the thin film transistor.

  The upper limit of the SS value of the thin film transistor 1 is preferably 0.7V, and more preferably 0.5V. When the SS value of the thin film transistor 1 exceeds the upper limit, switching of the thin film transistor 1 may take time. On the other hand, the lower limit of the SS value of the thin film transistor 1 is not particularly limited, but usually the SS value of the thin film transistor 1 is 0.2 V or more. Here, the “SS value of the thin film transistor” refers to the minimum value of the change amount of the gate voltage necessary for increasing the drain current by one digit.

  The upper limit of the hysteresis of the thin film transistor 1 is preferably 0.5 V, and more preferably 0.4 V. When the hysteresis exceeds the upper limit, the use of the thin film transistor 1 may change the characteristics of the thin film transistor 1 and the desired performance may not be exhibited. On the other hand, the lower limit of the hysteresis of the thin film transistor 1 is not particularly limited, and may be 0V. Here, “hysteresis of the thin film transistor” refers to the absolute value of the shift amount of the threshold voltage when the gate voltage is applied three times while changing from −30V to + 30V.

[Thin Film Transistor Manufacturing Method]
The thin film transistor 1 includes, for example, a step of forming a gate electrode 2, a step of forming a gate insulating film 3, a step of forming an oxide semiconductor thin film 4, a step of forming an ESL protective film 5, a source and drain electrode 6, a step of forming a passivation insulating film 7, a step of forming a conductive film 8, and a step of performing an annealing process.

<Gate electrode deposition process>
In the gate electrode film formation step, the gate electrode 2 is formed on the surface of the substrate X. Specifically, first, a conductive film is laminated on the surface of the substrate X by a known method, for example, a sputtering method so as to have a desired film thickness. The conditions for laminating the conductive film by the sputtering method are not particularly limited. For example, the substrate temperature is 20 ° C. or more and 50 ° C. or less, the film forming power is 250 W or more and 350 W or less, the pressure is 0.1 Pa or more and 0.3 Pa or less, and the carrier gas Ar The conditions can be as follows.

  Next, the conductive film is patterned to form the gate electrode 2. The patterning method is not particularly limited. For example, a method of performing wet etching after performing photolithography can be used. At this time, the gate electrode 2 is preferably etched into a taper shape that expands the cross section of the gate electrode 2 toward the substrate X so that the coverage of the gate insulating film 3 is improved.

<Gate oxide film formation process>
In the gate oxide film forming step, the gate oxide film 3 is formed on the surface side of the substrate X so as to cover the gate electrode 2. Specifically, an insulating film is first laminated on the surface side of the substrate X by a known method, for example, various CVD methods so as to have a desired film thickness. For example, the conditions for laminating a silicon oxide film by plasma CVD include substrate temperature of 300 ° C. to 400 ° C., film formation power of 250 W to 350 W, pressure of 100 Pa to 300 Pa, and supply amount of N ₂ O as a source gas The condition can be 80 sccm or more and 120 sccm or less, and the supply amount of SiH ₄ diluted with 10% nitrogen can be 30 sccm or more and 50 sccm or less.

  Next, the gate insulating film 3 is formed by patterning this insulating film. The patterning method is not particularly limited. For example, a method of performing wet etching after performing photolithography can be used.

<Oxide semiconductor thin film deposition process>
In the oxide semiconductor thin film forming step, the oxide semiconductor thin film 4 is formed on the surface of the gate insulating film 3 and immediately above the gate electrode 2. The oxide semiconductor thin film 4 is formed on the surface of the substrate X by sputtering using a target Y containing In, Ga, Zn, Sn, or a combination thereof using, for example, the oxide semiconductor thin film manufacturing apparatus shown in FIG. It can be manufactured by a method for manufacturing an oxide semiconductor.

(Oxide semiconductor thin film manufacturing equipment)
The oxide semiconductor thin film manufacturing apparatus shown in FIG. 2 includes a chamber 11 and an exhaust pump 12 that decompresses the chamber 11.

  The chamber 11 includes a cylindrical substrate holding cylindrical portion 13 disposed therein, two film forming step portions 14 (first film forming step portion 14a and second film forming step portion 14b), and active species irradiation. Part 15.

  The chamber 11 is partitioned into partitions by a pair of partition plates 16 extending from the wall of the chamber 11 to the vicinity of the substrate holding cylindrical portion 13. Chamber 11 has three of the above compartments. These three sections are arranged along the side surface of the substrate holding cylindrical portion 13, and two of them face each other across the central axis of the substrate holding cylindrical portion 13. Further, in each section, the first film forming process section 14a and the second film forming process section 14b are respectively disposed in two facing sections, and the active species irradiation section 15 is disposed in the other one section. As described above, the first film forming process unit 14a, the second film forming process unit 14b, and the active species irradiating unit 15 are disposed in the section partitioned by the partition plate 16, thereby forming the film disposed in another section. It can suppress that gas mixes from the process part 14 or the active species irradiation part 15. FIG.

  The material of the chamber 11 is not particularly limited, and for example, quartz glass, ceramic, SiC, or the like can be used. The shape of the chamber 11 is not particularly limited as long as the substrate holding cylindrical portion 13, the film forming step portion 14, and the active species irradiation portion 15 can be accommodated. For example, a cylindrical shape can be suitably used. The chamber 11 is hermetically sealed and configured to be depressurized.

  The substrate holding cylindrical portion 13 has one or a plurality of substrate holders 17 that accommodate the substrate X on its side surface. The substrate holder cylindrical portion 13 can hold one or a plurality of substrates X by the substrate holder 17. The substrate holding cylindrical portion 13 rotates about its central axis so that the rotation direction is in the order of the first film forming step portion 14a, the second film forming step portion 14b, and the active species irradiation portion 15. Can do.

  The two film forming process units 14 (first film forming process unit 14a and second film forming process unit 14b) are apparatuses for forming a thin film on the surface of the substrate X by atoms sputtered from the target Y.

  The film forming process unit 14 includes a backing plate 18 that holds the target Y, and is connected to a gas supply pipe 19 that supplies a discharge gas to the film forming process unit 14. The gas supply pipe 19 has a mass flow controller 20 for controlling the supply amount of the discharge gas to be supplied on its path.

  The backing plate 18 is disposed so that the surface that holds the target Y faces the side surface of the substrate holding cylindrical portion 13. The film forming process unit 14 can apply a high voltage so that the backing plate 18 serves as a cathode and the substrate holder 17 of the substrate holding cylinder unit 13 serves as an anode. The applied voltage may be direct current or alternating current. Since the substrate holder 17 facing the backing plate 18 is sequentially moved by the rotation of the substrate holding cylindrical portion 13, a part or all of the substrate holder 17 of the substrate holding cylindrical portion 13 is at a position facing the backing plate 18. In some cases, a voltage may be applied between the substrate holder 17 and the backing plate 18.

  The lower limit of the facing distance between the backing plate 18 and the side surface of the substrate holding cylindrical portion 13 is preferably 2 cm, and more preferably 3 cm. On the other hand, the upper limit of the facing distance is preferably 10 cm, and more preferably 7 cm. When the facing distance is less than the lower limit, the thickness of the film to be formed may be uneven. On the contrary, when the facing distance exceeds the upper limit, the sputtered atoms are scattered by the discharge gas, so that the film forming speed may be reduced.

  As shown in FIG. 2, the gas supply pipe 19 and the mass flow controller 20 may be provided in common in the two film forming process units 14, or provided in the first film forming process unit 14a and the second film forming process unit 14b, respectively. May be. As the gas supply pipe 19 and the mass flow controller 20, known gas supply pipes and mass flow controllers can be used, respectively.

  The film forming process unit 14 can form plasma by flowing a discharge gas under a reduced pressure environment and applying a voltage between the substrate holder 17 and the backing plate 18. By generating plasma in a state where the substrate X is held by the substrate holder 17 and the target Y is held by the backing plate 18, high-speed ions cause a sputtering phenomenon in the target Y held by the backing plate 18 that is a cathode. Let Due to this sputtering phenomenon, atoms sputtered from the target Y form a thin film on the surface of the substrate X held by the substrate holder 17.

  The active species irradiation unit 15 is an apparatus that irradiates the thin film formed in the film forming process unit 14 with active species containing oxygen radicals generated by plasma. The active species irradiation unit 15 is located at a position facing the side surface of the substrate holding cylinder unit 13 and along the rotation direction of the side surface of the substrate holding cylinder unit 13, and the second film forming process unit 14 b, the active species irradiation unit 15, and the first The first film forming process unit 14a is arranged in this order.

  The active species irradiation unit 15 includes a plasma generator 21 and is connected to a gas supply pipe 22 that supplies a discharge gas to the active species irradiation unit 15. The gas supply pipe 22 has a mass flow controller 23 for controlling the supply amount of the discharge gas to be supplied on its path.

  The plasma generator 21 is disposed so as to be irradiated with active species including oxygen radicals of plasma generated toward the side surface of the substrate holding cylindrical portion 13. The plasma generator 21 generates plasma from a source gas containing oxygen supplied via the mass flow controller 23. In addition, the active species including oxygen radicals generated by the plasma move to the side surface of the substrate holding cylindrical portion 13 on the down flow generated by the suction of the exhaust pump 12. As the plasma generator 21, a known plasma generator can be used.

  The lower limit of the facing distance between the plasma generation space of the plasma generator 21 and the side surface of the substrate holding cylindrical portion 13 is preferably 2 cm, and more preferably 3 cm. On the other hand, the upper limit of the facing distance is preferably 7 cm, and more preferably 5 cm. When the facing distance is less than the lower limit, the substrate X may be damaged by plasma. On the other hand, when the facing distance exceeds the upper limit, oxygen radicals generated by the plasma generator 21 are inactivated, and there is a possibility that the side surface of the substrate holding cylindrical portion 13 cannot be sufficiently irradiated.

  The exhaust pump 12 is a pump for reducing the pressure inside the chamber 11. As the exhaust pump 12, a known pump such as a turbo molecular pump, a rotary pump, a mechanical booster pump, or the like can be used.

  Hereinafter, a method for manufacturing the oxide semiconductor thin film 4 using the oxide semiconductor thin film manufacturing apparatus will be described with reference to FIG.

  The manufacturing method of the oxide semiconductor thin film 4 is a method of manufacturing the oxide semiconductor 4 on the surface of the substrate X by a sputtering method using a target Y containing In, Ga, Zn, Sn, or a combination thereof. Preparation step S1 for holding X and target Y in an oxide semiconductor thin film manufacturing apparatus, step S2 for forming a thin film on the surface of the substrate X by atoms sputtered from the target Y, and oxygen radicals generated by plasma And a patterning step S4 for patterning the oxide semiconductor thin film 4.

(Preparation process)
In the preparation step S1, the substrate X and the target Y are held in an oxide semiconductor thin film manufacturing apparatus. Specifically, the substrate X is held on the substrate holder 17 of the oxide semiconductor thin film manufacturing apparatus, and the target Y is held on the backing plate 18.

  The target Y is a solid from which atoms are released by sputtering, and includes In, Ga, Zn, Sn, or a combination thereof. The total content of these metal atoms in the target Y is not particularly limited, but is preferably higher in purity, for example, 99% by mass or more and 100% by mass or less. The atoms included in the target Y are not particularly limited as long as they include atoms necessary for the composition of the oxide semiconductor thin film 4 to be formed, but the target Y may include In, Ga, and Zn. Thus, the target Y contains In, Ga, and Zn, whereby an In—Ga—Zn—O thin film can be manufactured. The In—Ga—Zn—O thin film has a particularly high effect of suppressing variation in quality of the oxide semiconductor thin film 4 because its characteristics are strongly dependent on free carriers. When the target Y contains In, Ga, and Zn, the atomic ratio of In to Zn is preferably 1 or more and 2 or less from the viewpoint of the characteristics of the thin film transistor 1 to be obtained. Further, the atomic ratio of Ga to Zn is preferably 1 or more and 2 or less.

  It does not specifically limit as temperature of the board | substrate X and the target Y, For example, it can be 25 degreeC (room temperature) or more and 100 degrees C or less.

  The substrate holder 17 that holds the substrate X is disposed on the side surface of the substrate holding cylindrical portion 13. For this reason, the substrate X held by the substrate holder 17 can be rotated together with the substrate holding cylindrical portion 13. By rotating the substrate holding cylindrical part 13, the substrate X passes through the first film forming process part 14a, the second film forming process part 14b, and the active species irradiation part 15 in this order, and again the first film forming process part 14a. Return to. The substrate X is subjected to a film forming process in a film forming step S2, which will be described later, when passing through the film forming step unit 14, and is subjected to active species irradiation in the active species irradiation step S3 when passing through the active species irradiating unit 15. . That is, by rotating the substrate holding cylindrical portion 13, the film forming step S2 and the active species irradiation step S3 are alternately repeated a plurality of times.

  As a minimum of the number of rotations of the above-mentioned substrate maintenance cylindrical part 13, 50 rpm is preferred and 70 rpm is more preferred. On the other hand, as an upper limit of the rotation speed of the substrate holding cylindrical portion 13, 150 rpm is preferable, and 120 rpm is more preferable. When the number of rotations of the substrate holding cylindrical portion 13 is less than the lower limit, the residence time per time in the film forming step S2 of the substrate X becomes long, so that the film thickness formed at one time becomes large. As a result, in the subsequent active species irradiation step S3, the film formed in the immediately preceding film forming step S2 may not be sufficiently oxidized to the substrate X side. Further, since the residence time per time in the film forming step S2 of the substrate X becomes long, the substrate X is irradiated with an unnecessarily large amount of oxygen radicals, which may deteriorate the manufacturing efficiency or damage the substrate X. is there. On the other hand, when the rotation speed of the substrate holding cylindrical portion 13 exceeds the upper limit, the residence time per one time in the film forming step S2 of the substrate X is shortened, so that the film forming speed may be reduced and the manufacturing efficiency may be deteriorated. In addition, since the residence time per time in the active species irradiation step S3 is shortened, there is a possibility that the film formed in the film forming step S2 cannot be sufficiently oxidized.

(Film formation process)
In the film forming step S2, a thin film is formed on the surface of the substrate X by atoms sputtered from the target Y. Specifically, a metal thin film is formed by sputtering using the film forming process unit 14 of the oxide semiconductor thin film manufacturing apparatus.

  The discharge gas used in the sputtering method is not particularly limited, but Ar is preferable. Ar is an inert gas, does not easily react with other atoms, and has a high probability (sputtering rate) that atoms are sputtered when one ion collides with the target Y.

  The lower limit of the supply amount of the discharge gas supplied to the film forming process unit 14 is preferably 200 sccm, and more preferably 300 sccm. On the other hand, the upper limit of the supply amount of the discharge gas is preferably 800 sccm, and more preferably 700 sccm. When the supply amount of the discharge gas is less than the lower limit, the film formation rate becomes insufficient due to the shortage of atoms to be sputtered, and the production efficiency may be lowered. On the other hand, when the supply amount of the discharge gas exceeds the upper limit, the sputtered atoms are scattered by the discharge gas, and it becomes difficult to reach the surface of the substrate X, so that film formation may be difficult.

  The lower limit of the pressure between the target Y and the substrate X in the film forming process unit 14 (pressure in the film forming process unit 14) is preferably 0.1 Pa, and more preferably 0.3 Pa. On the other hand, the upper limit of the pressure of the film forming process unit 14 is preferably 10 Pa, and more preferably 1 Pa. When the pressure of the film forming process unit 14 is less than the lower limit, the amount of ionized discharge gas colliding with the target Y decreases, so that the film forming speed becomes insufficient due to the shortage of atoms to be sputtered, and the production efficiency is improved. May decrease. On the other hand, when the pressure in the film forming process unit 14 exceeds the upper limit, the sputtered atoms are scattered by the discharge gas, and it becomes difficult to reach the surface of the substrate X, so that film formation may be difficult.

  The film forming power of the film forming process unit 14 is not particularly limited as long as plasma is generated and sputtering is generated, but it can be set to, for example, 1000 W or more and 3000 W or less.

  As a minimum of sputtering time per time in film formation process S2, 0.01 seconds are preferred and 0.02 seconds are more preferred. On the other hand, the upper limit of the sputtering time per time in the film forming step S2 is preferably 0.08 seconds, and more preferably 0.06 seconds. When the said sputtering time is less than the said minimum, there exists a possibility that the film-forming speed | rate may fall and manufacturing efficiency may deteriorate. On the other hand, when the sputtering time exceeds the upper limit, the film thickness formed at one time is increased. As a result, in the subsequent active species irradiation step S3, the film formed in the immediately preceding film forming step S2 may not be sufficiently oxidized to the substrate X side. Note that the sputtering time per time indicates the time during which film formation is performed on the surface of the substrate X by atoms sputtered between the active species irradiation step S3 and the next active species irradiation step S3. That is, the sputtering time per time means the sum of the time during which film formation is performed on the surface of the substrate X by the first film formation process unit 14a and the second film formation process unit 14b.

  The lower limit of the average thickness of the metal thin film formed per time in the film forming step S2 is preferably 3 nm, and more preferably 5 nm. On the other hand, the upper limit of the average thickness of the metal thin film formed per time in the film forming step S2 is preferably 15 nm, and more preferably 10 nm. When the said average thickness is less than the said minimum, there exists a possibility that the film-forming speed | rate may fall and manufacturing efficiency may deteriorate. On the other hand, when the average thickness exceeds the upper limit, there is a possibility that the film formed in the immediately preceding film forming step S2 in the active species irradiation step S3 cannot be sufficiently oxidized to the substrate X side.

(Active species irradiation process)
In the active species irradiation step S3, the thin film is irradiated with active species containing oxygen radicals generated by plasma. Specifically, the active species containing oxygen radicals are irradiated on the surface side of the substrate X using the active species irradiation unit 15 of the oxide semiconductor thin film manufacturing apparatus.

The source gas for generating oxygen radicals (oxygen source gas) is not particularly limited as long as oxygen radicals can be generated, and examples thereof include O ₂ and N ₂ O. In addition, the source gas may contain an inert gas. Thus, by generating plasma by ionization of a gas containing an inert gas, the controllability of the amount of oxygen radicals generated is improved. As a result, the effect of suppressing variation in quality of the oxide semiconductor thin film 4 can be obtained more reliably. Examples of the inert gas include N ₂ and Ar. Among these, Ar that easily generates plasma is preferable.

  When the source gas contains an inert gas, a mixed gas in which an inert gas and a gas containing oxygen are mixed may be supplied to the plasma generator 21. However, as shown in FIG. And may be supplied separately. When supplying the inert gas and the gas containing oxygen separately, they may be mixed in the gas supply pipe 22 as shown in FIG. 2, or may be supplied independently to the plasma generator 21. As the gas supply pipe 22 and the mass flow controller 23, known gas supply pipes and mass flow controllers can be used, respectively.

  The lower limit of the supply amount of the oxygen source gas supplied to the active species irradiation unit 15 is preferably 3 sccm, and more preferably 5 sccm. On the other hand, the upper limit of the supply amount of the oxygen source gas is preferably 55 sccm, more preferably 30 sccm. When the supply amount of the oxygen source gas is less than the lower limit, the amount of oxygen radicals generated is insufficient, so that oxygen vacancies in the oxide semiconductor thin film 4 are increased, and variation in quality of the oxide semiconductor thin film 4 is suppressed. The effect may be insufficient. On the other hand, when the supply amount of the oxygen source gas exceeds the upper limit, the concentration of oxygen radicals in the oxygen source gas is lowered, and the film formed in the film forming step S2 may not be sufficiently oxidized.

  The lower limit of the supply amount of the inert gas supplied to the active species irradiation unit 15 is preferably 100 sccm, and more preferably 150 sccm. On the other hand, the upper limit of the supply amount of the inert gas is preferably 500 sccm, and more preferably 300 sccm. When the supply amount of the inert gas is less than the lower limit, the controllability of the generation amount of oxygen radicals is deteriorated, and the effect of suppressing variation in quality of the oxide semiconductor thin film 4 may be insufficient. On the other hand, when the supply amount of the inert gas exceeds the upper limit, the concentration of oxygen radicals is lowered, and the film formed in the film forming step S2 may not be sufficiently oxidized.

  The lower limit of the pressure in the plasma generation space of the active species irradiation unit 15 (the pressure of the active species irradiation unit 15) is preferably 0.05 Pa, and more preferably 0.1 Pa. On the other hand, the upper limit of the pressure of the active species irradiation unit 15 is preferably 1 Pa, and more preferably 0.3 Pa. When the pressure of the active species irradiating unit 15 is less than the lower limit, the concentration of oxygen radicals is lowered, and the film formed in the film forming step S2 may not be sufficiently oxidized. On the other hand, when the pressure of the active species irradiation unit 15 exceeds the upper limit, it may be difficult to generate plasma.

  The film formation power of the active species irradiation unit 15 is not particularly limited as long as plasma is generated, but may be, for example, 500 W or more and 4000 W or less.

  As a minimum of active species irradiation time per time in active species irradiation process S3, 0.01 seconds are preferred and 0.02 seconds are more preferred. On the other hand, the upper limit of the active species irradiation time per time in the active species irradiation step S3 is preferably 0.08 seconds, and more preferably 0.06 seconds. When the active species irradiation time is less than the lower limit, the film formed in the film forming step S2 may not be sufficiently oxidized. Conversely, when the active species irradiation time exceeds the upper limit, the substrate X is irradiated with an unnecessarily large amount of oxygen radicals, so that oxygen is excessively taken into the oxide semiconductor thin film 4 and the oxide semiconductor thin film There is a possibility that the characteristic of 4 will deteriorate. The active species irradiation time per time refers to the time during which the oxygen radicals are irradiated on the surface of the substrate X between the film forming step S2 and the next film forming step S2. That is, the active species irradiation time per time means the time during which the active species irradiation unit 15 irradiates the active species with the active species.

  After irradiating the active species to the surface side of the substrate X, it is determined whether or not the oxide semiconductor thin film 4 has a desired film thickness. A patterning step S4 of the physical semiconductor thin film 4 is performed. If it is determined that the desired film thickness is not obtained, the process returns to the film forming process S2, and the film forming process S2 and the active species irradiation process S3 are repeated.

  This determination can be performed in the film forming step S2, but is preferably performed in the active species irradiation step S3 as shown in FIG. By performing in active species irradiation process S3, generation | occurrence | production of the free carrier resulting from hydrogen atom injection to the surface of the oxide semiconductor thin film 4 can be suppressed.

  The film thickness of the oxide semiconductor thin film 4 serving as a criterion may be monitored in-situ using a film thickness measuring device, but is based on the deposition rate of the oxide semiconductor thin film 4 based on past results. It may be an estimated value from the film formation time.

(Patterning process)
In the patterning step S4, the oxide semiconductor thin film 4 is patterned to obtain the oxide semiconductor thin film 4.

  A method for patterning the oxide semiconductor thin film 4 is not particularly limited. For example, a method of performing wet etching after performing photolithography can be used.

<ESL protective film formation process>
In the ESL protective film formation step, the ESL protective film 5 is formed on the surface of the oxide semiconductor thin film 4 where the source and drain electrodes 6 are not formed. Specifically, an insulating film is first laminated on the surface side of the substrate X by a known method, for example, various CVD methods so as to have a desired film thickness. For example, the conditions for laminating a silicon oxide film by plasma CVD include a substrate temperature of 100 ° C. to 300 ° C., a film forming power of 50 W to 200 W, a pressure of 100 Pa to 300 Pa, and an N ₂ O supply amount of 80 sccm as a source gas. The conditions can be 120 sccm or less and a supply amount of SiH ₄ diluted with 10% nitrogen of 30 sccm or more and 50 sccm or less.

  Next, the ESL protective film 5 is formed by patterning this insulating film. The patterning method is not particularly limited. For example, a method of performing wet etching after performing photolithography can be used.

<Source and drain electrode film formation process>
In the source and drain electrode film forming step, the source electrode 6 a and the drain electrode 6 b that are electrically connected to the oxide semiconductor thin film 4 are formed at both ends of the channel of the thin film transistor 1. The source and drain electrodes 6 can be formed by the same method as that for the gate electrode 2.

<Passivation insulating film formation process>
In the passivation insulating film forming step, a passivation insulating film 7 covering the thin film transistor 1 is formed. Specifically, an insulating film is laminated on the surface side of the substrate X by a known method, for example, various CVD methods so as to have a desired film thickness. For example, the conditions for laminating a silicon oxide film by plasma CVD include substrate temperature of 100 ° C. or higher and 200 ° C. or lower, film forming power of 50 W or higher and 150 W or lower, pressure of 100 Pa or higher and 300 Pa or lower, and supply amount of N ₂ O as source gas of 80 sccm The conditions can be 120 sccm or less and a supply amount of SiH ₄ diluted with 10% nitrogen of 30 sccm or more and 50 sccm or less.

<Conductive film formation process>
In the conductive film deposition step, a conductive film 8 that is electrically connected to the drain electrode 6b through the contact hole 9 is deposited. Specifically, first, the contact hole 9 is formed by a known method, for example, a method of performing dry etching after patterning the contact portion with the drain electrode 6b by photolithography. Next, a conductive film 8 electrically connected to the drain electrode 6b through the contact hole 9 is formed by a known method, for example, a sputtering method. The conditions for laminating the conductive film 8 by the sputtering method are not particularly limited. For example, the substrate temperature is 20 ° C. or higher and 50 ° C. or lower, the film forming power is 250 W or higher and 350 W or lower, the pressure is 0.1 Pa or higher and 0.3 Pa or lower, carrier gas Ar can be used as the condition.

<Annealing process>
The annealing process is a process for performing a final heat treatment. By this heat treatment, the density of trap states formed at the interface between the oxide semiconductor thin film 4 and the gate insulating film 3 or at the interface between the oxide semiconductor thin film 4 and the ESL protective film 5 can be reduced. Thereby, the thin film transistor 1 can suppress a shift (hysteresis) of the threshold voltage when the gate voltage is applied a plurality of times.

  As a minimum of the temperature of annealing treatment, 200 ° C is preferred and 250 ° C is more preferred. On the other hand, the upper limit of the annealing temperature is preferably 400 ° C., more preferably 350 ° C. If the annealing temperature is lower than the lower limit, the effect of improving the electrical characteristics of the thin film transistor 1 may be insufficient. Conversely, when the annealing temperature exceeds the upper limit, the thin film transistor 1 may be damaged by heat. In view of heat damage, the annealing temperature should be low.

  The conditions of the annealing pressure, temperature, and time are not particularly limited. For example, atmospheric pressure (0.9 to 1.1 atmospheres) and an environment of 200 to 400 degrees C. for 10 to 60 minutes. Time conditions can be used. The annealing treatment may be performed in an air atmosphere, but is preferably performed in an inert gas atmosphere such as nitrogen. By performing the process in an inert gas atmosphere as described above, it is possible to prevent the quality of the thin film transistor 1 from being varied due to the binding of molecules or the like contained in the atmosphere to the thin film transistor 1 during the annealing process.

[advantage]
The oxide semiconductor thin film 4 is formed by alternately repeating a film formation step S2 by atoms sputtered from a target Y containing In, Ga, Zn, Sn, or a combination thereof and an active species irradiation step S3 containing oxygen radicals. Manufactured. For this reason, the metal of the thin film formed in the film formation step S2 and the highly reactive oxygen irradiated in the active species irradiation step S3 are likely to be bonded, and the oxygen dangling of the oxide semiconductor thin film 4 formed is formed. Ring bonds are reduced. As a result, it is difficult for free carriers due to hydrogen atom injection to occur in a subsequent process of forming a transistor, and variations in quality due to an increase in free carriers can be suppressed.

[Other Embodiments]
The oxide semiconductor manufacturing method, oxide semiconductor, and thin film transistor of the present invention are not limited to the above embodiment.

  In the above embodiment, the case of a bottom gate type transistor has been described as the thin film transistor, but a top gate type transistor may be used.

  In the above embodiment, the case where the thin film transistor has the ESL protective film has been described. However, the ESL protective film is not an essential component. For example, in the case where the source and drain electrodes are formed by mask vapor deposition or lift-off, the ESL protective film can be omitted because the oxide semiconductor layer is hardly damaged.

  In the method for manufacturing a thin film transistor, a pre-annealing process may be provided immediately after the oxide semiconductor thin film forming process. The pre-annealing treatment has an effect of improving the film quality of the oxide semiconductor thin film. The conditions for the pre-annealing treatment are not particularly limited, but for example, conditions of a time of 30 minutes to 90 minutes in an environment of 200 to 400 ° C. at atmospheric pressure (0.9 to 1.1 atm) are used. be able to. Moreover, as an atmosphere, you may carry out in air | atmosphere atmosphere and you may carry out in the atmosphere of inert gas, such as nitrogen.

  In the above embodiment, the manufacturing apparatus including two film forming process units and one active species irradiation unit has been described as an oxide semiconductor thin film manufacturing apparatus. However, the number of film forming process units and active species irradiation units is the same. For example, two film forming process units and two active species irradiation units may be provided. In the case of including two film formation process units and two active species irradiation units, the first film formation process unit, the first active species irradiation unit, and the second film formation process are performed along the rotation direction of the side surface of the substrate holding cylindrical unit. And the second active species irradiation part can be arranged in this order.

  In the above-described embodiment, the structure in which the film forming process and the active species irradiation are alternately performed by rotating the substrate holding cylindrical portion as the oxide semiconductor thin film manufacturing apparatus has been described. Other configurations may be used as the configuration for alternately performing the steps. As another configuration, for example, a configuration in which the film forming process unit and the active species irradiation unit reciprocate by a transfer device such as a belt conveyor can be given.

  EXAMPLES Hereinafter, although this invention is explained in full detail based on an Example, this invention is not interpreted limitedly based on description of this Example.

[Example 1]
Ten glass substrates (Corning “Eagle XG”, 2 inches in diameter, 0.7 mm in thickness) are prepared. First, a Mo thin film is formed on the surface of the glass substrate so that the average thickness is 100 nm. did. The film formation conditions were a substrate temperature of 25 ° C. (room temperature), a film formation power of DC 300 W, a pressure of 0.266 Pa, and a carrier gas Ar. After forming the Mo thin film, a gate electrode was formed by patterning.

Next, a silicon oxide film having an average thickness of 250 nm was formed as a gate insulating film so as to cover the gate electrode by a CVD method. The source gas and the supply amount thereof were 100 sccm for N ₂ O and 40 sccm for SiH ₄ diluted with 10% nitrogen. Film formation conditions were a substrate temperature of 320 ° C., a film formation power of RF 300 W, and a pressure of 200 Pa.

  Next, as an oxide semiconductor thin film on the surface side of the glass substrate, by using the above-described oxide semiconductor thin film manufacturing apparatus, the film formation step and the active species irradiation step are alternately repeated a plurality of times, so that In—Ga— A Zn-O thin film was formed to a thickness of 40 nm. The target used was a target containing In, Ga, and Zn at a ratio of 1: 1: 1 in terms of the number of atoms. The film forming conditions are shown in Table 1. After the oxide semiconductor thin film was formed, it was patterned by wet etching (an etchant is “ITO-07N” manufactured by Kanto Kagaku Co., Ltd.).

  Here, for improving the film quality of the oxide semiconductor thin film, the sample is divided into two types of five samples, one that has been pre-annealed and one that has not been pre-annealed. I went against it. Note that the conditions for the pre-annealing treatment were 60 minutes under an atmospheric pressure, an air atmosphere, and an environment of 350 ° C.

Next, a silicon oxide film was formed on the surface side of the glass substrate by a CVD method so as to have an average thickness of 200 nm. The source gas and the supply amount thereof were 100 sccm for N ₂ O and 40 sccm for SiH ₄ diluted with 10% nitrogen. The film formation conditions were a substrate temperature of 230 ° C., a film formation power of RF 100 W, and a pressure of 133 Pa. After forming the silicon oxide film, an ESL protective film was formed by patterning.

  Next, a Mo thin film was formed on the surface side of the glass substrate so as to have an average thickness of 100 nm. The film formation conditions were the same as those for the gate electrode. After forming the Mo thin film, a source electrode and a drain electrode were formed by patterning.

Next, a passivation insulating film having a two-layer structure of a silicon oxide film (average thickness 200 nm) and a silicon nitride film (average thickness 150 nm) was formed on the surface side of the glass substrate by a CVD method. The source gas for the silicon oxide film and the supply amount thereof were 100 sccm for N ₂ O and 40 sccm for SiH ₄ diluted with 10% nitrogen. The deposition conditions for the silicon oxide film were a substrate temperature of 150 ° C., a deposition power of RF 100 W, and a pressure of 133 Pa. The source gas for the silicon nitride film and the supply amount thereof were 6 sccm for NH ₃ and 125 sccm for SiH ₄ diluted with 10% nitrogen. Further, N ₂ was supplied as a carrier gas at a supply amount of 185 sccm. The deposition conditions for the silicon nitride film were a substrate temperature of 150 ° C., a deposition power of RF 100 W, and a pressure of 133 Pa.

  Next, a contact hole was formed by dry etching, and a pad for electrical connection to the drain electrode was provided. The thin film transistor can be electrically measured by applying a probe to the pad.

  Finally, each sample was annealed under different conditions. Each sample has five conditions: no annealing, annealing at 250 ° C., annealing at 270 ° C., annealing at 300 ° C., and annealing at 320 ° C. The annealing conditions other than the temperature of the annealed sample were 30 minutes under an atmosphere of atmospheric pressure and nitrogen atmosphere.

  In this way, ten thin film transistors with different annealing conditions were obtained. The thin film transistor has a channel length of 20 μm and a channel width of 200 μm.

  In addition, an oxide semiconductor thin film having a thickness of 100 nm was formed under the same conditions for measuring hole mobility and carrier concentration, and one sample was prepared by omitting the steps after pre-annealing.

  The total of 11 thin film transistors is referred to as the thin film transistor of Example 1.

[Examples 2 and 3]
The thin film transistors of Examples 2 and 3 were obtained in the same manner as in Example 1 except that the film forming conditions of the oxide semiconductor thin film were changed as shown in Table 1.

[Comparative Example 1]
A thin film transistor of Comparative Example 1 was obtained in the same manner as in Example 1 except that the oxide semiconductor thin film was formed by a conventional sputtering method. The conditions for forming the oxide semiconductor thin film of Comparative Example 1 were as shown in Table 1. Specifically, oxygen gas was supplied together with the carrier gas, and oxidation was performed when a film was formed on the substrate by atoms sputtered from the target, whereby an In—Ga—Zn—O thin film was formed.

[Measuring method]
For the samples of Examples 1 to 3 and Comparative Example 1, the hole mobility and carrier concentration of the oxide semiconductor thin film, and the field effect mobility, SS value, and threshold voltage of the thin film transistor were measured. Further, the variation in quality of the thin film transistor due to the heat treatment was determined from the result of the threshold voltage.

<Hole mobility and carrier concentration>
The hole mobility and carrier concentration were measured using a sample for measuring hole mobility and carrier concentration. Hall mobility and carrier concentration were determined by Hall effect measurement. The results are shown in Table 2.

なお、式（４）中、Ｖｇはゲート電圧［Ｖ］、Ｖｄはドレイン電圧［Ｖ］、Ｉｄはドレイン電流［Ａ］、Ｌはチャネル長［ｍ］、Ｗはチャネル幅［ｍ］、Ｃ_ｏｘはゲート絶縁膜の容量［Ｆ］である。 <Field effect mobility>
The field effect mobility was calculated from the static characteristics (Id-Vg characteristics) of the thin film transistor. The static characteristics of the thin film transistor were measured under the conditions of a gate voltage of −30 V to +30 V (step 0.25 V), a source voltage of 0 V, and a drain voltage of 10 V using a semiconductor parameter analyzer (“4200SCS” manufactured by Keithley). In the linear region of the current-voltage characteristics of this thin film transistor, the calculation was performed by _μFE using the following equation (4). The results are shown in Table 3.

In Expression (4), Vg is a gate voltage [V], Vd is a drain voltage [V], Id is a drain current [A], L is a channel length [m], W is a channel width [m], C _ox Is the capacitance [F] of the gate insulating film.

<SS value>
The SS value is the minimum value obtained by calculating the amount of change in the gate voltage required to increase the drain current by one digit from the static characteristics of the thin film transistor. The results are shown in Table 3.

<Threshold voltage>
The threshold voltage was a value obtained by calculating the gate voltage at which the drain current of the transistor was 10 ⁻⁹ A from the static characteristics of the thin film transistor. The results are shown in Table 3.

<Hysteresis>
Hysteresis was the absolute value of the shift amount of the threshold voltage calculated from each static characteristic after measuring the static characteristics of the thin film transistor described above three times. An example of the measurement result of the static characteristics when determining the hysteresis is shown in FIG. From the calculated results, hysteresis was determined according to the following criteria.
(Hysteresis criteria)
A: Hysteresis is 0.5 V or less.
B: Hysteresis is more than 0.5V.

<Judgment>
When the oxide semiconductor thin film has many oxygen vacancies and hydrogen is injected into the oxide semiconductor thin film by annealing, the quality of the thin film transistor varies. In particular, the threshold voltage of the thin film transistor is more likely to shift in the negative direction than that in which the annealing treatment is not performed, and in some cases, it becomes a conductor. From this, based on the measurement result of the threshold voltage after the annealing treatment, the presence or absence of variation in the quality of the thin film transistor was determined according to the following criteria. This determination was made separately for samples that were pre-annealed and samples that were not. The results are shown in Table 3.
(Criteria)
A: The minimum value of the threshold voltage is −2 V or more, and the variation in quality is very small.
B: The minimum value of the threshold voltage is −6 V or more and less than −2 V, and the variation in quality is small.
C: The minimum value of the threshold voltage is less than −6V or conductorization occurs, and the quality variation is large.

  In Table 3, the maximum difference in threshold voltage in the determination column means the maximum value among the absolute values of the difference between the threshold voltage without post-annealing and each threshold voltage with post-annealing.

From the results shown in Table 3, the thin film transistors of Examples 1 to 3 have field effect mobility and SS values in the range of 4 cm ² / Vs or more and 0.7 V or less, respectively, and are equivalent to Comparative Example 1; Variation in the quality of the thin film transistor is smaller than that of the thin film transistor of Comparative Example 1. In addition, the thin film transistors of Examples 1 to 3 have a hysteresis equivalent to that of Comparative Example 1 after the post-annealing process of 300 ° C. or lower, and are excellent in hysteresis as compared with Comparative Example 1 after the post-annealing process of 320 ° C. On the other hand, the thin film transistor of Comparative Example 1 has a large variation in the quality of the thin film transistor due to the annealing treatment, and becomes a conductor particularly by the annealing treatment at 320 ° C. Since the thin film transistor of Comparative Example 1 contains a large number of hydrogen atoms inside the oxide semiconductor thin film, it is considered that the carrier concentration is increased by the heat treatment and thus becomes a conductor. Therefore, the process of forming a thin film on the surface of the substrate by atoms sputtered from the target and the process of irradiating the thin film with active species containing oxygen radicals generated by plasma are alternately repeated several times. It can be seen that manufacturing the semiconductor thin film can suppress variations in the quality of the thin film transistor due to an increase in free carriers due to hydrogen atom injection.

<Evaluation of hydrogen desorption from insulating film>
In order to investigate the influence of the hydrogen atom implantation, the temperature dependence of hydrogen desorption from the silicon nitride film used for the passivation insulating film of Example 1 was evaluated.

[Example 4]
A passivation insulating film having a two-layer structure of a silicon nitride film (average thickness 150 nm) and a silicon oxide film (average thickness 200 nm) was formed on the surface side of the silicon substrate without hydrogen desorption by the CVD method. The source gas for the silicon nitride film and the supply amount thereof were 6 sccm for NH ₃ and 125 sccm for SiH ₄ diluted with 10% nitrogen. Further, N ₂ was supplied as a carrier gas at a supply amount of 185 sccm. The deposition conditions for the silicon nitride film were a substrate temperature of 150 ° C., a deposition power of RF 100 W, and a pressure of 133 Pa. The source gas for the silicon oxide film and the supply amount thereof were 100 sccm for N ₂ O and 40 sccm for SiH ₄ diluted with 10% nitrogen. The deposition conditions for the silicon oxide film were a substrate temperature of 150 ° C., a deposition power of RF 100 W, and a pressure of 133 Pa.

[Reference Example 1]
An ESL protective film (average thickness: 200 nm), which is a silicon oxide film, was formed on the surface side of the same silicon substrate as in Example 4. The source gas for the ESL protective film and the supply amount thereof were 100 sccm for N ₂ O and 40 sccm for SiH ₄ diluted with 10% nitrogen. The film formation conditions for the ESL protective film were a substrate temperature of 230 ° C., a film formation power of RF 100 W, and a pressure of 133 Pa.

[Evaluation]
Example 4 and Reference Example 1 were subjected to temperature programmed desorption gas mass spectrometry. Specifically, mass spectrometry of H ₂ gas desorbed from each sample was performed while changing the temperature from 50 ° C. to 750 ° C. The result of Example 4 is shown in FIG. 5A. The result of Reference Example 1 is shown in FIG. 5B.

  From the graphs of FIGS. 5A and 5B, it can be seen that hydrogen desorption occurs at a temperature of 300 ° C. or higher in the two-layer passivation insulating film of Example 4. In contrast, the ESL protective film of Reference Example 1 shows almost no desorption of hydrogen even at a temperature of 300 ° C. or higher. This shows that hydrogen desorption occurs mainly from the silicon nitride film at a temperature of 300 ° C. or higher.

  In the thin film transistor, the desorbed hydrogen is injected into the oxide semiconductor thin film. In an oxide semiconductor thin film with many oxygen vacancies in the film, free carriers are generated by this desorbed hydrogen, and the oxide semiconductor thin film becomes a conductor. From the above, it can be inferred that the thin film transistor subjected to post-annealing at 350 ° C. in Comparative Example 1 was made conductive because hydrogen desorbed from the silicon nitride film was injected into the oxide semiconductor thin film and free carriers were generated. .

  On the other hand, in the oxide semiconductor thin films of Examples 1 to 3, the thin film is formed on the surface of the substrate with atoms sputtered from the target, and the thin film is irradiated with active species including oxygen radicals generated by plasma. It is considered that there are few oxygen vacancies because the oxide semiconductor thin film was manufactured by alternately repeating the step of performing multiple times. For this reason, even if hydrogen desorbed from the silicon nitride film is injected into the oxide semiconductor thin film, the generation of free carriers is suppressed. Therefore, it is considered that in the oxide semiconductor thin films of Examples 1 to 3, variations in the quality of the thin film transistor due to the increase in free carriers due to hydrogen atom injection could be suppressed.

  As described above, by using the method for manufacturing an oxide semiconductor thin film of the present invention, an oxide semiconductor thin film in which variations in quality of thin film transistors due to an increase in free carriers due to hydrogen atom injection hardly occur can be obtained. In addition, since the oxide semiconductor thin film of the present invention is less likely to cause quality variation due to an increase in free carriers due to hydrogen atom injection, a thin film transistor suitable for application to a display can be manufactured.

DESCRIPTION OF SYMBOLS 1 Thin film transistor 2 Gate electrode 3 Gate insulating film 4 Oxide semiconductor thin film 5 ESL protective film 6 Source and drain electrode 6a Source electrode 6b Drain electrode 7 Passivation insulating film 8 Conductive film 9 Contact hole 11 Chamber 12 Exhaust pump 13 Substrate holding cylindrical part 14 Deposition Step 14a First Deposition Step 14b Second Deposition Step 15 Active Species Irradiation Unit 16 Partition Plate 17 Substrate Holder 18 Backing Plates 19, 22 Gas Supply Pipes 20, 23 Mass Flow Controller 21 Plasma Generator S1 Preparatory Step S2 Film formation step S3 Active species irradiation step S4 Patterning step X Substrate Y Target

  The present invention relates to a method for manufacturing an oxide semiconductor.

The lower limit of the carrier concentration of the oxide semiconductor thin film 4 is 1 × 10 ¹² cm ⁻³ , more preferably 2 × 10 ¹² cm ⁻³ , and further preferably 4 × 10 ¹² cm ⁻³ . On the other hand, the upper limit of the carrier concentration of the oxide semiconductor thin film 4 is 5 × ¹⁰ 13 ^{cm -3,} more preferably 3 × ¹⁰ 13 ^{cm -3,} more preferably 1 × ¹⁰ 13 ^{cm -3.} When the carrier concentration of the oxide semiconductor thin film 4 is less than the lower limit, the drain current of the thin film transistor 1 may be insufficient. On the other hand, when the carrier concentration of the oxide semiconductor thin film 4 exceeds the upper limit, there are many free carriers due to hydrogen atom implantation, and the quality of the oxide semiconductor thin film 4 may easily vary. In particular, when the carrier concentration of the oxide semiconductor thin film 4 exceeds 10 ¹⁸ cm ⁻³ , it becomes difficult to completely deplete the inside of the oxide semiconductor thin film 4, and the threshold voltage shifts to the negative side. As a result, it may not function as a switching element. Here, “carrier concentration” refers to the carrier concentration obtained by Hall effect measurement.

Claims (6)

A method of manufacturing an oxide semiconductor on a surface of a substrate by a sputtering method using a target including In, Ga, Zn, Sn, or a combination thereof,
Forming a thin film on the surface of the substrate by atoms sputtered from the target;
Irradiating the thin film with active species containing oxygen radicals generated by plasma,
An oxide semiconductor manufacturing method, wherein the film forming step and the active species irradiation step are alternately repeated a plurality of times. Sputtering time in the film forming step is 0.01 second or more and 0.08 second or less per time,
The method for producing an oxide semiconductor according to claim 1, wherein the active species irradiation time in the active species irradiation step is 0.01 second or more and 0.08 seconds or less per time.   The method for producing an oxide semiconductor according to claim 1, wherein the plasma is generated by ionization of a gas containing an inert gas.   The method for manufacturing an oxide semiconductor according to claim 1, wherein the target contains In, Ga, and Zn. An oxide semiconductor thin film containing In, Ga, Zn, Sn, or a combination thereof,
The carrier concentration is 1 × 10 ¹² cm ⁻³ or more and 5 × 10 ¹³ cm ⁻³ or less,
An oxide semiconductor thin film in which an absolute value of a difference between a threshold voltage and a threshold voltage before heat treatment in a MOS structure after heat treatment at 300 to 320 ° C. for 30 minutes is 8 V or less.   A thin film transistor using the oxide semiconductor thin film according to claim 5.

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