JP2017175093A - Electronic component, connection body, and method of designing electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component which is improved in particle capture rate, prevention of short circuit and adhesive strength while attaining a low profile of an electrode.SOLUTION: In an electronic component 1 including: a substrate 2; electrode regions 4, 6 provided on one surface 2a side of the substrate 2 and in which a plurality of electrodes 3 and 5 are arranged; and a non-electrode region 10 where electrodes 3, 5 are not formed, brought into pressure contact with a component to be connected via an anisotropic conductive adhesive 30, one or a plurality of recesses 9 into which the anisotropic conductive adhesive 30 flows are formed in the non-electrode region 10.SELECTED DRAWING: Figure 1

Description

  The present technology relates to an electronic component connected on a circuit board via an anisotropic conductive adhesive, a connection body in which the electronic component is connected on the circuit board, and an electronic component design method.

  2. Description of the Related Art Conventionally, a connection body is provided in which electronic components such as an IC chip and an LSI chip are connected to circuit boards of various electronic devices. In recent years, various electronic devices use IC chips or LSI chips in which bumps, which are protruding electrodes, are arranged on the mounting surface as electronic components from the viewpoints of fine pitch, light weight, and thinning. A so-called COB (chip on board), COG (chip on glass), COF (chip on film), etc., in which electronic components such as these are directly mounted on a circuit board are employed.

  In the COB connection, the COG connection, and the COF connection, an IC chip is thermocompression-bonded on a terminal portion of a circuit board via an anisotropic conductive film. An anisotropic conductive film is a film formed by mixing conductive particles in a thermosetting binder resin, and heat conduction is carried out between two conductors so that electrical conduction between the conductors can be achieved with the conductive particles. And the mechanical connection between the conductors is maintained by the binder resin. As an adhesive constituting the anisotropic conductive film, a photocurable resin or an adhesive using both thermosetting and photocuring is used in addition to a highly reliable thermosetting adhesive.

  For example, as shown in FIGS. 15A and 15B, the bumped IC chip 50 has an input bump area 52 in which input bumps 51 are arranged in a line along one side edge 50a on the mounting surface of the circuit board. An output bump region 54 in which output bumps 53 are arranged in two rows in a zigzag manner is provided along the other side edge 50b that is formed and faces one side edge 50a. The bump arrangement varies depending on the type of IC chip. In general, a conventional IC chip with bumps has a larger number of output bumps 53 than the number of input bumps 51, and an output bump area 54 than the area of the input bump area 52. And the shape of the input bump 51 is formed larger than the shape of the output bump 53.

  In COG mounting, after the IC chip 50 is mounted on the electrode terminal 57 of the circuit board 56 via the anisotropic conductive film 55, the thermocompression bonding tool 58 is used from above the IC chip 50 via the buffer material 60. Heat and press. By the heat pressing by the thermocompression bonding tool 58, the binder resin of the anisotropic conductive film 55 is melted and flows from between the input / output bumps 51, 53 and the electrode terminals 57 of the circuit board 56, and each input / output. Conductive particles are sandwiched between the bumps 51 and 53 and the electrode terminal 57 of the circuit board 56, and in this state, the binder resin is thermally cured. As a result, the IC chip 50 is electrically and mechanically connected to the circuit board 56.

JP 2014-222701 A

  2. Description of the Related Art In recent years, electronic components on which electronic components are mounted and circuit boards on which electronic components are mounted have become smaller, thinner, and more integrated, and the mounting area for electronic components has been narrowed. Even in such a case, in order to ensure the conductive connection reliability of the electronic component when an external stress is applied, further improvement in adhesive strength is desired.

  In addition, if an attempt is made to reduce the thickness of the electronic component and reduce the cost by reducing the height of the bump, the conductive particles are likely to come into excessive contact with the space between the bumps, increasing the risk of occurrence of a short circuit between the bumps. Moreover, if it is going to be filled with binder resin by low profile, it is necessary to change a viscosity condition conventionally, and there is a concern about the increase in a design man-hour.

  In addition, as the number of bumps increases as electronic parts become highly integrated, the number of conductive particles sandwiched between the bumps by anisotropic conductive connection also increases, so the force required for pressing increases proportionally. It tends to go.

  However, when the pressing force is increased, the load on the electronic component increases, which may cause damage. In addition, a pressing force is locally applied to the input / output bump area of the electronic component, and there is a possibility that warping and floating may occur together with the downsizing and thinning of the electronic component.

  In addition, a technology to form through-holes in the area between bumps on the board of the electronic component is also proposed to prevent the conductive resin from being insufficiently removed in the crimping process of the electronic component due to the low profile of the bump. Has been. However, the binder resin may travel to the pressing surface of the electronic component through the through hole formed in the substrate, and the thermocompression bonding tool may be soiled. Or, as a cushioning material that is used between the thermocompression bonding tool and the pressing surface of the electronic component, and the cushioning material is based on the assumption that it is used repeatedly, such as silicon rubber, the contamination by the binder resin is not stable. Therefore, it causes an unexpected failure.

  In addition, with the downsizing, thinning, high functionality, etc. of electronic devices on which electronic components are mounted, the fine pitch of circuit wiring is also progressing. Thereby, it is necessary to increase the particle density of the conductive particles dispersed in the anisotropic conductive film and ensure the particle trapping rate even on a fine electrode. On the other hand, there is a problem that the conductive particles filled with high density in the space between adjacent narrowed bumps aggregate and the risk of shorting between bumps increases, improving the particle capture rate and preventing shorting between bumps Need to be compatible.

  In order to prevent a short circuit between bumps, a method of expanding the bump area by increasing the height of the bump of the electronic component is also conceivable, but the downsizing and low profile of the electronic component are impaired, and the anisotropic conductivity required for connection The amount of adhesive increases, and the pressing force by the thermocompression bonding tool also increases.

  The present technology has been made in view of such problems, and an electronic component, a connection body, and an electronic component that are improved in particle capture rate, short-circuit prevention, and improved adhesive strength while reducing the height of the electrode. The purpose is to provide a design method.

  In order to solve the above-described problems, an electronic component according to an embodiment of the present technology includes a substrate, an electrode region provided on one surface side of the substrate, and a plurality of electrodes arranged, and a non-electrode region where the electrodes are not formed. And one or a plurality of depressions are formed in the non-electrode region.

  Further, the connection body according to the present technology is a connection body in which the first electronic component and the second electronic component are connected via an anisotropic conductive adhesive, wherein at least one of the electronic components includes a substrate, Provided on one side of the substrate connected to the circuit board, and having an electrode region in which a plurality of electrodes are arranged, and a non-electrode region in which the electrode is not formed. One or a plurality of depressions into which the anisotropic conductive adhesive flows are formed.

  Further, the electronic component design method according to the present technology includes a substrate, an electrode region provided on one side of the substrate, in which a plurality of electrodes are arranged, and a non-electrode region where the electrode is not formed. One or a plurality of depressions are formed in the non-electrode region.

  According to the present technology, by providing the recess, when the electronic component is heated and pressed onto the connection target component via the anisotropic conductive adhesive, the binder resin flows into the recess. Therefore, the contact area between the electronic component and the binder resin is increased, and the anchor effect is exhibited by the binder resin filled in the recess, thereby improving the adhesive strength to the connection target component. In addition, the stress is relieved by the binder resin, and it is possible to prevent peeling of the electronic component, and to prevent warping and lifting.

  In addition, the anisotropic conductive adhesive reduces the amount of indentation of the electronic component caused by the resin flow due to the inflow of the binder resin into the recess, so that pressure due to the indentation of the electronic component into the binder resin is absorbed. The pressure can be pressed at a low pressure and the flow of the conductive particles is suppressed. Therefore, it is possible to reduce the load on the electronic component, prevent warping and floating, and to easily capture particles even between the fine pitched electrodes, and to reduce the occurrence of a short circuit between adjacent electrodes.

1A is a cross-sectional view showing a process of anisotropically connecting an IC chip to a circuit board, and FIG. 1B is a cross-section showing a connection body in which the IC chip is anisotropically conductively connected to the circuit board. FIG. FIG. 2 is a plan view showing an IC chip in which circular non-through holes are formed in the inter-bump region along the longitudinal direction of the substrate. FIG. 3A is a perspective view showing a process of anisotropically connecting an IC chip in which circular non-through holes are formed in a staggered pattern to a circuit board, and FIG. FIG. 3C is a perspective view showing a process of anisotropically conductively connecting the IC chips formed on both ends in the longitudinal direction to the circuit board, and FIG. 3C shows a circular non-through hole formed in the central part in the longitudinal direction of the board. It is a perspective view which shows the process of carrying out anisotropic conductive connection of the manufactured IC chip to a circuit board. FIG. 4 is a plan view showing an IC chip in which grooves are formed in the inter-bump region along the longitudinal direction of the substrate. FIG. 5A is a perspective view showing a step of anisotropically connecting an IC chip in which grooves are formed in a broken line shape in the longitudinal direction of the substrate to the circuit substrate, and FIG. FIG. 5C is a perspective view showing a process of anisotropically conductively connecting an IC chip in which grooves are formed in a dot-and-dash line shape in the longitudinal direction of the substrate to the circuit substrate, and FIG. FIG. 5D is a perspective view showing a step of anisotropically conductively connecting an IC chip formed in a two-dot chain line in a direction to a circuit board, and FIG. 5D shows an IC chip in which grooves are formed in a curved shape in the longitudinal direction of the board. It is a perspective view which shows the process of anisotropically conducting connection to a circuit board. FIG. 6A is a perspective view showing a step of anisotropically conductively connecting an IC chip in which grooves are formed in a direction perpendicular to the longitudinal direction of the substrate to the circuit board, and FIG. FIG. 6C is a perspective view showing a process of anisotropically conductively connecting an IC chip formed in a direction oblique to a direction to a circuit board, and FIG. 6C is an IC in which grooves are formed in a direction oblique to the longitudinal direction of the board. It is a perspective view showing the process of carrying out anisotropic conductive connection of a chip to a circuit board. FIG. 7 is a perspective view showing a process of anisotropically conductively connecting an IC chip formed with a groove facing the side surface in the longitudinal direction of the substrate to the circuit board. 8A is a plan view showing an IC chip in which a circular non-through hole is formed in the outer edge portion of the substrate, and FIG. 8B is a plan view showing the IC chip in which a groove is formed in the outer edge portion of the substrate. is there. FIG. 9A is a plan view showing an IC chip in which a circular non-through hole is formed in the outer edge portion of the substrate, and FIG. 9B is a plan view showing the IC chip in which a groove is formed in the outer edge portion of the substrate. is there. FIG. 10A is a cross-sectional view showing the structure of the anisotropic conductive film, and FIG. 10B shows the structure of the anisotropic conductive film in which the conductive particle-containing layer and the insulating adhesive layer are laminated. It is sectional drawing shown. 11A and 11B are diagrams showing an anisotropic conductive film in which conductive particles are regularly arranged in a lattice shape, where FIG. 11A is a plan view and FIG. 11B is a cross-sectional view. 12A and 12B are diagrams showing an anisotropic conductive film in which conductive particles are regularly arranged in a hexagonal lattice shape. FIG. 12A is a plan view and FIG. 12B is a cross-sectional view. FIGS. 13A and 13B are diagrams showing an anisotropic conductive film in which conductive particles that are non-contact with each other and are independent are irregularly omnipresent, where FIG. 13A is a plan view and FIG. 13B is a cross-sectional view. 14A and 14B are diagrams showing an anisotropic conductive film in which conductive particles are randomly dispersed. FIG. 14A is a plan view and FIG. 14B is a cross-sectional view. FIG. 15A is a plan view of an IC chip with bumps, and FIG. 15B is a cross-sectional view showing a connection process.

  Hereinafter, a method for designing an electronic component, a connection body, and an electronic component to which the present technology is applied will be described in detail with reference to the drawings. In addition, this technique is not limited only to the following embodiment, Of course, a various change is possible in the range which does not deviate from the summary of this technique. Further, the drawings are schematic, and the ratio of each dimension may be different from the actual one. Specific dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

[Connector 20]
As shown in FIGS. 1 (A) and 1 (B), the connection body 20 has an IC chip 1 as a first electronic component on an anisotropic conductive film (ACF: Anisotropic film) on a circuit board 14 as a second electronic component. Conductive Film) is a connection body connected via an adhesive such as 30. The connection body 20 is formed by heating and pressing the IC chip 1 onto the circuit board 14 with the thermocompression bonding tool 40 through the buffer material 15, and the input / output bumps 3, 5 provided on the mounting surface of the IC chip 1 and the circuit board. The input / output terminals 16 and 17 provided at 14 are conductively connected. Here, the first electronic component refers to an electronic component disposed on the side pressed by the pressing tool, and the second electronic component is disposed on the pedestal and receives pressure from the first electronic component. Is. In general, the first electronic component is an IC chip or an FPC, and the second electronic component is a transparent substrate having a circuit such as glass.

[IC chip]
The IC chip 1 has a substrate 2, and one surface 2 a of the substrate 2 is a mounting surface on which input / output bumps are arranged and mounted on the circuit substrate 14 via the anisotropic conductive film 30, and is opposite to the one surface 2 a. The other surface 2 b is a pressing surface that is heated and pressed by the thermocompression bonding tool 40.

  The IC chip 1 is an element in which a semiconductor circuit is formed on a substrate 2 made of, for example, a silicon substrate, and input / output bumps 3 and 5 are formed on one surface of the substrate 2. A plurality of IC chips 1 are formed on a silicon wafer and are separated by dicing. The IC chip 1 may be a package component in which a circuit is formed on an insulating substrate such as a glass epoxy or a ceramic substrate.

  As shown in FIG. 2, the substrate 2 has a substantially rectangular shape, and an output bump region 4 and an input bump in which output bumps 3 are arranged along a pair of side edges 2c and 2d facing each other in the length direction. An input bump region 6 in which 5 is arranged is formed. In the IC chip 1, the output bump region 4 is formed on one side edge 2 c side of the substrate 2, and the input bump region 6 is formed on the other side edge 2 d side of the substrate 2. Thereby, in the IC chip 1, the output bump region 4 and the input bump region 6 are formed apart from each other in the width direction of the mounting surface 2, and the inter-bump region in which no bump is formed at the center of the mounting surface 2. 7 is provided.

  In the output bump region 4, a plurality of output bumps 3 are arranged along the longitudinal direction of the substrate 2, for example, so that two output bump rows 3 </ b> A and 3 </ b> B are formed in order from one side edge 2 c side. . Further, the output bumps 3 of each of the output bump rows 3A and 3B are arranged in a staggered manner.

  In the input bump area 6, for example, an input bump row 5 </ b> A in which a plurality of input bumps 5 are arranged in a row along the longitudinal direction of the substrate 2 is formed. The input bump 5 is formed larger than the output bump 3. As a result, the IC chip 1 has an output bump area 4 and an input bump area 6 having an area difference and is asymmetrically arranged on the substrate 2. The input / output bumps 3 and 5 may be formed with the same size.

  As the input / output bumps 3 and 5, for example, copper bumps, gold bumps, or copper bumps plated with gold are suitably used. The input / output bumps 3 and 5 are provided in an arrangement corresponding to the input / output terminals 16 and 17 provided on the circuit board 14, and the IC chip 1 is aligned and connected to the circuit board 14. The input / output terminals 16 and 17 are connected through the anisotropic conductive film 30.

  In addition to the arrangement shown in FIG. 2, the input / output bumps 3 and 5 may be arranged in one or more rows on one side edge and in one or more rows on the other side edge. There may be. In addition, the input / output bumps 3 and 5 may have a plurality of rows in one row arrangement, and a portion of the plurality of rows may be one row. Further, the input / output bumps 3 and 5 may be formed in a straight array in which a plurality of rows are parallel and adjacent electrode terminals are parallel, or a plurality of rows of parallel and adjacent electrode terminals are It may be formed in a staggered arrangement that is shifted evenly.

  With recent downsizing, high functionality, and cost reduction of liquid crystal display devices and other electronic devices, electronic components such as IC chip 1 are also required to be downsized, low profile, and low cost. 3 and 5 also have a low height H (not particularly limited, for example, 3 to 15 μm).

[Dent]
Further, the IC chip 1 is provided with one or a plurality of depressions 9 into which the binder resin 33 of the anisotropic conductive film 30 flows in the non-electrode region 10 of the one surface 2 a of the substrate 2. The non-electrode region 10 refers to a region other than the output bump region 4 and the input bump region 6, and is, for example, the above-described inter-bump region 7. The recess 9 provided in the non-electrode region 10 is, for example, a circular non-through hole 9a or a groove 9b (see FIGS. 2 and 4).

  By providing the depression 9 in the non-electrode region 10, when the IC chip 1 is heated and pressed onto the mounting surface of the circuit board 14 via the anisotropic conductive film 30, the binder resin 33 of the anisotropic conductive film 30 is provided. Flows into the recess 9. Therefore, in the IC chip 1, the contact area of the binder resin 33 is increased and the anchor effect is expressed by the binder resin 33 filled in the recess 9, whereby the adhesive strength to the circuit board 14 is improved.

  In addition, the connection body 20 in which the IC chip 1 is anisotropically conductively connected to the circuit board 14 increases the resin volume of the binder resin 33 that relieves stress between the circuit board 14 and the IC chip 1, so that the circuit The load on the bonding interface between the substrate 14 and the IC chip 1 is reduced, and the IC chip 1 can be prevented from peeling off.

  Furthermore, the connection body 20 can improve the connection reliability because the stress between the circuit board 14 and the IC chip 1 is relieved, so that the warpage of the IC chip 1 and the circuit board 14 is also suppressed. In the case where the substrate 14 constitutes a transparent substrate of a display panel such as an LCD panel, for example, the influence of warping on the display unit can be suppressed, and display unevenness can be prevented.

  In addition, when the binder resin 33 flows into the recess 9 in the connection body 20, the amount of pressing of the IC chip 1 is reduced by the amount of the resin that has flowed in, and the pressing force by the thermocompression bonding tool 40 can be reduced. Therefore, the connection body 20 can reduce the load caused by the thermocompression bonding tool 40, can suppress the warpage of the IC chip 1 and the circuit board 14, and can prevent the IC chip 1 from being damaged. Moreover, the connection body 20 can also discharge | emit the binder resin 33 and can fully clamp the electroconductive particle 32 also by crimping by a lower pressure, and can maintain favorable conduction | electrical_connection reliability.

  Further, in the connection body 20, the pressure due to the input / output bumps 3, 5 being pushed into the binder resin 33 is absorbed by the inflow of the binder resin 33 into the depression 9, and the influence on the conductive particles 32 can be suppressed. Accordingly, since the flow of the conductive particles 32 is suppressed, the connection body 20 can capture particles even between the input / output bumps 3 and 5 and the input / output terminals 16 and 17 that are fine pitched, and between the bumps. The occurrence of short circuit can be reduced.

  In addition, since the stress between the circuit board 14 and the IC chip 1 is relieved, the connection body 20 causes the pressing marks of the conductive particles 32 observed on the input / output bumps 3 and 5 to become the input / output bump array. It appears in the same way on the inner side and the outer side, and it can be easily confirmed that the conduction reliability is improved.

  Here, the input / output bump areas 4 and 6 are arranged when the input / output bump rows 3A, 3B, and 5A are arranged along one side and the other side of the pair of side edges 2c and 2d facing each other of the substrate 2. The recess 9 can be formed in parallel with the pair of side edges 2c and 2d facing each other in the inter-bump region 7.

  For example, as shown in FIG. 2, the recess 9 includes a circular non-through hole 9 a. A plurality of the non-through holes 9 a are formed in the inter-bump region 7 in parallel with the side edges 2 c and 2 d of the substrate 2. As a method of forming the non-through hole 9a in the substrate 2, for example, a known method such as mechanical drilling, chemical etching, sand blasting, electron beam machining, electric discharge machining, laser drilling, or the like can be used.

  The non-through holes 9a may be arranged in a row in the inter-bump region 7 or may be arranged in a plurality of rows. Further, as shown in FIG. 3A, the non-through holes 9a may be arranged in a staggered manner. Further, the non-through holes 9a may be formed only at both ends in the longitudinal direction of the substrate 2 (FIG. 3B), or may be formed only in the central portion in the longitudinal direction of the substrate 2 (FIG. 3). (C)).

  Further, the filling amount of the binder resin 33 may be changed by changing the size and arrangement of the non-through holes 9 a for each location of the substrate 2. That is, the non-through holes 9a may be locally arranged in one or a plurality of rows. Further, the non-through holes 9a may have the same opening depth or may have different opening depths. Further, the non-through holes 9a may have the same opening diameter or may have different opening diameters.

  For example, the connection body 20 has an opening diameter of the non-through hole 9 a formed at both ends in the longitudinal direction of the substrate 2 formed in a rectangular shape, and an opening diameter of the non-through hole 9 a formed in the center portion of the substrate 2. By forming a larger diameter than that, it is possible to fill the both ends of the substrate 2 with more binder resin 33 to improve the adhesive strength, to prevent the floating at both ends of the IC chip 1, and to improve the conduction reliability. Can be improved.

  Further, the opening diameter of the non-through hole 9a formed in the central portion of the substrate 2 of the substrate 2 formed in a rectangular shape is larger than the opening diameter of the non-through hole 9a formed at both ends in the longitudinal direction. By forming, the filling amount of the binder resin 33 in the central portion of the substrate 2 that is relatively difficult to dissipate heat can be increased to relieve stress due to heat shrinkage and suppress warping. Further, in the inter-bump region 7, the input / output bump regions 4 and 6 serve as fulcrums, and the pressing force of the thermocompression bonding tool 40 is easily concentrated, and the resin is easily removed, but in the recess 9 formed in the inter-bump region 7. By causing a large amount of the binder resin 33 to flow in, stress relaxation and warpage can be prevented without excessively removing the binder resin 33.

  The dimensions and arrangement of such non-through-holes 9a include the bond strength produced by the substrate dimensions and material of the IC chip 1, the melt viscosity of the binder resin 33, the pressure bonding temperature, pressure, time, etc. to the circuit board 14, It can design suitably according to the subject regarding adhesiveness, such as curvature and a float.

  The non-through hole 9a may have any opening shape such as an ellipse, a rectangle, a rounded rectangle, a polygon, etc., in addition to a circle.

  Moreover, as shown in FIG. 4, the hollow 9 is good also as the groove | channel 9b. The groove 9 b can be formed in the inter-bump region 7 in parallel with the side edges 2 c and 2 d of the substrate 2. The grooves 9b may be arranged in a row in the inter-bump region 7 or may be arranged in a plurality of rows. As a method for forming the groove 9b in the substrate 2, known methods such as chemical etching, sand blasting, electron beam machining, electric discharge machining, and laser machining can be used. For example, dicing for cutting out the IC chip 1 from the silicon wafer. In the process, grooving is preferable in terms of production efficiency.

  Further, the filling amount of the binder resin 33 may be changed by changing the dimensions and arrangement of the grooves 9b for each location of the substrate 2. That is, the grooves 9b may be locally arranged in one or a plurality of rows. Further, the groove 9b may have the same depth over the entire length, or the depth may vary. Further, the groove 9b may have the same width over the entire length, or the width may vary. However, it is preferable in terms of manufacturing efficiency that the grooves 9b are linear and have the same width and depth over the entire length. In addition, the grooves 9b are preferable in terms of manufacturing efficiency even if depressions having the same width are scattered in a virtual straight line.

  Further, the groove 9b may be formed continuously over the longitudinal direction of the substrate 2, or may be formed in a broken line shape as shown in FIG. In addition, the recesses 9 may be mixed with the grooves 9b and the non-through holes 9a and arranged, for example, in a one-dot chain line shape (FIG. 5B) or a two-dot chain line shape (FIG. 5C). Further, the groove 9b may be formed in a curved shape (FIG. 5D) in addition to being formed in a linear shape.

  Further, the groove 9b is formed in parallel to the pair of opposing side edges 2c and 2d of the substrate 2 as well as in a direction orthogonal to the side edges 2c and 2d of the substrate 2 as shown in FIG. 6B and 6C, it may be formed in a direction oblique to the side edges 2c and 2d of the substrate 2, or the side edges 2c and 2d of the substrate 2 Parallel, orthogonal, and oblique grooves 9b may be mixed. The connection body 20 can improve resistance to external forces in all directions of the IC chip 1 by forming the grooves 9b obliquely intersecting the side edges 2c and 2d of the substrate 2.

  Further, the groove 9b may be formed only at both ends in the longitudinal direction of the substrate 2 as in the non-through hole 9a, or may be formed only in the central portion of the substrate 2 in the longitudinal direction.

  The connection body 20 can suppress the amount of the binder resin 33 flowing out of the substrate 2 when the IC chip 1 is heated and pressed by the binder resin 33 flowing into the recess 9. Therefore, even if the frame area where the IC is mounted on the LCD panel or the like is narrowed, the amount of the binder resin 33 flowing out into the frame area can be suppressed, and the fillet can be adjusted appropriately. For example, when the mounting area is small, it is possible to contribute to the miniaturization and thinning of the connection body 20 by setting the minimum fillet size suitable for the adhesive strength.

  As shown in FIG. 7, the groove 9 b may face the side surface of the substrate 2. As a result, the binder resin 33 that has flowed into the groove 9b can flow out from the opening 11 of the groove 9b facing the side surface of the substrate 2, and the flow of the binder resin 33 during heating and pressing can be controlled. Further, since the binder resin 33 that has flowed out from the opening 11 to the side surface of the substrate 2 forms a fillet, the place where the fillet is generated can be controlled to a predetermined place. This is also desirable in the design and manufacture of the connection structure when the mounting area is small.

  8A and 8B, the recess 9 (non-through hole 9a, groove 9b) is formed between the side edges 2c, 2d of the substrate 2 and the input / output bump rows 3A, 3B, 5A. You may form in the outer edge part 2e. 9A and 9B, the recess 9 (non-through hole 9a, groove 9b) includes a pair of side edges 2f and 2g orthogonal to the side edges 2c and 2d of the substrate 2 and input / output bumps. You may form in the outer edge 2h between row | line | column 3A, 3B, 5A. In addition, the recess 9 may be formed in the space between the input / output bump rows 3A and 3B or in the case where spaces are formed in the input / output bump rows 3A, 3B, and 5A. .

[Depth depth D with respect to substrate thickness T]
Here, the depth D of the recess 9 is preferably 50% or less of the thickness T of the substrate 2. As the depth D of the recess 9 is increased, the inflow amount of the binder resin 33 is increased, and the adhesiveness such as improvement of the adhesive strength, warpage, and suppression of floating is improved. On the other hand, as the depth D of the recess 9 is increased, the rigidity of the substrate 2 is reduced, and the resistance to a load applied when the IC chip 1 is heated and pressed is reduced. Therefore, the depth D of the recess 9 is determined by the material, dimensions, and bonding conditions of the substrate 2. In the case of a silicon substrate generally used as the substrate 2 of the IC chip 1, the depth D of the recess 9 is It is preferable to set it to 50% or less of the thickness T of 2, and even if it is 50% or less, the adhesiveness can be sufficiently improved.

  In addition, the IC chip 1 promotes the reduction in the height and cost of the IC chip 1 by reducing the height H of the input / output bumps 3 and 5, and the connection body 20 can be reduced in size and cost. Can be realized. The anisotropic conductive film 30 can reduce the thickness of the binder resin 33 in accordance with the reduction in the height of the input / output bumps 3 and 5, and the pressure of the IC chip 1 can be reduced by the effect of the inflow of the resin into the recess 9. Further reduction can be achieved. Therefore, by pressing the IC chip 1 at a low pressure, the load on the IC chip 1 can be reduced, and the conductive particles can be sufficiently pushed in to ensure conductivity.

[Circuit board]
The circuit board 14 is selected according to the use of the connection body 20, and the type thereof is not limited, for example, a glass substrate, a glass epoxy substrate, a ceramic substrate, a flexible substrate, or the like. The circuit board 14 has input / output terminals 16 and 17 connected to the input / output bumps 3 and 5 provided on the IC chip 1. The input / output terminals 16 and 17 have the same arrangement as the arrangement of the input / output bumps 3 and 5. The circuit board 14 may be the IC chip 1. In this case, the connection body 20 is obtained by stacking the IC chips 1 in multiple layers.

  The connecting body 20 forms the above-described depression 9 (non-through hole 9a, groove 9b) in the circuit board 14 serving as the second electronic component instead of or together with the IC chip 1 serving as the first electronic component. May be. The connection body 20 also has the same effect as that formed in the IC chip 1 by forming the depression 9 in the non-electrode region where the input / output terminals 16 and 17 of the circuit board 14 are not formed. Further, when the connection body 20 is a stack of the IC chips 1 in multiple layers, the connection body 20 may form a recess 9 in the substrate 2 of one and / or the other IC chip 1 to be stacked.

[Alignment mark]
The IC chip 1 and the circuit board 14 are provided with an alignment mark (not shown) that aligns the IC chip 1 with the circuit board 14 by overlapping the IC chip 1 and the circuit board 14. As the substrate-side alignment mark and the IC-side alignment mark, various marks that can be aligned with the circuit board 14 and the IC chip 1 can be used. Since the wiring pitch of the input / output terminals of the circuit board 14 and the fine pitches of the input / output bumps 3 and 5 of the IC chip 1 are increasing, the IC chip 1 and the circuit board 14 are required to have high-precision alignment adjustment. There are many cases.

  Further, by using the recess 9 as an alignment mark on the IC chip 1 side, for example, after performing approximate positioning, the alignment process is performed with a separately provided alignment mark, thereby improving the efficiency of the alignment process. You can also.

[Dummy bump]
Further, the IC chip 1 has a dummy bump area in which so-called dummy bumps that are not used for input / output of signals and the like are arranged between the output bump area 4 and the input bump area 6 if the restrictions on the bump layout and the number of manufacturing steps allow. You may provide suitably.

[adhesive]
As an adhesive for connecting the IC chip 1 to the circuit board 14, an anisotropic conductive film 30 can be suitably used. As shown in FIG. 10 (A), the anisotropic conductive film 30 is usually one in which a binder resin 33 containing conductive particles 32 is laminated on a base film 31 serving as a base material. As shown in FIG. 1, the anisotropic conductive film 30 connects the circuit board 14 and the IC chip 1 by interposing a binder resin 33 between the circuit board 14 and the IC chip 1. The conductive particles 32 are sandwiched between the bumps 3 and 5 and the input / output terminals 16 and 17 and are used for conduction.

  The adhesive composition of the binder resin 33 is composed of a normal binder component containing, for example, a film-forming resin, a thermosetting resin, a latent curing agent, a silane coupling agent, and the like.

  As the film-forming resin, a resin having an average molecular weight of about 10,000 to 80,000 is preferable, and various resins such as an epoxy resin, a modified epoxy resin, a urethane resin, and a phenoxy resin are particularly mentioned. Among these, phenoxy resin is preferable from the viewpoint of film formation state, connection reliability, and the like.

  It does not specifically limit as a thermosetting resin, For example, a commercially available epoxy resin, an acrylic resin, etc. can be used.

  The epoxy resin is not particularly limited. For example, naphthalene type epoxy resin, biphenyl type epoxy resin, phenol novolac type epoxy resin, bisphenol type epoxy resin, stilbene type epoxy resin, triphenolmethane type epoxy resin, phenol aralkyl type epoxy resin. Naphthol type epoxy resin, dicyclopentadiene type epoxy resin, triphenylmethane type epoxy resin and the like. These may be used alone or in combination of two or more.

  There is no restriction | limiting in particular as an acrylic resin, According to the objective, an acrylic compound, liquid acrylate, etc. can be selected suitably. For example, methyl acrylate, ethyl acrylate, isopropyl acrylate, isobutyl acrylate, epoxy acrylate, ethylene glycol diacrylate, diethylene glycol diacrylate, trimethylolpropane triacrylate, dimethylol tricyclodecane diacrylate, tetramethylene glycol tetraacrylate, 2-hydroxy- 1,3-diacryloxypropane, 2,2-bis [4- (acryloxymethoxy) phenyl] propane, 2,2-bis [4- (acryloxyethoxy) phenyl] propane, dicyclopentenyl acrylate, tricyclo Examples include decanyl acrylate, tris (acryloxyethyl) isocyanurate, and urethane acrylate. In addition, what made acrylate the methacrylate can also be used. These may be used individually by 1 type and may use 2 or more types together.

  The latent curing agent is not particularly limited, and examples thereof include a heat curing type curing agent. The latent curing agent does not normally react, but is activated by various triggers selected according to applications such as heat, light, and pressure, and starts the reaction. The activation method of the thermal activation type latent curing agent includes a method of generating active species (cation, anion, radical) by a dissociation reaction by heating, etc., and it is stably dispersed in the epoxy resin near room temperature, and epoxy at high temperature There are a method of initiating a curing reaction by dissolving and dissolving with a resin, a method of initiating a curing reaction by eluting a molecular sieve encapsulated type curing agent at a high temperature, and an elution / curing method using microcapsules. Thermally active latent curing agents include imidazole, hydrazide, boron trifluoride-amine complexes, sulfonium salts, amine imides, polyamine salts, dicyandiamide, etc., and modified products thereof. The above mixture may be sufficient. As the radical polymerization initiator, a known one can be used, and among them, an organic peroxide can be preferably used.

  Although it does not specifically limit as a silane coupling agent, For example, an epoxy type, an amino type, a mercapto sulfide type, a ureido type etc. can be mentioned. By adding the silane coupling agent, the adhesion at the interface between the organic material and the inorganic material is improved.

[Conductive particles]
Examples of the conductive particles 32 contained in the binder resin 33 include any known conductive particles used in anisotropic conductive films. That is, as the conductive particles, for example, particles of various metals and metal alloys such as nickel, iron, copper, aluminum, tin, lead, chromium, cobalt, silver, gold, metal oxide, carbon, graphite, glass, ceramic Examples thereof include those in which the surface of particles such as plastic is coated with metal, or those in which the surface of these particles is further coated with an insulating thin film. In the case where the surface of the resin particle is coated with metal, examples of the resin particle include an epoxy resin, a phenol resin, an acrylic resin, an acrylonitrile / styrene (AS) resin, a benzoguanamine resin, a divinylbenzene resin, a styrene resin, and the like. Can be mentioned. The size of the conductive particles 32 is preferably 1 to 10 μm, but is not limited thereto.

  The adhesive composition constituting the binder resin 33 is not limited to the case where it contains a film-forming resin, a thermosetting resin, a latent curing agent, a silane coupling agent, etc. You may make it comprise any material used as an adhesive composition.

Here, an example of the minimum melt viscosity range of the binder resin 33 is 10 to 1 × 10 ⁵ Pa · s. Of course, the minimum melt viscosity range of the binder resin 33 is not limited to this range. The minimum melt viscosity of the binder resin 33 is, for example, a rotary rheometer (TA instrument), a temperature rising rate of 10 ° C./min, a measurement pressure of 5 g, and a measurement plate having a diameter of 8 mm. Then, it can be obtained by measuring.

  The base film 31 that supports the binder resin 33 is coated with a release agent such as silicone on PET (Poly Ethylene Terephthalate), OPP (Oriented Polypropylene), PMP (Poly-4-methylpentene-1), PTFE (Polytetrafluoroethylene), and the like. Thus, the anisotropic conductive film 30 is prevented from drying and the shape of the anisotropic conductive film 30 is maintained.

  The anisotropic conductive film 30 may be produced by any method, but can be produced, for example, by the following method. An adhesive composition containing a film-forming resin, a thermosetting resin, a latent curing agent, a silane coupling agent, conductive particles 32 and the like is prepared. The adjusted adhesive composition is applied onto the base film 31 using a bar coater, a coating device, and the like, and dried by an oven or the like, whereby the anisotropic conductive film 30 in which the binder resin 33 is supported on the base film 31 is obtained. obtain.

  The shape of the anisotropic conductive film 30 is not particularly limited. For example, as shown in FIG. 10, the shape of the anisotropic conductive film 30 is a long tape shape that can be wound around the take-up reel 36, and is used by cutting a predetermined length. can do. The anisotropic conductive film 30 may be laminated with a release film (not shown) on the surface of the binder resin 33 that is not supported by the base film 31.

[Conductive particle non-contact ACF / arrangement type ACF]
Here, as the anisotropic conductive film 30, a film in which conductive particles 32 that exist independently in a non-contact manner according to the bump area and layout are ubiquitous can be suitably used in plan view. This is preferably such that 95% or more of the total number of conductive particles are present independently, and more preferably 99% or more are present independently. A unit in which a plurality of conductive particles 32 are intentionally brought into contact is counted as one unit. Further, such a state in which the conductive particles 32 exist independently without being in contact with each other may be created by intentionally disposing the conductive particles 32 at predetermined positions.

  For example, as shown in FIGS. 13A and 13B, the conductive particles 32 that are non-contact and independent from each other are ubiquitous in the binder resin 33 in a state in which the distance between the particles is irregular in a plan view. That is, it may exist at different distances depending on the direction. The conductive particles 32 are arranged in a predetermined arrangement pattern, and are regularly arranged in a tetragonal lattice shape or a hexagonal lattice shape as shown in FIGS. 11 (A), (B) and FIGS. 12 (A), (B). By arranging them regularly, they may be present independently of each other in a plan view. The arrangement pattern of the conductive particles 32 can be set arbitrarily, and may be set as appropriate according to the bump area and layout.

  When the conductive particles 32 exist independently from each other in a plan view, the conductive particles 32 are randomly dispersed in the anisotropic conductive film 30 as shown in FIGS. 14A and 14B. Compared with the case where the distribution of the conductive particles is sparse due to the formation of aggregates, etc., the probability that each of the conductive particles 32 is captured is improved, so that the same highly integrated IC chip 1 In the anisotropic connection, the blending amount of the conductive particles 32 can be reduced. As a result, when the conductive particles 32 are randomly dispersed, the number of conductive particles is required to be equal to or larger than a certain amount, so that aggregates and connections are generated in the spaces between adjacent input bumps 3 and output bumps 5. Although there was a concern, the occurrence of such a short circuit between the bumps can be suppressed by making them in a non-contact and independent state in plan view, and the input / output bumps 3 and 5 and the input / output terminals 16 and 17 can be suppressed. It is possible to reduce the number of conductive particles 32 that do not contribute to conduction between them.

  Further, since the particle number density of the conductive particles 32 can be reduced, the IC chip 1 can reduce the height of the input / output bumps 3 and 5, thereby realizing further miniaturization and thickness reduction. it can. In other words, since the number density of the conductive particles 32 is low, the connection body 20 can reduce the risk of occurrence of a short circuit between the bumps even in the space between the narrow input / output bumps 3 and 5. it can. Further, the thickness of the binder resin 33 can be reduced according to the reduction in the height of the input / output bumps 3 and 5, the pressing force of the IC chip 1 can be reduced, and the inflow of the binder resin 33 into the recess 9 allows Since the pushing amount is reduced, the influence on the arrangement of the conductive particles 32 can be suppressed. Accordingly, since the connection body 20 is pressed substantially in accordance with the arrangement pattern while the flow of the conductive particles 32 is suppressed, the particles are also formed between the input / output bumps 3 and 5 and the input / output terminals 16 and 17 that are fine pitched. Can be captured and the occurrence of short circuit between bumps can be reduced.

  Further, the anisotropic conductive film 30 has conductive particles 32 that are non-contact and independent from each other in a plan view, so that the conductive particles in the film plane can be obtained even when the binder resin 33 is filled with high density. 32 is prevented from occurring. Therefore, according to the anisotropic conductive film 30 in which the conductive particles 32 are arranged independently without being in contact with each other, the conductive particles are also present at the fine pitched input / output terminals 16 and 17 and the input / output bumps 3 and 5. The capture rate of 32 can be improved.

  Such an anisotropic conductive film 32 is obtained by, for example, applying a pressure-sensitive adhesive on a stretchable sheet, arranging the conductive particles 32 thereon as a single layer, and then stretching the sheet at a desired stretch ratio. A method of transferring to the binder resin 33, a method of transferring the conductive particles 32 to the binder resin 33 supported by the base film 31 after aligning the conductive particles 32 in a predetermined arrangement pattern on the substrate, or a base film 31. The conductive particles 32 can be manufactured by a method of supplying the conductive particles 32 on the binder resin 33 supported by the substrate through an array plate provided with openings corresponding to the array pattern.

[Laminated ACF]
Here, as shown in FIG. 10B, the anisotropic conductive film according to the present technology has a conductive resin composed of an insulating adhesive layer 34 made of only a binder resin 33 and a binder resin 33 containing conductive particles 32. It is preferable that the conductive particle content layer 35 is laminated. In the anisotropic conductive film 36 shown in FIG. 10B, an insulating adhesive layer 34 is laminated on the base film 31, and a conductive particle-containing layer 35 is laminated on the insulating adhesive layer 34. The layer 35 side is attached to the circuit board 14, and the IC chip 1 is mounted from the insulating adhesive layer 34 side. The anisotropic conductive film 36 is used by laminating a release film (not shown) on the conductive particle-containing layer 35 and winding it in a reel shape.

  In the anisotropic conductive film 36, the fluidity of the insulating adhesive layer 34 is such that, for example, the minimum melt viscosity of the insulating adhesive layer 34 is lower than the minimum melt viscosity of the conductive particle-containing layer 35. Higher than 35 fluidity. Therefore, when the anisotropic conductive film 36 is interposed between the circuit board 14 and the IC chip 1 and is heated and pressed by the thermocompression bonding tool 40, the insulating adhesive layer 34 having a low melt viscosity is first formed. And the IC chip 1 are filled and flow into the recess 9. Since the conductive particle-containing layer 35 having a high melt viscosity has low fluidity, the flow of the conductive particles 32 is suppressed even when the binder resin 33 is melted between the circuit board 14 and the IC chip 1 by heating and pressing. The Moreover, the flow of the conductive particles 32 is also suppressed when the insulating adhesive layer 34 that has flowed first and filled between the circuit board 14 and the IC chip 1 starts a curing reaction. Therefore, the connection body 20 can reduce the occurrence of short between bumps without the conductive particles 32 aggregating between the adjacent output bumps 3 or between the input bumps 5.

As an example of the minimum melt viscosity range of the insulating adhesive layer 34, the conductive particle-containing layer 35, and the anisotropic conductive film 36, the minimum melt viscosity range of the insulating adhesive layer 34 is 1 to 1 × 10 ^4. Pa · s, the lowest melt viscosity range of the conductive particle-containing layer 35 is 10 to 1 × 10 ⁵ Pa · s, and the lowest melt viscosity range of the entire anisotropic conductive film 36 is 10 to 1 × 10 ⁵ Pa · s. . Of course, the minimum melt viscosity ranges of the insulating adhesive layer 34, the conductive particle-containing layer 35, and the anisotropic conductive film 36 are not limited to the ranges given here. The minimum melt viscosity of the insulating adhesive layer 34, the conductive particle-containing layer 35, and the anisotropic conductive film 36 can be obtained by measuring in the same manner as the binder resin 33 described above.

  The anisotropic conductive film 36 may be one in which only the conductive particle-containing layer 35 is laminated. In this case, the fluidity of each conductive particle-containing layer 35 may be the same or different.

  In addition, as the amount of the binder resin 33 flowing into the recess 9 increases, that is, the insulating adhesive layer 34 having high fluidity flows in the recess 9 in proportion to the volume of the recess 9, and the conductive particle-containing layer 35. The influence on the conductive particles 32 can be suppressed. Therefore, in contrast to the substrate 2 that is assumed that the depression 9 is not formed, the substrate 2 in which the depression 9 is formed effectively suppresses the flow of the conductive particles 32, improves the particle capture rate, and increases the space between the bumps. The incidence of shorts can be reduced. Further, as the amount of the binder resin 33 flowing into the recess 9 increases, the ability to relieve stress between the circuit board 14 and the IC chip 1 increases.

  In addition, as shown in FIGS. 11 to 13, the anisotropic conductive film 36 has a fine pitch by arranging the conductive particles 32 in the conductive particle-containing layer 35 independently in a non-contact manner in a plan view. Also between the input / output bumps 3 and 5 and the input / output terminals 16 and 17, the particle capture rate is improved, and the conductive particles 32 are not aggregated between the adjacent output bumps 3 and between the input bumps 5. Occurrence of a short between bumps can be reduced. Moreover, by using such an anisotropic conductive film 36, the effect of reducing the resin flow by the depression 9 can be more effective. That is, an increase in capture efficiency due to the arrangement of the conductive particles 32 and a suppression of unnecessary movement of the conductive particles 32 during capture due to suppression of resin flow occur simultaneously.

  In addition, by arranging the conductive particles 32 in the conductive particle-containing layer 35 independently in a non-contact manner in a plan view, the particle number density of the conductive particles 32 is reduced. The height can be reduced, and the pressing amount of the input / output bumps 3 and 5 by the thermocompression bonding tool 40 increases. However, the anisotropic conductive film 36 is pressed by the insulating adhesive layer 34 by the input / output bumps 3 and 5. The pressure is absorbed by the inflow of the binder resin 33 into the recess 9, and the influence on the conductive particle containing layer 35 due to the flow of the insulating adhesive layer 34 can be suppressed. Therefore, in the connection body 20, since the flow of the conductive particles 32 arranged in the conductive particle-containing layer 35 is suppressed, between the input / output bumps 3 and 5 and the input / output terminals 16 and 17 that are fine pitched. However, it is possible to reliably capture the particles and reduce the occurrence of a short circuit between the bumps.

  In the above-described embodiment, as an anisotropic conductive adhesive, an example of an adhesive film obtained by forming a thermosetting resin composition appropriately containing conductive particles 32 in a binder resin 33 into a film shape has been described. The adhesive which concerns on this technique is not limited to this, For example, the insulating adhesive film which consists only of binder resin 33 may be sufficient. The anisotropic conductive adhesive is not limited to an adhesive film formed by such a film, but only from a conductive adhesive paste in which conductive particles 32 are dispersed in a binder resin composition, or only from a binder resin composition. It is good also as an insulating adhesive paste. The anisotropic conductive adhesive according to the present technology includes any of the forms described above.

[Connection process]
Next, a connection process for connecting the IC chip 1 to the circuit board 14 will be described. First, the anisotropic conductive film 30 is temporarily attached on the mounting surface of the circuit board 14 on which the input / output terminals 16 and 17 are formed. Next, the circuit board 14 is placed on the stage of the connection device, and the IC chip 1 is placed on the mounting surface of the circuit board 14 via the anisotropic conductive film 30.

  When the anisotropic conductive film 36 in which the conductive particle-containing layer 35 and the insulating adhesive layer 34 are laminated is used, the conductive particle-containing layer 35 side is attached to the circuit board 14 and the edge adhesive layer 34 is attached. The IC chip 1 is arranged from the side.

  Next, the thermocompression bonding tool 40 heated to a predetermined temperature for curing the binder resin 33 is heated at a predetermined pressure and time on the other surface 2b of the substrate 2 serving as the pressing surface of the IC chip 1 via the buffer material 15. Pressurize. As a result, the binder resin 33 of the anisotropic conductive film 30 exhibits fluidity and flows out from between the IC chip 1 and the circuit board 14, and the conductive particles 32 in the binder resin 33 form the output bumps 3 and the output terminals. 16 and between the input bump 5 and the input terminal 17 and are crushed.

  At this time, according to the IC chip 1 to which the present technology is applied, since the depression 9 is provided on the one surface 2a of the substrate 2 on which the input / output bumps 3 and 5 are formed, the binder resin of the anisotropic conductive film 30 is provided. 33 flows into the recess 9. Thereby, the amount of the binder resin 33 discharged from between the IC chip 1 and the circuit board 14 is reduced, and the pressing force by the thermocompression bonding tool 40 can be reduced. Therefore, the connection body 20 can reduce the load caused by the thermocompression bonding tool 40, can suppress the warp of the circuit board 14, and can prevent the IC chip 1 from being damaged. Further, the connection body 20 can discharge the binder resin 33 and can sufficiently hold the conductive particles 32 by pressing with a lower pressure.

  In the anisotropic conductive film 36 in which the insulating adhesive layer 34 and the conductive particle-containing layer 35 are laminated, the low melt viscosity insulating adhesive layer 34 is first formed between the IC chip 1 and the circuit board 14. It fills in between and flows into the recess 9 to suppress the flow of the conductive particles 32. As a result, the conductive particles 32 are captured between the input / output bumps 3 and 5 and the input / output terminals 16 and 17 that have been fine pitched, and are aggregated in the space between the adjacent input / output bumps 3 and 5. No short between bumps is prevented.

  As a result, the IC chip 1 and the circuit board 14 are electrically connected by sandwiching the conductive particles 32 between the input / output bumps 3 and 5 and the input / output terminals 16 and 17. The binder resin 33 heated by 40 is cured, and the connection body 20 is formed.

  In the connection body 20, conductive particles 32 that are not between the input / output bumps 3, 5 and the input / output terminals 16, 17 of the circuit board 14 are dispersed in the binder resin 33, and are maintained in an electrically insulated state. ing. Thereby, electrical continuity is achieved only between the output bumps 3 and the input bumps 5 of the IC chip 1 and the input / output terminals 16 and 17 of the circuit board 14. In addition, by using a fast curing type radical polymerization reaction system as the binder resin, the binder resin can be rapidly cured even with a short heating time. Further, the anisotropic conductive films 30 and 36 are not limited to the thermosetting type, and may be a photo-curing type or a photo-heat combined type adhesive as long as pressure connection is performed.

  Such a connection body 20 has a circuit board in which the contact area of the binder resin 33 is increased by the depression 9 provided in the IC chip 1 and an anchor effect is exhibited by the binder resin 33 filled in the depression 9. The adhesion strength to 14 is improved.

  In addition, since the resin volume of the binder resin 33 filled between the IC chip 1 and the circuit board 14 is increased by the depression 9 in the connection body 20, the stress between the circuit board 14 and the IC chip 1 is increased. The load on the bonding interface between the circuit board 14 and the IC chip 1 is reduced and the peeling of the IC chip 1 can be prevented.

  Furthermore, since the connection body 20 reduces the stress between the circuit board 14 and the IC chip 1 and the warping of the circuit board 14 is also suppressed, the circuit board 14 is transparent for a display panel such as an LCD panel, for example. In the case of configuring the substrate, the influence of the warp on the display portion is suppressed, and display unevenness can be prevented.

1 IC chip, 2 substrate, 2a one side, 2b other side, 2c, 2d side edge, 3 output bump, 4 output bump area, 5 input bump, 6 input bump area, 7 bump area, 9 depression, 9a non-through hole 9b Groove, 10 Non-electrode region, 14 Circuit board, 15 Buffer material, 16 Output terminal, 17 Input terminal, 20 Connector, 30 Anisotropic conductive film, 31 Base film, 32 Conductive particle, 33 Binder resin, 34 Insulating adhesive layer, 35 conductive particle-containing layer, 36 anisotropic conductive film, 40 thermocompression bonding tool

  8A and 8B, the recess 9 (non-through hole 9a, groove 9b) is formed between the side edges 2c, 2d of the substrate 2 and the input / output bump rows 3A, 3B, 5A. You may form in the outer edge part 2e. 9A and 9B, the recess 9 (non-through hole 9a, groove 9b) includes a pair of side edges 2f and 2g orthogonal to the side edges 2c and 2d of the substrate 2 and input / output bumps. You may form in the outer edge 2h between row | line | column 3A, 3B, 5A. In addition, the recess 9 may be formed in the space when spaces are formed between the output bump rows 3A, 3B or in the input / output bump rows 3A, 3B, 5A.

  When the conductive particles 32 exist independently from each other in a plan view, the conductive particles 32 are randomly dispersed in the anisotropic conductive film 30 as shown in FIGS. 14A and 14B. Compared with the case where the distribution of the conductive particles is sparse due to the formation of aggregates, etc., the probability that each of the conductive particles 32 is captured is improved, so that the same highly integrated IC chip 1 In the anisotropic connection, the blending amount of the conductive particles 32 can be reduced. As a result, when the conductive particles 32 are randomly dispersed, the number of conductive particles is required to be equal to or larger than a certain amount, so that aggregates and connections are generated in the spaces between the adjacent output bumps 3 and the input bumps 5. Although there was a concern, the occurrence of such a short circuit between the bumps can be suppressed by making them in a non-contact and independent state in plan view, and the input / output bumps 3 and 5 and the input / output terminals 16 and 17 can be suppressed. It is possible to reduce the number of conductive particles 32 that do not contribute to conduction between them.

Claims (12)

A substrate, an electrode region provided on one side of the substrate, in which a plurality of electrodes are arranged, and a non-electrode region where the electrode is not formed,
An electronic component in which one or a plurality of depressions are formed in the non-electrode region. In the electrode region, the electrodes are arranged along one side and the other side of a pair of opposite side edges of the substrate,
The electronic component according to claim 1, wherein the recess is formed in parallel with a pair of opposing side edges of the substrate.   The electronic component according to claim 1, wherein the recess is formed in a groove shape.   The electronic component according to claim 3, wherein the hollow is a straight groove. The substrate is formed in a rectangular shape,
The electronic component according to any one of claims 1 to 4, wherein the depression is present along a longitudinal direction of the substrate.   The electronic component according to any one of claims 1 to 5, wherein the adhesive for anisotropically conductively connecting the electronic component includes conductive particles in the binder resin that are independently non-contact with each other.   The electronic component according to claim 1, wherein the electronic component is an IC chip.   The electronic component according to claim 7, wherein the depression faces a side surface of the substrate. In the connection body in which the first electronic component and the second electronic component are connected via an anisotropic conductive adhesive,
At least one of the electronic components is
A substrate, an electrode region provided on one side of the substrate connected to the circuit board, in which a plurality of electrodes are arranged, and a non-electrode region in which the electrodes are not formed,
A connection body in which one or a plurality of depressions into which the anisotropic conductive adhesive flows are formed in the non-electrode region.   The anisotropic conductive adhesive is formed by laminating a conductive adhesive layer containing conductive particles and an insulating adhesive layer not containing the conductive particles, and the conductive adhesive layer side is the above The connection body according to claim 9, which is attached to one surface of the substrate.   The connection body according to claim 10, wherein the conductive adhesive layer has the conductive particles arranged independently. In a method for designing an electronic component comprising a substrate, an electrode region provided on one surface side of the substrate and arranged with a plurality of electrodes, and a non-electrode region where the electrode is not formed,
An electronic component design method for forming one or a plurality of depressions in the non-electrode region.

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