JP2017098434A - Printed-circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed-circuit board in which an inductance value is not reduced even when a length of a wiring formed on a printed-circuit board is changed, and which can reduce a wiring resistance.SOLUTION: In a printed-circuit board of at least two or more layers, in which a coil wire formed in a spiral shape in the same layer is formed in a spiral state from a top layer to a bottom layer in a multilayer construction, one coil wire corresponding to the half number of total layers from the top layer or the bottom layer is similarity formed. The other coil wire corresponding to the half number of remaining total layers is formed in an axial symmetry to the coil wire. Both similarity coil wires of adjacent layers is paired.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a printed wiring board that reduces wiring resistance.

  In recent years, with the miniaturization and high functionality of electronic devices, reduction in the number of external electronic components mounted on an electronic circuit board (printed wiring board) has been demanded. For this reason, development of technology for directly forming (incorporating) electronic components such as inductance elements and capacitance elements in a printed wiring board has been underway, and an inductance element (coil structure) formed only by a spiral wiring pattern is being developed. ) Is required to be further downsized.

For example, in Patent Document 1, a long hole pattern plated with metal is formed along a conductor pattern formed in a buildup layer formed on at least one side of a core layer, and a dielectric between adjacent conductors is removed. A multilayer substrate inductor 15 provided with a groove-like portion is described. Since the conductor pattern is three-dimensionally formed in the groove-like portion that is recessed toward the core layer, the conductor loss and stray capacitance can be reduced as much as possible.
Patent Document 2 discloses a coil in which a plurality of wiring layers of an electronic circuit board (multilayer wiring board) are patterned into a predetermined shape and connected by vias (vertical wiring) to form a spiral coil (wiring). An embedded multilayer substrate is described.
Further, Patent Document 3 discloses that the coil segments of different layers are electrically connected to each other in order to define a substrate, a plurality of conductor layers each including a plurality of individual coil segments, and a plurality of individual filaments. A plurality of intermediate layer connectors to be coupled, each of the filaments being used as a pair coil having a plurality of intermediate layer connectors that follow substantially the same undulation through the plurality of conductor layers A printed circuit board coil is described.

Conventionally, as shown in FIG. 12, the inductance element is one in which a coil wiring 9 is spirally formed on the same layer of a printed wiring board 90 to obtain an inductance value. In order to satisfy the inductance value, when the number of turns of the coil wiring 9 is increased and the wiring resistance is increased, the resistance value is reduced by increasing the thickness of the conductor or by increasing the wiring width. The coil wiring 9 is formed in a spiral shape by connecting through connection vias in order from the upper layer to the lower layer and increasing the coil wiring layer. By increasing the number of spiral turns of the coil wiring in this way, a high inductance value can be obtained, and characteristics as the coil wiring can be obtained (hereinafter, such coil wiring is referred to as coil single wiring). say).
However, when a desired inductance value is obtained by this method, the increase in resistance due to the increase in the number of turns cannot be absorbed by the method of increasing the copper foil thickness or the line width, resulting in a decrease in efficiency.

In general, when it is desired to increase the inductance value of the coil wiring, the wiring length may be increased. However, when the wiring length is increased, the wiring resistance increases. That is, as the inductance value increases, the wiring resistance also increases.
However, the method of increasing the thickness of the conductor has a problem that the options are limited because the base material is a standard product. Furthermore, even if the inner conductor of the multilayer board is thickened, the prepreg, which is an interlayer insulating material, is a resin that melts at the time of lamination. is there.
In addition, the method of increasing the wiring width has a limitation on the area where the coil wiring can be created on the substrate. Further, if the wiring width is increased, the coil wiring area becomes too large, which hinders normal signal wiring.

JP 2005-183646 A JP-A-2005-347286 Special table 2011-504289

  It is an object of the present invention to provide a printed wiring board that does not decrease the inductance value even when the length of the coil wiring formed on the printed wiring board is changed, and can reduce the wiring resistance.

The present invention has been completed in order to solve the above problems, and has the following configuration.
(1) In a printed wiring board having at least two or more layers in which a coil wiring formed in the same layer in a spiral shape is spirally formed from an upper layer of a multilayer structure to a lower layer, the upper layer or the lower layer One coil wiring corresponding to one half of the total number of layers from the layer is formed in a similar manner, and the other coil wiring corresponding to the remaining half of the total number of layers is symmetrical with the coil wiring. A printed wiring board formed by forming a pair of similar coil wirings in adjacent layers.
(2) The one coil wiring is connected at the start point to each other by vias, the other coil wiring is connected at the end point to each other by vias, and the end point of one coil wiring set and the other coil wiring set The printed wiring board according to (1), wherein the starting points are further connected by vias.
(3) The one coil wiring is connected at the start point to each other by connection vias, the other coil wiring is connected at the end point to each other by connection vias, and the end point of one coil wiring set and the other coil wiring The printed wiring board according to (1), wherein the starting point of the set is further connected by a through via.
(4) The printed wiring board according to any one of (2) to (3), wherein the set of coil wirings is an even number set divided by an even number exceeding 2 with respect to the total number of layers.

  According to the present invention, by arranging the coil wiring in parallel in each layer, the coil wiring creation area (in the plane direction) is not enlarged, the inductance value is not lowered, and the wiring resistance is distributed (parallel connection) and lowered. Can do.

It is a perspective view showing one embodiment of a printed wiring board concerning the present invention. It is explanatory drawing of the coil wiring shown in FIG. (A) And (b) is explanatory drawing which shows the coil parallel wiring of another embodiment of the printed wiring board which concerns on this invention, respectively. It is explanatory drawing which shows the coil parallel wiring of another embodiment of the printed wiring board which concerns on this invention. It is explanatory drawing which shows the wiring structure of the coil parallel wiring shown in FIG. It is a graph which shows the simulation of the electric power ratio (efficiency) transmitted from the transmission side board | substrate to the reception side board | substrate which opposed in each layer structure of coil parallel wiring. It is explanatory drawing which shows a transmission side board | substrate and a reception side board | substrate in wiring of 2 layer structure. (A) And (b) is explanatory drawing which shows the general coil single wiring of 4 layers and 6 layers, respectively. It is a graph which shows the simulation of the electric power ratio transmitted to the receiving side board | substrate which opposed from the transmission side board | substrate in the coil parallel wiring of 8 layer structure, and the coil single wiring of 4,6,8 layer. The ratio of power (efficiency) transmitted from the transmitting substrate to the opposite receiving substrate in the frequency band used in the Qi standard using the 8-layer coil parallel wiring and the 4, 6 and 8-layer coil single wiring It is a graph which shows simulation. Power ratio (efficiency) transmitted from the transmitting side substrate to the receiving side substrate in the frequency band used for RF-ID, using the 8-layer coil parallel wiring and the 4, 6, and 8 layer coil single wiring It is a graph which shows the simulation. It is a perspective view which shows the conventional coil wiring.

(Coil parallel wiring)
As shown in FIG. 1, a printed wiring board 102 according to an embodiment of the present invention has a two-layer structure including an upper layer 10 and a lower layer 20 facing the upper layer 10 with an interlayer insulating resin therebetween. Consists of. A coil wiring 1 and a coil wiring 2 are parallelly connected to the upper layer 10 and the lower layer 20 to form a printed wiring board 102.

As shown in FIG. 2, the shape of the coil wiring 1 of the first layer and the coil wiring 2 of the second layer is axisymmetric about the symmetry axis XX, and the coil wiring 1 which is the upper layer is lower than the lower layer. It is formed in a spiral shape over the coil wiring 2 and is connected by connection vias 12 that connect the upper and lower layers.
The coil wirings 1 and 2 are connected to other components from the adjacent terminals 11 and 22, respectively. The conductor thickness of the coil wirings 1 and 2 (wiring pattern) is preferably 18 to 35 μm.

The printed wiring board according to the present invention has a coil wiring having a similar shape, and sets adjacent layers together. That is, when the number of layers is one half of the total number of layers from the upper layer or the lower layer, one coil wiring similar to the adjacent layer is set as one set, and is symmetrical with the wiring coil of this one set. The other coil wiring formed in the shape and corresponding to the number of remaining half of the total number of layers is defined as the other set. The number of layers constituting one set and the other set is the same, and one set and the other set are a pair. In addition, the coil wiring of the similar shape indicates that the spiral coil wiring is the same and the lead-out wiring to the via has a different shape.
In this way, a wiring method for dividing the total number of layers in a set in which the wirings are line symmetric is called a coil parallel wiring. For example, a printed wiring having a four-six-layer structure shown in FIGS. A board is mentioned. In the case of a two-layer structure, it has the same shape as a general coil wiring (coil single wiring).

FIG. 3A shows coil wirings 41 to 44 provided in each of the first to fourth layers constituting the printed wiring board 104 having a four-layer structure.
In the printed wiring board 104, first, after the wiring of the coil wirings 41 and 42 from the first layer to the second layer is completed, the first layer and the second layer are symmetrical with respect to the third layer with respect to the symmetry axis XX. The coil wiring 43 is formed in such a shape. Next, if the coil wiring 44 having the same shape as that of the third layer is formed in the fourth layer, the terminal 11 and the terminal 22 are adjacent to each other to complete the coil wiring.
The shapes of the adjacent first-layer and second-layer coil wirings 41 and 42 are similar to each other, and the starting points of the coil wirings 41 and 42 are connected by the connection via 45 (one set). Similarly, the third and fourth layer coil wirings 43 and 44 are similar to each other, and the end points of the coil wirings 43 and 44 are connected by the connection via 34 (the other set). Furthermore, an end point of one set of the first and second layer coil wirings 41 and 42 and a start point of the other set of the third and fourth layer coil wirings 43 and 44 are connected by a through via 40. Has been.

FIG. 3B shows coil wirings 61 to 66 provided in the first to sixth layers constituting the printed wiring board 106 having a six-layer structure.
The shapes of the adjacent first to third layer coil wirings 61 to 63 are similar to each other, and the respective starting points of the coil wirings 61 to 63 are connected by the connection via 13 (one set). Similarly, the fourth to sixth layer coil wirings 64 to 66 are similar to each other, and the end points of the coil wirings 64 to 66 are connected by the connection via 46 (the other set). Further, the end points of the first to third layer coil wirings 61 to 63 and the start points of the fourth to sixth layer coil wirings 64 to 66 are connected by a through via 60.

In addition, the coil parallel wiring group is not limited to two groups such as one group and the other group as described above, and is an even group that is divided by an even number exceeding 2 with respect to the total number of layers. There may be.
For example, FIG. 4 shows coil wirings 81 to 88 provided in each of the first to eighth layers constituting the printed wiring board 108 having an eight-layer structure. FIG. 5 shows connection vias and through vias between the coil wirings 81 to 88 in each layer.
Of the coil wirings 81 to 84 of the first to fourth layers adjacent to each other, the coil wirings 81 and 82 are similar in shape and are connected by the connection via 14 as shown in FIG. Further, the coil wirings 83 and 84 are symmetrical with respect to the coil wirings 81 and 82 about the axis of symmetry XX. The coil wirings 83 and 84 include a connection via 15 that is connected to the connection via 16 and connected to the coil wirings 81 and 82. The connection via 16 is also connected to coil wirings 85 and 86 as shown in FIG.
The coil wirings 85 to 88 of the fifth layer to the eighth layer are similar in the shape of the coil wirings 85 and 86, and are connected by the connection via 16 as shown in FIG. The coil wirings 87 and 88 are symmetrical with respect to the coil wirings 85 and 86 with respect to the axis of symmetry XX. The coil wirings 87 and 88 include connection vias 58 connected by connection vias 78 and connected to the coil wirings 85 and 86.
Further, the first to eighth layer coil wirings 81 to 88 are connected by through vias 80 as shown in FIG.
The printed wiring board 108 having an 8-layer structure is obtained by adding another set of the printed wiring board 104 having a 4-layer structure shown in FIG.
In addition, in the printed wiring board of a multilayer structure, as long as the coil wiring of each layer is connected appropriately, it may be connected by either a connection via or a through via.

Table 1 shown below is a simulation result of the wiring resistance and inductance value of the two-layer coil wiring shown in FIG. 1 and the four- and six-layer coil parallel wiring shown in FIGS. 3 (a) and 3 (b). . This simulation result is a result of calculation using simulator Q3D (manufactured by ANSYS) as the values when the printed wiring board layers are 2, 4, and 6 layers at the time of direct current. Note that the wiring width, wiring gap, copper thickness, and interlayer thickness at this time are common to the 2, 4 and 6 layers as shown in Table 1.

  From Table 1, it can be seen that the change in the inductance value is small even though the decrease in the wiring resistance is greatly improved as the number of layers is increased.

(Efficiency of coil parallel wiring)
Next, while increasing the number of layers of the printed wiring board to 2 layers, 4 layers, and 6 layers, simulation of the coil parallel wiring was performed with the transmitting side substrate and the receiving side substrate facing each other. The power between transmission and reception of each of the 2 layers, 4 layers, and 6 layers of the plate is measured, and the power ratio (efficiency) transmitted from the transmission side to the reception side is obtained. FIG. 6 shows a graph of the simulation result. In addition, this transmission side board | substrate and the reception side board | substrate are the board | substrates (printed wiring board) which have the coil wiring of the same shape of 2, 4 and 6 layers, respectively. For example, in the printed wiring boards 102 and 102 'having a two-layer structure, as shown in FIG. 7, the first to second coil wirings 1 and 2 are used as the transmission side substrate 3, and the reception side substrate 4 is also the transmission side substrate. Like FIG. 3, the first to second coil wirings 1 ′ and 2 ′ are used. At this time, the distance between the transmission side substrate 3 and the reception side substrate 4 is 2.0 mm.

  FIG. 6 shows that the efficiency improves when the number of printed wiring boards having coil parallel wiring is increased to 2, 4 and 6 layers.

(Comparison with coil single wiring)
FIG. 8A shows a coil wiring 41 ′ provided on each of the first to fourth layers constituting a printed wiring board 104 of a four-layer structure of coil wiring (coil single wiring) that is generally performed. To 44 '.
In the printed wiring board 104 ', in the coil wirings 41' to 44 'from the first layer to the fourth layer, the end point of the upper layer and the start point of the lower layer are spiraled in the order of the connection vias 51 to 53, respectively. Connected continuously. The through via 50 connects the first layer to the fourth layer.
Similarly, the printed wiring board 106 of 6-layer structure shown in FIG. 8B is similar to the upper layer end point and the lower layer in the coil wirings 61 'to 66' from the first layer to the sixth layer. The starting point of each layer is continuously connected in a spiral shape in the order of the connection vias 71 to 75. A through via 70 connects the first layer to the sixth layer.
Further, in the case of the coil single wiring, even if the printed wiring board 108 (not shown) having an eight-layer structure is used, the end point and the lower layer of the upper layer of the coil wiring from the first layer to the eighth layer are similarly applied. The starting point of the layer is connected continuously in a spiral.

FIG. 9 is a schematic diagram of the coil single wiring of each of the 4th layer, the 6th layer, and the 8th layer, and the parallel coil wiring of 8 layers (see FIG. 4), with the transmission side substrate and the reception side substrate facing each other. The power between transmission and reception was measured, and the power ratio (efficiency) transmitted from the transmission side to the reception side was determined. The simulation results are graphed.
At this time, the distance between the transmission side substrate and the reception side substrate is 2.0 mm, and the measurement method is the same as in FIG.

According to FIG. 9, in order to increase the inductance value, when the number of layers is increased in the coil single wiring and the wiring length is increased, the wiring length is longer than the four layers and the difference from the six layers that can be expected to improve the efficiency is slight. It can be seen that it is. Further, when the number of layers is 8 in the coil single wiring, the efficiency is significantly lower than that of the 4th layer and the 6th layer.
This is because, when the wiring length is increased, the inductance value increases, but the wiring resistance also increases at the same time, and the loss due to the wiring resistance exceeds the efficiency improvement effect due to the increase in the inductance value, thereby reducing the efficiency. Therefore, in this result, the effect of increasing the number of turns is considered to be a wiring length in which six layers are close to the limit.
At this time, the approximate wiring length of the coil single wiring used for the simulation is shown in Table 2.

Table 3 shows a summary of efficiency at a frequency of 240 kHz in FIGS.

From Table 3, coil single wiring is 54.85%, 6 layer is 52.61%, 8 layer is 28.09%, while coil parallel wiring is 33. 19%, 6 layers are 42.75%, 8 layers are 70.19%, and 8 layers of coil parallel wiring show the best results.
Further, when the number of printed wiring boards having coil parallel wiring is increased to 2, 4 and 6, the efficiency is improved. However, the number of printed wiring boards having coil single wiring is increased to 2, 4, and 6. As you increase to 6 layers, the efficiency becomes worse.

Further, the wiring resistance and inductance value of the coil single wiring 4-layer plate and the coil parallel wiring 8-layer plate were compared by simulation, and the results are shown in Table 4. This simulation is performed by the same measuring method and measuring apparatus as those in Table 1 described above.

From Table 4, the coil parallel wiring 8 layer has lower wiring resistance than the coil single wiring 4 layer, and the difference in inductance value is smaller. As a result, the coil parallel wiring 8 layer can reduce the wiring resistance by performing the parallel wiring using the number of layers of the printed wiring board rather than the coil single wiring 4 layer, thereby contributing to efficiency improvement. Can be expected.
Thus, the set of coil parallel wiring is not limited to only two sets such as one set and the other set as described above, and is an even number divided by an even number exceeding 2 with respect to the total number of layers. A set may be sufficient, and when this even number set increases, wiring resistance can be reduced by performing parallel wiring using the number of layers of a printed wiring board. Thereby, the efficiency can be improved in a narrow wiring area.

(Application to Qi standard and RF-ID)
The advantage of creating coil parallel wiring on a printed wiring board is that if the expansion of the area cannot be expected due to the downsizing of the product or the limitation of the coil arrangement area, the efficiency that is limited by the coil single wiring is By performing the wiring, the efficiency can be improved over the coil single wiring without expanding the coil wiring area.
This advantage can also be applied to, for example, the Qi standard for wireless power feeding (wireless power feeding) and the frequency band used for RF-ID used for IC tags and the like.

  FIG. 10 is a graph comparing the efficiency of the coil single wiring 4 layers, 6 layers, and 8 layers with the coil parallel wiring 8 layers in the vicinity of the frequency band (125 kHz) used in the Qi standard. From FIG. 10, it can be seen that at 125 kHz, the coil parallel wiring 8 layer is more efficient than the coil single wiring 4 layer.

  FIG. 11 is a graph comparing the efficiency of the coil single wiring 4 layers, 6 layers, and 8 layers with the coil parallel wiring 8 layers in the vicinity of the frequency band (13.56 MHz) used for RF-ID. From FIG. 11, it can be seen that, at 13.56 MHz, the coil parallel wiring 8 layer is more efficient than the coil single wiring 4 layer.

  From the results of FIGS. 10 and 11, the coil parallel wiring structure of the present invention can be expected to contribute to the miniaturization of the product, for example, as the coil wiring for wireless power feeding created on the printed wiring board.

DESCRIPTION OF SYMBOLS 1 Coil wiring 1 'Coil wiring 2 Coil wiring 2' Coil wiring 3 Transmission side board | substrate 4 Reception side board | substrate 9 Coil wiring 10 Upper layer 20 Lower layer 11, 22 terminal 11 ', 22' terminal 12, 13, 14, 15 , 16 Connection via 12 'Connection via 34, 45, 46, 58 Connection via 51-53 Connection via 71-75, 78 Connection via 41-44 Coil wiring 41'-44' Coil wiring 61-66 Coil wiring 61'-66 ′ Coil wiring 81 to 88 Coil wiring 40, 50, 60, 70, 80 Through-via 90 Printed wiring board 102, 104, 106, 108 Printed wiring board 102 ′, 104 ′, 106 ′, 108 ′ Printed wiring board

Claims (4)

  In a printed wiring board of at least two or more layers formed so as to form a spiral from the upper layer of the multilayer structure to the lower layer, the coil wiring formed in the same layer in a spiral shape is totaled from the upper layer or the lower layer. One coil wiring corresponding to half the number of layers is formed in a similar manner, and the other coil wiring corresponding to the remaining half of the total number of layers is formed in a shape symmetrical with the coil wiring. A printed wiring board characterized in that coil wirings similar in adjacent layers are paired.   The one coil wiring is connected at the start point to each other via vias, the other coil wiring is connected at the end point to each other via vias, and the end point of one coil wiring set and the starting point of the other coil wiring set are further The printed wiring board according to claim 1, which is connected by vias.   The one coil wiring is connected at the start point to each other by connection vias, the other coil wiring is connected at the end point to each other by connection vias, the end point of one coil wiring set and the start point of the other coil wiring set The printed wiring board according to claim 1, further comprising a through via.   4. The printed wiring board according to claim 2, wherein the set of coil wirings is an even number set divided by an even number exceeding 2 with respect to the total number of layers.

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