JP2017084839A5 - - Google Patents

Claims (8)

A semiconductor substrate;
A drift layer of a first conductivity type provided on the semiconductor substrate;
A first base region of a second conductivity type located on the surface side of the drift layer;
A source region of a first conductivity type located in the first base region;
A trench penetrating the first base region and the source region, having trench sidewalls formed of a plurality of surfaces, and formed in a lattice shape;
A gate insulating film formed in contact with the trench sidewall in the trench;
A gate electrode embedded in the trench through the gate insulating film;
The second conductivity type having a higher impurity concentration than the first base region formed at a position in contact with the trench sidewall other than the corner at a position in contact with the corner at the intersection of the trench. A semiconductor device comprising a second base region.   2. The semiconductor device according to claim 1, wherein the second base region is formed to have a width of 0.1 [mu] m to 0.5 [mu] m from a corner portion at an intersection of the trench. The second conductivity type impurity concentration of the second base region is 5 × 10 ¹⁶ cm ⁻³ or more higher than the second conductivity type impurity concentration of the first base region. Semiconductor device. A semiconductor substrate;
A drift layer of a first conductivity type provided on the semiconductor substrate;
A first base region of a second conductivity type located on the surface side of the drift layer;
A source region of a first conductivity type located in the first base region;
A trench penetrating the first base region and the source region, having trench sidewalls formed of a plurality of surfaces, and formed in a lattice shape;
A gate insulating film formed in contact with the trench sidewall in the trench;
A gate electrode embedded in the trench through the gate insulating film;
The semiconductor device is characterized in that the source region is formed away from the vicinity of the corner at the intersection of the trenches and is in contact with the trench sidewall other than the corner. The source region is semi-conductor device according to claim 4, characterized in that apart than 0.1μm from a corner at the intersection of the trench.   The semiconductor device according to claim 1, wherein the semiconductor substrate is a silicon carbide semiconductor device, and the drift layer is made of silicon carbide. Growing a first conductivity type epitaxial layer to be a first conductivity type drift layer on a semiconductor substrate;
Forming a second conductivity type first base region in a surface layer portion of the epitaxial layer;
Forming a first conductivity type source region in a surface layer portion of the first base region;
Forming a second base region of a second conductivity type having an impurity concentration higher than that of the first base region in the drift layer;
The trenches penetrating the first base region and the source region are arranged in a lattice pattern, and deeper than the second base region so that corners at the intersections of the trenches are in contact with the second base region, Forming by etching;
Forming a gate insulating film in contact with a trench sidewall in the trench;
Burying a gate electrode in the trench through the gate insulating film;
A method for manufacturing a semiconductor device comprising:   8. The method of manufacturing a semiconductor device according to claim 7, wherein the semiconductor substrate and the drift layer are made of silicon carbide.