JP2017071826A - Connection structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress increase of leakage current to a semiconductor device and prevent reduction of pressure resistance of the semiconductor device.SOLUTION: There is provided a connection structure (1) having a conductive member (11) and a semiconductor element (12) connected on the conductive member via a porous metal layer (13), thickness of the porous metal layer tis 100 μm or less and width of the porous metal layer Lsatisfies a relationship of the following formula (1) with a width Lof a surface facing the porous metal layer of a semiconductor element (121) and the thickness tof the porous metal layer: L-t≤L≤L+t(1).SELECTED DRAWING: Figure 1

Description

  The present invention relates to a connection structure in which a substrate and a semiconductor element are joined via a porous metal layer.

  In general, a semiconductor device includes a step of forming a die mount material for bonding a semiconductor element (chip) on an element carrying part of a lead frame or a circuit electrode part of an insulating substrate, and on a lead frame or a circuit electrode. Mounting a semiconductor element on the surface of the die mount material, joining the element carrying part of the lead frame or the circuit electrode part of the insulating substrate and the semiconductor element, the electrode part of the semiconductor element, the terminal part of the lead frame or the insulating substrate; The semiconductor device is manufactured through a wire bonding process for electrically bonding the terminal portions and a molding process for coating the thus assembled semiconductor device with a resin.

  In Patent Document 1, a semiconductor element is disposed on a metal substrate via a bonding material, and a fillet layer formed of the same material as the bonding material on a side wall portion of the semiconductor element is provided with a height higher than half the thickness of the semiconductor element. A semiconductor device and a method for manufacturing the same are disclosed. Further, in Patent Document 2, when the first member to be bonded (semiconductor element) and the second member to be connected (substrate) are bonded, the first member to be bonded is placed on the second member to be connected. A bonding method is disclosed in which the bonding material is supplied in a larger area. According to these methods, it is possible to relieve the stress and strain generated due to the difference in thermal expansion coefficient between the joining members during joining, and to prevent the occurrence of cracks due to thermal shock.

JP 2014-120638 A JP, 2014-110282, A

  However, in the above method, the bonding material comes into contact with the side surface of the semiconductor element and the guard ring, so that the metal material (especially heavy metal) contained in the bonding material is inside the semiconductor element during high temperature operation or high voltage operation. Spread. Such metal diffusion into the semiconductor element causes an increase in leakage current, increases the electrical resistance inside the semiconductor element, and degrades the breakdown voltage characteristics of the semiconductor element. For this reason, it has been difficult to ensure electrical connection reliability with the above method.

  Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to provide a connection structure that can suppress an increase in leakage current to a semiconductor element and prevent a decrease in breakdown voltage characteristics of the semiconductor element. To do.

In order to solve the above-mentioned problems, the present invention is a bonded structure comprising a conductor member and a semiconductor element bonded to the conductor member via a porous metal layer, the porous metal layer being The thickness t _m of the porous metal layer is 100 μm or less, the width L _m of the porous metal layer is the width L _{c of} the surface of the semiconductor element facing the porous metal layer, and the thickness of the porous metal layer It is characterized by satisfying the relationship of the following formula (1) with t _m .
L _c −t _m ≦ L _m ≦ L _c + t _m (1)

Further, the semiconductor element has a chamfered portion across a surface opposite to the surface facing the porous metal layer and a side surface of the semiconductor element, and the chamfering along the height direction of the semiconductor element. It is preferable that the chamfering height H of the part is not more than ½ of the thickness t _c of the semiconductor element (C).

  The chamfer width W of the chamfered portion is preferably 12.5 μm or more.

  The chamfer width W of the chamfered portion is preferably 45 μm or less.

  In addition, the chamfered portion has a circle with a radius R centering on an intersection D between a straight line along the side surface of the semiconductor element and a straight line along the surface opposite to the surface facing the porous metal layer. It has an arcuate curved surface, and the radius R is preferably 12.5 μm to 45 μm.

  Further, it is preferable that an insulating resin is further interposed between the semiconductor element and the porous metal layer.

  Moreover, it is preferable that a porous metal layer is a layer formed by baking a porous metal layer precursor by pressurization and heating.

  Further, the porous metal layer is a layer formed by sintering a metal fine particle dispersion (E) obtained by dispersing metal fine particles (M) in an organic dispersion medium. It is preferable to include metal fine particles (M1) having a particle diameter of 2 to 500 nm.

  Moreover, it is preferable that the said metal microparticle (M) contains 1 type or 2 types selected from copper and silver.

  According to the present invention, it is possible to obtain a highly reliable connection structure that can suppress an increase in leakage current to a semiconductor element and prevent a breakdown voltage characteristic of the semiconductor element from being deteriorated.

It is sectional drawing which shows typically the connection structure which concerns on 1st Embodiment. Width L _m of the porous metal layer is a cross-sectional view schematically showing the connection structure when not satisfy the predetermined relationship. It is a conceptual diagram which shows the cross section of the sintering furnace which can be used suitably when producing the connection structure which concerns on this invention. It is sectional drawing which shows typically the connection structure which concerns on 2nd Embodiment. It is sectional drawing which shows typically a part of cross section of a connection structure in case a chamfer part does not satisfy | fill preferable conditions. It is sectional drawing which shows typically a mode that a porous metal layer precursor crawls up the side surface of a semiconductor element.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings as necessary.

[First Embodiment]
<Connection structure>
Hereinafter, an embodiment of the present invention will be described using the connection structure 1 shown in FIG. 1 as an example.
As shown in FIG. 1, a connection structure 1 according to an embodiment of the present invention includes a conductor member 11 and a semiconductor element 12 bonded to the conductor member 11 via a porous metal layer 13. Prepare.

(1) Conductor Member The conductor member 11 is not particularly limited, and for example, a substrate used in a semiconductor device, a lead frame, or the like can be used.

  As a substrate used for a semiconductor device, for example, a conductor pattern such as a copper plate is formed on one surface of an insulating layer such as ceramics by plating, sputtering, or brazing, or a direct electrode on a ceramic substrate. A DBC (Direct Bonded Copper) substrate to which plates are joined can be suitably used. A metal plate (such as a copper plate) may be bonded to the other surface of the substrate for the purpose of heat dissipation.

Here, examples of the ceramic include alumina (Al ₂ O ₃ ), aluminum nitride (AlN), silicon nitride (Si ₃ N ₄ ), and the like.

  Moreover, about a lead frame, a well-known thing can be used widely. In particular, when the semiconductor element 12 is mounted on a lead frame, it can be expected that heat dissipation is improved.

  The size and shape of the conductor member 11 may be appropriately selected according to the size and number of the semiconductor elements 12 to be mounted.

(2) Semiconductor Element The semiconductor element 12 is bonded on the conductor member 11 via the porous metal layer 13.

  The semiconductor element 12 is an electronic component made of a semiconductor or an element at the functional center of the electronic component. Such a semiconductor element 12 is formed, for example, by bonding a semiconductor wafer and a substrate having an external connection electrode, and cutting (dicing) the chip into chips.

  In addition, the semiconductor element 12 is preferably provided with a metal layer such as an alloy on a surface 121 facing the porous metal layer 13 with an electrode or the like. Examples of such an alloy include a Ti—Ni—Au alloy, a Ti—Ni—Cu alloy, a Ti—Ni—Ag alloy, a Ti—Au alloy, a Ti—Cu alloy, and a Ti—Ag alloy.

  The size and shape of the semiconductor element 12 can be appropriately selected according to the purpose of use.

(3) Porous Metal Layer The porous metal layer 13 is disposed between the conductor member 11 and the semiconductor element 12.

The thickness t _m of the porous metal layer 13 is 100 μm or less, preferably 50 μm or less. When the thickness t _m exceeds 100 μm, when a semiconductor element 12 (for example, a power device) that generates large heat is mounted on the conductor member 11, the heat generated from the semiconductor element 12 is transferred to the conductor member 11 side. There is a risk that the thermal resistance of the will increase.

The thickness t _m of the porous metal layer 13 is preferably 10 μm or more. The thermal resistance decreases as the thickness t _m decreases. On the other hand, if the thickness t _m is too small, the thermal stress relaxation due to the difference in coefficient of thermal expansion between members is low, so that the connection reliability may decrease.

Further, the width L _m of the porous metal layer 13 is defined by the following formula (1) between the width L _{c of the} surface 121 facing the porous metal layer 13 of the semiconductor element 12 and the thickness t _m . Satisfy the relationship.
L _c −t _m ≦ L _m ≦ L _c + t _m (1)
As described above, since the thickness t _m of the porous metal layer 13 is 100 μm or less, the width L _m of the porous metal layer 13 is (L _c −100 μm) or more and (L _c +100 μm). It is as follows. Width L _m is the be in the range of ± 100 [mu] m the width L _c, improvement of chip mounting accuracy, connecting material (porous metal layer and its precursors) of up risk creep due to the flow resistance reduction of It is possible to suppress the degradation, the crack growth in the guard ring region, and the degradation of the element characteristics due to the lack of the bonding material.
In particular, the width L _m of the porous metal layer 13, by satisfying the relation of the above formula (1), while ensuring the heat dissipation property and the connection reliability, the leakage current due to metal diffusion into the semiconductor element 12 The increase can be suppressed, and the breakdown voltage characteristics of the semiconductor element 12 can be maintained well.

However, the width L _m of the porous metal layer 13, if that does not satisfy the relationship of formula (1), a problem arises as follows. 2A and 2B are cross-sectional views of the connection structure when the width L _m of the porous metal layer 13 does not satisfy the relationship of the above formula (1).

As shown in FIG. 2A, when the width L _m of the porous metal layer 13 is smaller than (L _c −t _m ), the heat dissipation from the semiconductor element 12 to the conductor member 11 decreases. Thus, since the thermal resistance of the outer peripheral portion of the semiconductor element 12 increases, the high-temperature operation of the semiconductor element 12 becomes difficult.

In addition, as shown in FIG. 2B, when the width L _m of the porous metal layer 13 is larger than (L _c + t _m ), a process for forming the porous metal layer 13 will be described later. The fluidity f _{1 in} the planar direction of the porous metal layer precursor is reduced, and the fluidity f ₂ in the thickness direction is dominant in the vicinity of the semiconductor element 12. For this reason, the porous metal layer precursor climbs up the side surface 123 of the semiconductor element 12 and easily adheres to the side surface 123. On the side surface 123 of the semiconductor element 12, the larger the adhesion area of the porous metal layer precursor, the easier the metal diffusion occurs from the porous metal layer precursor into the semiconductor element 12 due to heating during firing. As a result, in the semiconductor element 12 after firing, the leakage current increases and the breakdown voltage characteristics deteriorate.

  The porous metal layer 13 is a sintered body of metal particles and has a large number of pores inside. The void | hole here is a part in which the metal material formed in the sintered compact does not exist, and is formed of the clearance gap between metal microparticles. It is preferable that the volume ratio occupied by the metal material is in the range of 50 to 99.999% inside the porous metal layer 13. The average maximum width of the pores is preferably 10 to 1000 nm. The holes may be partially filled with an organic material.

  The metal fine particles composing the porous metal layer 13 are Cu (copper), Ag (silver), Au (gold), Al (aluminum), Ni (nickel), Sn (tin), In (indium) and Ti ( It is preferable to use one or more metals selected from titanium) as the main constituent. In particular, since it is excellent in heat dissipation and conductivity, it is preferable to include one or two selected from Cu and Ag, and it is more preferable to include Cu because migration can be further suppressed.

  The porous metal layer 13 is preferably a layer formed by firing a porous metal layer precursor by pressing and heating. According to such a porous metal layer 13, stress generated at the end portion of the joint interface can be relieved, and joint reliability can be improved while maintaining heat dissipation and conductivity.

  In addition, as the porous metal layer 13, for example, a material that satisfies various conditions such as a porosity of 2 to 25% by volume and an average pore diameter of 30 to 600 nm is preferably used. it can.

(4) Others In the connection structure 1, it is preferable that an insulating resin is further interposed between the semiconductor element 12 and the porous metal layer 13. By interposing the insulating resin between the semiconductor element 12 and the porous metal layer 13, it is possible to suppress the porous metal layer 13 from adhering to the side surface 123 of the semiconductor element 12. Metal diffusion can be prevented.

  The insulating resin is preferably a heat resistant resin. Examples of the heat resistant resin include an epoxy resin, a polyimide resin, a silicon resin, an amideimide resin, a maleimide resin, and polyvinyl pyrrolidone. These may be used alone or in combination of two or more. . Further, such a heat-resistant resin preferably has a deflection temperature under load of 150 ° C. or higher and a glass transition temperature (Tg) of 100 ° C. or higher.

  In addition, the connection structure 1 may further contain other layers other than the above as necessary, as long as the effects of the present invention are not hindered.

<Method for manufacturing connection structure>
Next, a method for manufacturing the connection structure 1 will be described.

(1) First, the conductor member 11 and the semiconductor element 12 shown in FIG. 1 are prepared.
As described above, the conductor member 11 can be a substrate used in a semiconductor device, a lead frame, or the like.

As described above, the semiconductor element 12 can also be an electronic component made of a semiconductor or an element at the functional center of the electronic component.
In addition, the semiconductor element 12 may use what was previously cut | disconnected (dicing) to the predetermined size, or after forming the porous metal precursor mentioned later on a semiconductor wafer, a semiconductor wafer with a porous metal precursor May be cut into pieces of a predetermined size (dicing).

  The dicing method is not particularly limited, and can be performed using a known apparatus and method.

  (2) Next, in order to form a porous metal layer precursor that will form the porous metal layer 13 shown in FIG. 1 after firing, a metal fine particle dispersion material is prepared. That is, the porous metal layer 13 is preferably a layer formed by sintering a metal fine particle dispersion.

  The metal fine particle dispersion is prepared by forming metal fine particles (M) into a paint. Such a metal fine particle dispersion material is preferably formed by dispersing metal fine particles (M) in an organic dispersion medium.

  The metal fine particles (M) are selected from Cu (copper), Ag (silver), Au (gold), Al (aluminum), Ni (nickel), Sn (tin), In (indium), and Ti (titanium). It is preferable to include one or two or more metals, and since it is excellent in heat dissipation and conductivity, it is more preferable to include one or two selected from Cu and Ag. It is particularly preferable to contain Cu from the viewpoints of prevention and cost reduction.

  The metal fine particles (M) are fine particles having high conductivity and thermal conductivity and having sinterability, and those having an average primary particle size of nano-size (referring to particles having a size of less than 1 μm) are preferable. Specifically, metal fine particles (M1) having an average primary particle diameter of 2 to 500 nm are preferable. By setting the average primary particle size of the metal fine particles (M) within the above range, a dense porous body having a uniform particle size and pores can be formed by firing.

  The metal fine particles (M) may be used in combination with metal fine particles (M1) having an average primary particle diameter of 2 to 500 nm and metal fine particles (M2) having an average primary particle diameter of 0.5 to 50 μm. Such a combination effectively disperses and stabilizes the metal fine particles (M1) between the metal fine particles (M2), thereby effectively suppressing the metal fine particles (M1) from freely moving during firing. The dispersibility and stability of the metal fine particles (M1) can be further improved. When the metal fine particles (M2) are mixed and used in the metal fine particles (M), the metal fine particles (M1) in the metal fine particles (M) are 50 to 95% by volume, and the metal fine particles (M2) are 50 to 50%. It is preferable to set it as 5 volume% (The total of volume% is 100 volume%). As the metal fine particles (M2), it is preferable to use the same kind of metal particles as described in the metal fine particles (M1).

  Here, the average particle diameter of the primary particles means the diameter of the primary particles of the individual metal fine particles constituting the secondary particles. The primary particle diameter is a measured value that can be measured from an image obtained using an electron microscope. The average particle diameter means the number average particle diameter of primary particles that can be observed using an electron microscope.

  Moreover, it is preferable that the compounding quantity of a metal microparticle (M) is 50-85 mass% in 100 mass% of metal microparticle dispersion materials.

  The organic dispersion medium preferably contains one or more polyols having two or more hydroxyl groups in the molecule, and the melting point of the polyol is more preferably 30 to 280 ° C. The polyol acts to disperse the metal fine particles (M) in the porous metal layer precursor and generate a hydrogen radical upon heating / sintering to generate hydrogen radicals and promote sintering. Demonstrate.

  Examples of such polyols include ethylene glycol, diethylene glycol, 1,2-propanediol, 1,3-propanediol, 1,2-butanediol, 1,3-butanediol, 1,4-butanediol, and 2-butene. -1,4-diol, 2,3-butanediol, pentanediol, hexanediol, octanediol, glycerol, 1,1,1-trishydroxymethylethane, 2-ethyl-2-hydroxymethyl-1,3-propane Diol, 1,2,6-hexanetriol, 1,2,3-hexanetriol, 1,2,4-butanetriol, threitol, erythritol, pentaerythritol, pentitol, xylitol, ribitol, arabitol, hexitol, mannitol, Sorbitol, Zulu Toll, glyceraldehyde, dioxyacetone, threose, erythrulose, erythrose, arabinose, ribose, ribulose, xylose, xylulose, lyxose, glucose, fructose, mannose, idose, sorbose, gulose, talose, tagatose, galactose, allose, altrose , Lactose, xylose, arabinose, isomaltose, glucoheptose, heptose, maltotriose, lactulose, and trehalose.

  As a component of the organic dispersion medium, in addition to the polyol, an alcohol, an organic solvent having an amide group, an ether compound, a ketone compound, an amine compound, or the like can be blended. It is preferable that the dispersion medium other than these polyols is blended so as to be 30% by volume or less in the organic dispersion medium.

Moreover, the organic dispersion medium may contain an organic binder as needed.
The organic binder exhibits the functions of suppressing aggregation of the metal fine particles (M) in the metal fine particle dispersion, adjusting the viscosity of the metal fine particle dispersion, and maintaining the shape after coating on the conductor member 11 and the like. As such an organic binder, a cellulose resin binder, an acetate resin binder, an acrylic resin binder, a urethane resin binder, a polyvinylpyrrolidone resin binder, a polyamide resin binder, a butyral resin binder, and a terpene binder are selected. One type or two or more types are preferable. In addition, when mix | blending an organic binder as an organic dispersion medium, it is preferable to set it as 0.1-10 mass% with respect to 100 mass% of organic dispersion media. When the amount of the organic binder in the organic dispersion medium is too large, the organic binder becomes difficult to thermally decompose when the porous metal layer precursor is fired, and the amount of residual carbon in the porous metal layer 13 increases. Therefore, sintering is hindered, and problems such as cracks and thinness may occur.

  Further, the metal fine particle dispersion may contain an organic dispersant as required. The organic dispersant has an action of dispersing the metal fine particles (M) in the porous metal layer precursor. As the organic dispersant, a water-soluble polymer compound can be used. Examples of such a water-soluble polymer compound include amine-based polymers such as polyethyleneimine and polyvinylpyrrolidone; polyacrylic acid, carboxy Examples thereof include hydrocarbon polymers having a carboxylic acid group such as methylcellulose; acrylamides such as polyacrylamide; polyvinyl alcohol, polyethylene oxide, and starch and gelatin. In addition, when mix | blending a dispersed material with a metal fine particle dispersion material, it is preferable to set it as 0.1-10 mass% with respect to 100 mass% of organic dispersion media. By setting it within the above range, a good dispersion effect can be obtained.

  Moreover, the metal fine particle dispersion material may contain components other than the above as necessary. Examples of components other than the above include various additives such as thickeners and antistatic agents. In addition, when mix | blending various additives, it is preferable that the total amount is 10 mass% or less with respect to 100 mass% of organic dispersion media.

  Moreover, it is preferable that the metal fine particle dispersion has an appropriate viscosity. The viscosity of the metal particle dispersion material may be appropriately adjusted to a viscosity suitable for the method for forming the porous metal layer precursor (coating method or printing method), and is preferably 20 to 200 Pa · s, for example. If the viscosity is too high, printing marks and voids in which air is involved are formed on the surface of the formed porous metal layer precursor. The viscosity can be measured with a vibration viscometer according to JIS Z8803 (2011). Examples of the vibratory viscometer include Seikonic Co., Ltd., vibratory viscometer, model: VM100A.

  Moreover, the adjustment method of a metal fine particle dispersion material is not specifically limited, It can carry out by measuring and mixing an appropriate amount of the said component, and dispersing this by a well-known dispersion method.

  (3) Next, using the fine metal particle dispersion material prepared above, a porous metal layer precursor that becomes the porous metal layer 13 after firing is formed.

  The porous metal layer precursor may be formed directly on the conductor member 11 or the semiconductor element 12, or may be disposed between the conductor member 11 and the semiconductor element 12 after being formed on the carrier sheet.

  The method for forming the porous metal layer precursor is not particularly limited, and can be appropriately selected from known methods depending on the viscosity, formation range, thickness, and the like. For example, a coating method, a printing method, a brush coating method, a transfer method, a sputtering method, or the like can be used.

  The porous metal layer precursor is formed on the conductor member 11, the semiconductor element 12, or the carrier sheet, and then dried as necessary. The drying temperature of the porous metal layer precursor is preferably 110 to 180 ° C., the drying time is preferably 10 to 60 minutes, and the drying atmosphere is preferably a nitrogen atmosphere with an oxygen concentration of 1% or less. The thickness of the porous metal layer precursor after drying shrinks to a thickness of 50 to 70% as compared with that before drying.

In forming the porous metal layer precursor, the porous metal layer precursor is taken into consideration in the firing step with pressurization described later in consideration of deformation (flow and shrinkage) of the porous metal precursor. It is preferable to appropriately adjust the viscosity, formation width, thickness, etc. of the body. Thus, it is possible to control the thickness t _m and the width L _m of the porous metal layer 13 obtained after pressing and sintering in a predetermined range. For example, with respect to the viscosity of the porous metal layer precursor, the viscosity of the metal fine particle dispersion material used when forming the porous metal layer precursor, the drying conditions when drying the porous metal layer precursor, etc. It can be adjusted by appropriately adjusting.

  (4) Next, a laminate in which the porous metal layer precursor formed as described above is disposed between the conductor member 11 and the semiconductor element 12 is produced.

  Specifically, (i) the semiconductor element 12 is arranged on the porous metal precursor formed on the conductor member 11, and (ii) the semiconductor element 12 on which the porous metal precursor is formed is porous. It arrange | positions on the conductor member 11 from the metal precursor side, or (iii) arrange | positions the porous metal precursor formed on the carrier sheet on the conductor member 11, and also on this porous metal layer precursor By disposing the semiconductor element 12 in the above, the stacked body can be manufactured.

  (5) And the porous metal layer precursor is sintered and the porous metal layer 13 is formed by firing the laminate thus obtained. Thereby, the conductor member 11 and the semiconductor element 12 are joined via the porous metal layer 13, and the connection structure 1 shown in FIG. 1 is obtained. In addition, it is preferable that baking of a laminated body is performed by the heating accompanying pressurization.

  The pressurization at the time of firing the laminate is preferably performed from the upper side of the semiconductor element 12 at a pressure of 5 to 20 MPa. If the pressure condition exceeds 20 MPa, the semiconductor element 12 may be damaged.

  For the pressurization as described above, for example, a sintering apparatus shown in FIG. 3 can be used. In other words, the porous metal layer precursor 13 according to the present embodiment can be formed by sintering the porous metal layer precursor by pressurizing and baking by the following operations using the apparatus.

  A press plate 42 for layup shown in FIG. 3A is prepared, and the work 41 is laid up on the press plate 42 and set on the lower heating plate 44 of the vacuum press machine 43. Thereafter, as shown in FIG. 3B, the chamber 45 is closed and the inside of the chamber 45 is evacuated. Then, as shown in FIG. 3C, the work 41 is sandwiched between the upper heating plate 47 and the lower heating plate 44 with the pressure applied by the pressure cylinder 46 and heated. The porous metal layer precursor is sintered and the porous metal layer 13 is formed by heating and baking under the pressure.

  Moreover, it is preferable to perform the heating at the time of baking of a laminated body, hold | maintain at a fixed temperature after temperature rising at a 5-20 degreeC / min temperature increase rate. By setting the heating rate within the above range, for example, it is possible to form the porous metal layer 13 having a porosity of 2 to 25% by volume and an average pore diameter of 30 to 600 nm.

  In addition, it is preferable that holding temperature shall be 200-300 degreeC. The holding time is preferably adjusted as appropriate depending on the holding temperature, but is preferably 0.01 to 1.0 hour, for example. By setting the holding temperature and holding time in the above ranges, the porous metal layer precursor is satisfactorily sintered, and the conductor member 11 and the semiconductor element 12 are formed by the well formed porous metal layer 13. Bonded well. Further, if the holding temperature is too high or the holding time is too long, the semiconductor element 12 may be damaged, and metal fine particles forming the porous metal layer 13 are likely to diffuse into the semiconductor element 12. Tend to be.

  The laminated body held at the temperature and pressure for a certain period of time is gradually unloaded after cooling, and is recovered from the firing apparatus as the connection structure 1.

  The connection structure 1 thus obtained can prevent an increase in leakage current in the semiconductor element 12 and is excellent in breakdown voltage characteristics.

  In the connection structure 1, it is preferable to further interpose an insulating resin between the semiconductor element 12 and the porous metal layer 13. The method of interposing the insulating resin is not particularly limited, and examples thereof include the following method.

(A) Method of blending insulating resin into porous metal layer precursor An appropriate amount of insulating resin is blended in advance in the metal fine particle dispersion when forming the porous metal layer precursor, and the metal fine particle dispersion A porous metal layer precursor is formed using the material. When a laminate having a porous metal layer precursor blended with such an insulating resin is fired by the above-described method, the insulating resin and organic in the porous metal layer precursor are heated by pressurization and heating during firing. The dispersion medium is separated from the metal fine particles (M) and extruded to the outer peripheral side. Since the extruded insulating resin remains on the outer peripheral surface of the porous metal layer 13 even after sintering, the connection structure 1 in which the insulating resin is interposed between the semiconductor element 12 and the porous metal layer 13 is obtained. .

(B) Method for forming an insulating resin layer A solution in which an insulating resin is dispersed is prepared in advance. Using the resin solution, an insulating resin layer is formed on the semiconductor element 12, the porous metal layer precursor, or the carrier sheet, and disposed between the semiconductor element 12 and the porous metal layer precursor. By firing the laminated body thus obtained by the above-described method, a connection structure 1 in which an insulating resin is interposed between the semiconductor element 12 and the porous metal layer 13 is obtained. In addition, the formation method and arrangement | positioning method of this insulating resin layer can be performed by the method similar to the porous metal layer precursor mentioned above.

  As described above, the insulating metal is interposed between the semiconductor element 12 and the porous metal layer precursor during firing, so that the porous metal layer precursor flows by heating with pressurization, Even when the porous metal layer precursor craws up the side surface of the semiconductor element 12, since the insulating resin adheres to the side surface 123 side of the semiconductor element 12 first, the metal fine particles (M) are directly applied to the side surface 123. Can be prevented and metal diffusion into the semiconductor element 12 can also be prevented.

  Moreover, as such an insulating resin, the above-mentioned heat resistant resin can be used suitably.

[Second Embodiment]
In the present embodiment, another embodiment of the connection structure 1 of the present invention will be described with reference to FIGS. 4 and 5. In addition, except the part shown below, it has the structure and effect similar to 1st Embodiment, and the description which overlaps is partially abbreviate | omitted.

  Here, FIG. 4 is a diagram illustrating a cross section of the connection structure 1, and FIG. 5 is a diagram illustrating a part of the cross section of the connection structure that does not satisfy a preferable condition.

  As shown in FIG. 4, a part of the semiconductor element 12 constituting the connection structure 1 according to the first embodiment is improved. That is, the connection structure 1 includes the chamfered portion 125 in which the semiconductor element 12 preferably extends across the surface 122 opposite to the surface 121 facing the porous metal layer 13 and the side surface 123 of the semiconductor element 12. Yes.

Here, the chamfering height H of the chamfered portion 125 along the height direction of the semiconductor element 12 is preferably less than or equal to ½ of the thickness t _c of the semiconductor element 12. By having such a chamfered portion 125, chipping resistance is improved.

  However, as shown in FIG. 5A, if the chamfering height H is too large, chipping is likely to occur during dicing, and the connection surface between the semiconductor element 12 and the porous metal layer 13 during firing. Since cracks are likely to occur in the vicinity, the yield deteriorates. Further, when the chamfering height H is too large, the leakage current increases and the breakdown voltage characteristics of the semiconductor element 12 tend to deteriorate with an increase in the amount of scooping up of the porous metal layer precursor during firing. . In particular, when the scooped-up porous metal layer precursor adheres to the guard ring on the semiconductor surface side, breakdown may occur due to movement of metal charges (ions).

As shown in FIGS. 6A and 6B, the scooping amount t _f is defined by the interface (121, 132) where the back electrode of the semiconductor element 12 and the porous metal layer 13 are in contact with the reference plane. In this case, the height when the porous metal layer 13 or the porous metal layer precursor flows in the thickness direction from the reference surface along the side surface 123 of the semiconductor element 12.

In particular, creeping amount t _f of porous metal layer precursor, if a more than half of the thickness t _c of the semiconductor element 12, an increase in the problems of metal diffusion and leakage current associated therewith to the semiconductor element 12 Becomes prominent.

  The chamfer width W of the chamfered portion 125 is preferably 12.5 μm or more. As shown in FIG. 5B, if the chamfering width W is too small, it becomes difficult to form the chamfered portion 125. On the other hand, if the chamfer width W is too small, the porous metal layer precursor flows in the heating step with pressurization when forming the porous metal layer 13 and crawls up the side surface 123 of the semiconductor element 12. In some cases, there is a risk that the guard ring electrode 127 of the semiconductor element 12 contacts the porous metal layer precursor.

  The chamfer width W of the chamfered portion 125 is preferably 45 μm or less. As shown in FIG. 5C, if the chamfering width W is too large, depending on the pressure resistance of the semiconductor element 12 and the usage condition (humidity and pressure), the porous surface that crawls up the side surface 123 of the semiconductor element 12 as described above. There is a risk that air causes a dielectric breakdown between the material metal layer 13 and the semiconductor element 12 to cause a spark discharge.

Also, as shown in FIG. 4, the chamfered portion 125 includes a straight line X ₁ along the side surface 123 of the semiconductor element 12 and a straight line X ₂ along the surface 122 opposite to the surface facing the porous metal layer 13. It is preferable to have an arcuate curved surface with a radius R centering on the intersection D with

  The chamfering height H and the chamfering width W of the chamfered portion 125 having such an arcuate curved surface are the radius R. Therefore, the radius R is preferably 12.5 to 45 μm. When the radius R satisfies the above range, the chamfered portion can be easily formed, and the porous metal layer precursor crawls up the side surface 123 of the semiconductor element 12 in the connection process involving pressurization. Even so, the porous metal layer can be prevented from coming into contact with the electrode 127, and an appropriate discharge distance can be secured between the rolled up porous metal layer and the electrode 127.

  In FIG. 4, the chamfered portion 125 of the semiconductor element 12 is shown as an arcuate curved surface having a radius R with the intersection D as the center. However, the present invention is not limited to this, and the chamfered portion is a plane. It may be present or only rounded corners. Further, the chamfering height H and the chamfering width W of the chamfered portion 125 may be different from each other.

  The method for forming the chamfered portion 125 is not necessarily limited, but preferably, the chamfered portion 125 is formed by performing the dicing process of the semiconductor element 12 in two stages. According to such a method, chamfering can be performed in the dicing process, and it is not necessary to provide a separate process for chamfering, and the manufacturing process can be simplified. In addition, since it is not necessary to individually process the separated semiconductor elements 12, it is easy to form a chamfered portion.

Specifically, in the first dicing step, the height amount is set to a position where a dicing blade (hereinafter simply referred to as “blade”) enters half or less of the thickness t _m of the semiconductor wafer, followed by the second dicing step. In the dicing process, a two-stage dicing process is performed by setting the height amount to a position where the blade sufficiently penetrates the semiconductor wafer.

In the first dicing step, the chamfering height H is set to be equal to or less than ½ of the thickness t _m of the semiconductor element 12 by setting the height to a position where the blade enters to ½ or less of the thickness t _m of the semiconductor wafer. It can be.

Further, the chamfer width W can be set to a desired size by selecting the kerf width (blade thickness) of the blade and setting the feed speed and the like.
For example, the kerf width of the blade used in the first dicing process is set larger than the kerf width used in the second dicing process, and the chamfering width W can be controlled by the difference in the size. That is, when the feed speed is constant, the width L _{c1 of the} surface 122 in contact with the chamfered portion 125 is determined by the kerf width of the blade used in the first dicing process.
Thus, the chamfer width W of the semiconductor device 12 obtained in the dicing condition as described above, the width L _c of the surface 121 facing the porous metal layer 13, the width L _c1 surface 122 in contact with the chamfered portion 125 In this relationship, it can be expressed as (L _c −L _c1 ) / 2, and it is preferable that the relationship of the following formula (2) is satisfied.
12.5 μm ≦ (L _c −L _c1 ) / 2 ≦ 45 μm (2)

  A wide variety of known dicing apparatuses and blades can be used. Also, known settings can be used for dicing conditions other than those described above.

  Moreover, the formation method of the chamfer part 125 is not restricted to said method, It can also form by a well-known chamfering process. Examples of known chamfering include a method of grinding or polishing a chamfered portion with a grindstone or the like.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, All the aspects included in the concept of this invention and a claim are included, and various within the scope of this invention. Can be modified.

  EXAMPLES Hereinafter, although this invention is demonstrated further in detail based on an Example, this invention is not limited to these Examples.

  (1) Material, (2) Sintering apparatus, and (3) Evaluation method used in this example and comparative example are described below.

(1) Material (A) Semiconductor element / Semiconductor element (A-1)
The size of the semiconductor element (A-1) is 7 mm × 7 mm and the thickness is 150 μm. Further, the surface facing the porous metal layer is metallized with a Ti—Ni—Au alloy.
・ Semiconductor element (A-2)
The size of the semiconductor element (A-2) is 7 mm × 7 mm and the thickness is 150 μm. Moreover, the surface on the side facing the porous metal layer is metallized with a Ti—Ni—Cu alloy.

(B) Porous metal layer precursor / porous metal layer precursor (B-1)
A copper fine particle dispersion (1) in which copper fine particles having an average primary particle diameter of 20 nm are dispersed in diethylene glycol at a concentration of 70% by mass was used. In addition, 2 mass% of polyvinyl pyrrolidone is mix | blended with this copper fine particle dispersion material (1) as a polymer dispersing agent.
-Porous metal layer precursor (B-2)
Copper fine particle dispersion in which copper fine particles in which copper fine particles having an average primary particle diameter of 20 nm and copper fine particles having an average primary particle diameter of 5 μm are mixed at a volume ratio of 7: 3 are dispersed in diethylene glycol at a concentration of 70% by mass. Material (2) was used. In addition, 2 mass% of polyvinyl pyrrolidone is mix | blended with this copper fine particle dispersion material (2) as a polymer dispersing agent.
-Porous metal layer precursor (B-3)
A silver fine particle dispersion (3) in which silver fine particles having an average primary particle diameter of 20 nm are dispersed in octanediol at a concentration of 90% by mass was used. The silver fine particle dispersion (3) contains 2% by mass of polyethylene glycol as a polymer dispersant.

(C) Conductor member / DBC substrate (C-1)
A DBC substrate (Cu / nitrogen silicon / Cu) manufactured by Toshiba Materials Corporation was used. In the DBC substrate, the thickness of the Cu plate: 0.3 mm / the thickness of the ceramic plate: 0.32 mm / the thickness of the Cu plate: 0.3 mm.

(2) Sintering apparatus The sintering apparatus shown in FIG. 3 was used. Using this apparatus, the porous metal layer precursor was sintered by the following operation to form a porous metal layer.
A press plate 42 for layup shown in FIG. 3A is prepared, and the work 41 is laid up on the press plate 42 and set on the lower heating plate 44 of the vacuum press machine 43. Thereafter, as shown in FIG. 3B, the chamber 45 is closed and the inside of the chamber 45 is evacuated. Then, as shown in FIG. 3C, the work 41 is sandwiched between the upper heating plate 47 and the lower heating plate 44 with the pressure applied by the pressure cylinder 46 and heated.
By the heating and firing, the porous metal layer precursor is sintered to form a porous metal layer.

(3) Measurement and evaluation / Measurement of chamfered portion R The prepared sample was filled with resin, polished on the cross section, and then cross-section polisher (manufactured by JEOL Ltd.) was used for the cross section formed by a scanning electron microscope, An image was created using an acceleration voltage of 20.0 kV, a magnification of 5000 times, and a WD of 12.1 mm. From the obtained image, the chamfered portion R on the side surface of the semiconductor element was measured using image processing software (WinROOF, manufactured by Mitani Corporation).

-Chipping resistance (yield)
About the obtained sample, the presence or absence of chipping was confirmed using the optical microscope. Yield (non-defective product rate (%)) was calculated with the sample confirmed to be chipped as a defective product. In this example, a yield of 96% or more was considered good.

-Withstand voltage test About 10 samples extracted arbitrarily (n = 10), the leak current characteristic when applying a reverse voltage of 1200 V was measured using a curve tracer 2600-PCT-4B manufactured by Keithley Instruments. Samples with a leakage current of 100 μA or less were regarded as acceptable (clear), and the number of samples that passed (cleared number) was counted. In this embodiment, a clear number of 9 or more was considered good.

Examples of the present invention and comparative examples will be described below.
[Example 1]
(Formation of porous metal layer precursor)
Using a printing mask with an opening diameter of 6 inches and a thickness of 0.1 mm on the 6-inch wafer back electrode related to the semiconductor element (A-1), printing is supplied with a metal fine particle dispersion (1) squeegee, and in the thermostatic chamber. Arranged. Thereafter, the inside of the thermostatic chamber is replaced with nitrogen to form a nitrogen atmosphere having an oxygen concentration of 1%, the temperature is raised from room temperature to 150 ° C., and dried at 150 ° C. for 60 minutes to obtain the porous metal layer precursor (B-1). Formed.

(Dicing of semiconductor elements)
Next, a dicing tape is applied together with the dicing frame on the dried porous metal layer precursor (B-1), and each piece is divided into 7.0 mm square using a dicing apparatus (DAD 6340 manufactured by DISCO Corporation). It was separated. In addition, as dicing conditions, blade model number NBC-ZH 105F-SE-27HEFF (manufactured by DISCO Corporation, kerf width 0.040 to 0.050 mm), rotation speed 40,000 rpm, feed rate 10.0 mm / sec, The feed pitch was 7.0 mm, and the height was set so that a 10 μm blade could enter the dicing tape.

(Formation of porous metal layer)
The separated semiconductor element (A-1) with the porous metal layer precursor (B-1) is picked up by a die picker (CAP-300II model manufactured by Canon Machinery Co., Ltd.), and the porous metal layer The semiconductor element was mounted on the prepared DBC substrate (C-1) with the precursor facing down. Then, the DBC board | substrate (C-1) with which the porous metal layer precursor (B-1) and the semiconductor element (A-1) were arrange | positioned was heated and sintered using the said sintering apparatus.

  Specifically, a 30 μm release material (PTFE sheet) is disposed on the semiconductor element, and is pressed from above the semiconductor element with a pressure of 10 MPa in a reduced pressure atmosphere (degree of vacuum of 3000 Pa or less) from above the semiconductor element. At the same time, heating was started at a rate of temperature increase of 10 ° C./min, the temperature was raised to 300 ° C., and held at 300 ° C. for 20 minutes. Then, it cooled and unloaded.

  By the sintering, a porous metal layer is formed from the porous metal layer precursor (B-1), and the semiconductor element (A-1) is attached to the DBC substrate (C-) via the porous metal layer. Joined to 1) to obtain a connection structure.

[Example 2]
(Formation of porous metal layer precursor)
Using a printing mask having an opening diameter of 6.98 mm square and a thickness of 0.1 mm, a porous metal layer precursor (B-1) made of a metal fine particle dispersion is applied to the prepared DBC substrate (C-1). Printing was supplied with a squeegee and dried in a thermostatic bath set at 150 ° C. for 60 minutes.

(Formation of porous metal layer)
Next, the semiconductor element (A-1) previously separated into 7.0 mm square was mounted on the dried porous metal layer precursor (B-1). Thereafter, a connection structure was obtained in the same manner as in Example 1.

[Example 3]
In the formation of the porous metal layer precursor, a connection structure was obtained in the same manner as in Example 2 except that a printing mask having an opening diameter of 7.02 mm square was used.

[Example 4]
In the dicing of the semiconductor element, a connection structure was obtained in the same manner as in Example 3 except that the dicing conditions were set as follows.

  The dicing process of Example 4 was performed in two stages. The first dicing step uses a blade model number NBC-ZH 105F-SE-27HEFF (manufactured by DISCO Corporation, kerf width 0.040 to 0.050 mm), rotation speed 40,000 rpm, feed rate 10.0 mm / sec. The feed pitch was set to 7.0 mm, and the height was set so that the blade entered half of the chip thickness. The second dicing step uses a blade model number NBC-ZH 105F-SE-27HEFB (manufactured by DISCO Corporation, with a calf width of 0.020 to 0.025 mm), a rotational speed of 40,000 rpm, and a feed speed of 10.0 mm. / Sec, the feed pitch is 7.0 mm, and the height is set so that a 10 μm blade can be inserted into the dicing tape.

[Example 5]
In the dicing of the semiconductor element, the first dicing step uses a blade model number NBC-ZH 105F-SE-27HEFL (manufactured by DISCO Corporation, kerf width 0.100 to 0.110 mm), and the second dicing step is A connection structure was obtained in the same manner as in Example 4 except that the blade model number NBC-ZH 105F-SE-27HEFF (manufactured by Disco Corporation, kerf width 0.040 to 0.050 mm) was used.

[Example 6]
In the dicing of the semiconductor element, the second dicing step is the same as in Example 5 except that the blade model number NBC-ZH 105F-SE-27HEFA (manufactured by Disco Corporation, kerf width 0.015 to 0.020 mm) is used. Thus, a connection structure was obtained.

[Example 7]
In the formation of the porous metal layer precursor, a connection structure was obtained in the same manner as in Example 4 except that drying was performed for 15 minutes in a thermostatic bath set at 150 ° C.

[Example 8]
In the formation of the porous metal layer precursor, a connection structure was obtained in the same manner as in Example 5 except that drying was performed for 15 minutes in a thermostatic bath set at 150 ° C.

[Example 9]
In the formation of the porous metal layer precursor, a connection structure was obtained in the same manner as in Example 6 except that drying was performed for 15 minutes in a thermostatic bath set at 150 ° C.

[Example 10]
A connection structure was obtained in the same manner as in Example 1 except that the semiconductor element (A-2) was used instead of the semiconductor element (A-1).

[Example 11]
A connection structure was obtained in the same manner as in Example 1 except that the porous metal layer precursor (B-2) was used instead of the porous metal layer precursor (B-1).

[Example 12]
A connection structure was obtained in the same manner as in Example 1 except that the porous metal layer precursor (B-3) was used instead of the porous metal layer precursor (B-1).

[Example 13]
In the formation of the porous metal layer precursor, a connection structure was obtained in the same manner as in Example 1 except that the print mask thickness was 0.3 mm.

[Comparative Example 1]
When the porous metal layer precursor (B-1) is printed and supplied to the DBC substrate (C-1) with a squeegee, a printing mask having an opening diameter of 6.50 mm square and a thickness of 0.1 mm is used. A connection structure was obtained in the same manner as in Example 2.

[Comparative Example 2]
In the formation of the porous metal layer precursor, a connection structure was obtained in the same manner as in Example 2 except that a printing mask having an opening diameter of 7.50 mm square was used.

[Comparative Example 3]
A connection structure was obtained in the same manner as in Comparative Example 1 except that the semiconductor element (A-2) was used instead of the semiconductor element (A-1).

[Comparative Example 4]
A connection structure was obtained in the same manner as in Comparative Example 1 except that the porous metal layer precursor (B-2) was used instead of the porous metal layer precursor (B-1).

[Comparative Example 5]
A connection structure was obtained in the same manner as in Comparative Example 1 except that the porous metal layer precursor (B-3) was used instead of the porous metal layer precursor (B-1).

  Tables 1 and 2 show the results of measuring and evaluating the connection structures obtained in Examples 1 to 13 and Comparative Examples 1 to 5 by the method described above.

As shown in Table 1, in the connection structures according to Examples 1 to 13 of the present invention, in particular, the width L _m of the porous metal layer has a predetermined relationship (L _c −t _m ≦ L _m ≦ L _c + t _m ), it was confirmed that the yield was good and the breakdown voltage characteristics were excellent.

On the other hand, as shown in Table 2, in the connection structures according to Comparative Examples 1 to 5, the width L _m of the porous metal layer has a predetermined relationship (L _c −t _m ≦ L _m ≦ L _c + t _m ) Is not satisfied (L _m <L _c −t _m or L _m > L _c + t _m ).

  Further, according to the present invention, as confirmed in Examples 4 to 9, the yield can be further improved by providing the semiconductor element with a predetermined chamfered portion.

DESCRIPTION OF SYMBOLS 1 Connection structure 11 Conductor member 12 Semiconductor element 121 The surface which opposes a porous metal layer 122 The surface on the opposite side to the surface which opposes a porous metal layer 123 Side surface 125 Chamfered part 127 Guard ring electrode 13 Porous metal layer 41 Work 42 Press plate 43 Vacuum press 44 Lower heating plate 45 Chamber 46 Pressure cylinder 47 Upper heating plate

Claims (9)

A joined structure comprising a conductor member and a semiconductor element joined to the conductor member via a porous metal layer,
A thickness t _m of the porous metal layer is 100 μm or less;
The width L _m of the porous metal layer is determined by the following formula (1) between the width L _{c of} the surface of the semiconductor element facing the porous metal layer and the thickness t _m of the porous metal layer. ) Connection structure that satisfies the relationship
L _c −t _m ≦ L _m ≦ L _c + t _m (1) The semiconductor element has a chamfered portion over the surface opposite to the surface facing the porous metal layer and the side surface of the semiconductor element;
2. The junction structure according to claim 1, wherein a chamfering height H of the chamfered portion along a height direction of the semiconductor element is ½ or less of a thickness t _c of the semiconductor element (C).   The joining structure according to claim 2, wherein a chamfering width W of the chamfered portion is 12.5 μm or more.   The joint structure according to claim 2 or 3, wherein a chamfering width W of the chamfered portion is 45 µm or less. The chamfered portion has an arcuate shape with a radius R, centered at an intersection D between a straight line along the side surface of the semiconductor element and a straight line along the surface opposite to the surface facing the porous metal layer. Has a curved surface,
The joined structure according to claim 2, wherein the radius R is 12.5 μm to 45 μm.   The junction structure according to any one of claims 1 to 5, wherein an insulating resin is further interposed between the semiconductor element and the porous metal layer.   The connection structure according to claim 1, wherein the porous metal layer is a layer formed by firing a porous metal layer precursor by pressing and heating. The porous metal layer is a layer formed by sintering a metal fine particle dispersion (E) obtained by dispersing metal fine particles (M) in an organic dispersion medium,
The connection structure according to any one of claims 1 to 7, wherein the metal fine particles (M) include metal fine particles (M1) having an average particle diameter of 2 to 500 nm.   The connection structure according to any one of claims 1 to 8, wherein the metal fine particles (M) include one or two selected from copper and silver.

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