JP6989242B2 - Connection structure - Google Patents

Description

The present invention relates to a connection structure in which a substrate and a semiconductor element are joined via a porous metal layer.

In a semiconductor device, generally, a step of forming a die mount material for bonding a semiconductor element (chip) on an element supporting portion of a lead frame or a circuit electrode portion of an insulating substrate, and on a lead frame or a circuit electrode are used. The process of mounting a semiconductor element on the surface of the die mount material and joining the element support part of the lead frame or the circuit electrode part of the insulating substrate to the semiconductor element, and the electrode part of the semiconductor element and the terminal part of the lead frame or the insulating substrate. It is manufactured through a wire bonding step of electrically joining terminals and a molding step of resin-coating the semiconductor device assembled in this way.

In Patent Document 1, a semiconductor element is arranged on a metal substrate via a bonding material, and a fillet layer formed of the same material as the bonding material is provided on the side wall portion of the semiconductor element to be at least half the thickness of the semiconductor element. A semiconductor device and a method for manufacturing the same are disclosed. Further, in Patent Document 2, when the first member to be joined (semiconductor element) and the second member to be connected (board) are joined, the first member to be joined is placed on the second member to be joined. A joining method for supplying a joining material in a larger area is disclosed. According to these methods, it is possible to alleviate the stress and strain generated due to the difference in the coefficient of thermal expansion between the joining members at the time of joining, and to prevent the occurrence of cracks and the like due to thermal shock.

Japanese Unexamined Patent Publication No. 2014-12869 Japanese Unexamined Patent Publication No. 2014-110282

However, in the above method, since the bonding material is configured to come into contact with the side surface of the semiconductor element or the guard ring, the metal material (particularly heavy metal) contained in the bonding material is inside the semiconductor element during high temperature operation or high voltage operation. Spread. Such metal diffusion inside the semiconductor element causes an increase in the leakage current, increases the electric resistance inside the semiconductor element, and lowers the withstand voltage characteristic of the semiconductor element. Therefore, it is difficult to secure the electrical connection reliability by the above method.

Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to provide a connection structure capable of suppressing an increase in leakage current to a semiconductor element and preventing a decrease in withstand voltage characteristics of the semiconductor element. do.

In order to solve the above problems, the present invention is a bonded structure including a conductor member and a semiconductor element bonded to the conductor member via a porous metal layer, wherein the porous metal layer is provided. the thickness of the thickness t _m is is at 100μm or less, the width L _m of the porous metal layer, wherein the porous metal layer opposite to the face width L _c and the porous metal layer of the semiconductor element between t _m, and satisfies the following relationship formula (1).
L _c −t _m ≦ L _m ≦ L _c + t _m (1)

Further, the semiconductor element has a chamfered portion extending over a surface opposite to the surface facing the porous metal layer and a side surface of the semiconductor element, and the chamfering along the height direction of the semiconductor element. It is preferable that the chamfered height H of the portion is ½ or less of _{the thickness t c of the semiconductor element (C).}

Further, it is preferable that the chamfer width W of the chamfered portion is 12.5 μm or more.

Further, it is preferable that the chamfer width W of the chamfered portion is 45 μm or less.

Further, the chamfered portion is a circle having a radius R centered on an intersection D of a straight line along the side surface of the semiconductor element and a straight line along the surface opposite to the surface facing the porous metal layer. It is preferable that it has an arc-shaped curved surface and the radius R is 12.5 μm to 45 μm.

Further, it is preferable that an insulating resin is further interposed between the semiconductor element and the porous metal layer.

Further, it is preferable that the porous metal layer is a layer formed by firing a porous metal layer precursor by pressurization / heating.

Further, the porous metal layer is a layer formed by sintering a metal fine particle dispersant (E) obtained by dispersing metal fine particles (M) in an organic dispersion medium, and the metal fine particles (M) are average. It preferably contains metal fine particles (M1) having a particle diameter of 2 to 500 nm.

Further, it is preferable that the metal fine particles (M) contain one or two kinds selected from copper and silver.

According to the present invention, it is possible to obtain a highly reliable connection structure capable of suppressing an increase in leakage current to a semiconductor element and preventing deterioration of the withstand voltage characteristic of the semiconductor element.

It is sectional drawing which shows typically the connection structure which concerns on 1st Embodiment. It is sectional drawing which shows typically the connection structure in the case where _{the width L m} of a porous metal layer does not satisfy a predetermined relationship. It is a conceptual diagram which shows the cross section of the sintering furnace which can be suitably used when making the connection structure which concerns on this invention. It is sectional drawing which shows typically the connection structure which concerns on 2nd Embodiment. It is sectional drawing which shows a part of the cross section of the connection structure when the chamfered part does not satisfy a preferable condition. It is sectional drawing which shows typically how the porous metal layer precursor crawls up the side surface of the semiconductor element.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings as necessary.

[First Embodiment]
<Connection structure>
Hereinafter, one embodiment of the present invention will be described by taking the connection structure 1 shown in FIG. 1 as an example.
As shown in FIG. 1, the connection structure 1 according to the embodiment of the present invention comprises a conductor member 11 and a semiconductor element 12 bonded to the conductor member 11 via a porous metal layer 13. Be prepared.

(1) Conductor member The conductor member 11 is not particularly limited, but for example, a substrate used for a semiconductor device, a lead frame, or the like can be used.

As a substrate used for a semiconductor device, for example, a conductor pattern such as a copper plate formed on one surface of an insulating layer such as ceramics by plating, spattering, or joining with a brazing material or the like, or a direct electrode on a ceramic substrate. A DBC (Conduct Bonded Copper) substrate or the like to which the plates are joined can be preferably used. A metal plate (for example, a copper plate or the like) may be bonded to the other surface of the substrate for the purpose of heat dissipation or the like.

Here, examples of the ceramics include alumina (Al ₂ O ₃ ), aluminum nitride (Al N _{), silicon nitride (Si 3 N 4} ), and the like.

Further, as the lead frame, a known one can be widely used. In particular, if the semiconductor element 12 is mounted on the lead frame, it can be expected that the heat dissipation property will be improved.

The size and shape of the conductor member 11 may be appropriately selected according to the size and number of the semiconductor elements 12 to be mounted.

(2) Semiconductor element The semiconductor element 12 is joined onto the conductor member 11 via the porous metal layer 13.

The semiconductor element 12 is an electronic component made of a semiconductor, or an element at the functional center of the electronic component. Such a semiconductor element 12 is formed by, for example, laminating a semiconductor wafer and a substrate having an external connection electrode, and cutting (dicing) the semiconductor wafer in chip units.

Further, it is preferable that the semiconductor element 12 is provided with a metal layer such as an alloy on the surface 121 facing the porous metal layer 13 with the electrode or the like. Examples of such alloys include Ti-Ni-Au alloys, Ti-Ni-Cu alloys, Ti-Ni-Ag alloys, Ti-Au alloys, Ti-Cu alloys, Ti-Ag alloys and the like.

The size and shape of the semiconductor element 12 can be appropriately selected according to the purpose of use.

(3) Porous Metal Layer The porous metal layer 13 is arranged between the conductor member 11 and the semiconductor element 12.

The thickness _{t m} of the porous metal layer 13 is 100μm or less, preferably 50μm or less. When the thick look t _m exceeds 100 [mu] m, the semiconductor element 12 that emits a large heat on the conductor member 11 (e.g., power devices, etc.) when implementing, when transmitting the heat generated from the semiconductor element 12 to the conductive member 11 side Thermal resistance may increase.

The thickness _{t m} of the porous metal layer 13 is preferably 10μm or more. The smaller the thickness t _{m, the} lower the thermal resistance. On the other hand, if it is too small, the heat stress relaxation property due to the difference in the coefficient of thermal expansion between the members is low, so that the connection reliability may be lowered.

The width _{L m} of the porous metal layer 13 has a width _{L c} of the surface 121 facing the porous metal layer 13 of the semiconductor element 12, between the thickness _{t m,} the following formula (1) Satisfy the relationship.
L _c −t _m ≦ L _m ≦ L _c + t _m (1)
As described above, since the thickness _{t m} of the porous metal layer 13 is 100 [mu] m or less, the width _{L m} of the porous metal layer _13, (L c _{-100μm) above,} (L c + 100μm) It is as follows. Since the width L _m is within ± 100 μm with respect to the width L _c , there is a risk of creeping up due to an improvement in chip mounting accuracy and a decrease in the fluidity of the connecting material (porous metal layer and its precursor). It is possible to suppress deterioration, suppression of crack growth in the guard ring region, and suppression of deterioration of element characteristics due to lack of bonding material.
In particular, the width L _{m of} the porous metal layer 13 satisfies the relationship of the above formula (1), so that the leakage current due to metal diffusion into the inside of the semiconductor element 12 can be obtained while ensuring heat dissipation and connection reliability. The increase can be suppressed, and the withstand voltage characteristic of the semiconductor element 12 can be maintained satisfactorily.

However, the width L _m of the porous metal layer 13, if that does not satisfy the relationship of formula (1), a problem arises as follows. 2 (A) and 2 (B) _{show cross-sectional views of the connection structure when the width L m} of the porous metal layer 13 does not satisfy the relationship of the above formula (1).

As shown in FIG. 2A, when the width L _m of the porous metal layer 13 is smaller than (L _c −t _m ), the heat dissipation from the semiconductor element 12 to the conductor member 11 is lowered. As a result, the thermal resistance of the outer peripheral portion of the semiconductor element 12 increases, which makes it difficult to operate the semiconductor element 12 at a high temperature.

Further, as shown in FIG. 2 (B), when the width L _m of the porous metal layer 13 (L c _{+ t m)} is greater than, in the process of forming the porous metal layer 13 will be described later flowability f ₁ in the planar direction of the porous metal layer precursor is reduced, the fluidity f ₂ in the thickness direction is dominant in the vicinity of the semiconductor element 12. Therefore, the porous metal layer precursor crawls up the side surface 123 of the semiconductor element 12 and easily adheres to the side surface 123. As the adhesion area of the porous metal layer precursor on the side surface 123 of the semiconductor element 12 becomes larger, metal diffusion from the porous metal layer precursor to the inside of the semiconductor element 12 is more likely to occur due to heating during firing. As a result, in the semiconductor element 12 after firing, the leakage current increases and the withstand voltage characteristic deteriorates.

The porous metal layer 13 is a sintered body of metal particles and has a large number of pores inside. The pores referred to here are portions where the metal material formed in the sintered body does not exist, and are formed by gaps between the metal fine particles. It is preferable that the volume ratio of the metal material in the porous metal layer 13 is in the range of 50 to 99.999%. The size of the pores is preferably 10 to 1000 nm on average. The pores may be partially filled with an organic material.

The metal fine particles constituting the porous metal layer 13 include Cu (copper), Ag (silver), Au (gold), Al (aluminum), Ni (nickel), Sn (tin), In (indium) and Ti ( It is preferable that one or more metals selected from (titanium) are the main constituents. In particular, it is preferable to contain one or two kinds selected from Cu and Ag because it is excellent in heat dissipation and conductivity, and it is more preferable to contain Cu because it can suppress migration.

Further, the porous metal layer 13 is preferably a layer formed by firing a porous metal layer precursor by pressurization / heating. According to such a porous metal layer 13, the stress generated at the joint interface end can be relaxed, and the joint reliability can be improved while maintaining heat dissipation and conductivity.

In addition, as the porous metal layer 13, for example, one that satisfies various conditions such as a pore ratio of 2 to 25% by volume and an average pore diameter of 30 to 600 nm can be preferably used. can.

(4) Others In the connection structure 1, it is preferable that an insulating resin is further interposed between the semiconductor element 12 and the porous metal layer 13. By interposing the insulating resin between the semiconductor element 12 and the porous metal layer 13, it is possible to prevent the porous metal layer 13 from adhering to the side surface 123 of the semiconductor element 12, and to the inside of the semiconductor element 12. Metal diffusion can be prevented.

The insulating resin is preferably a heat-resistant resin. Examples of the heat-resistant resin include epoxy resin, polyimide resin, silicon resin, amidoimide resin, maleimide resin, polyvinylpyrrolidone and the like, and these may be used alone or in combination of two or more. .. Further, such a heat-resistant resin preferably has a deflection temperature under load of 150 ° C. or higher and a glass transition temperature (Tg) of 100 ° C. or higher.

The connection structure 1 may further include other layers other than the above, if necessary, as long as the effects of the present invention are not impaired.

<Manufacturing method of connection structure>
Next, a method of manufacturing the connection structure 1 will be described.

(1) First, the conductor member 11 and the semiconductor element 12 shown in FIG. 1 are prepared.
As the conductor member 11, as described above, a substrate used for a semiconductor device, a lead frame, or the like can be used.

Further, as for the semiconductor element 12, as described above, an electronic component made of a semiconductor or an element at the functional center of the electronic component can be used.
The semiconductor element 12 may be a semiconductor device 12 that has been cut (diced) to a predetermined size in advance, or a semiconductor wafer together with the porous metal precursor after forming a porous metal precursor described later on the semiconductor wafer. May be cut (diced) to a predetermined size and individualized.

The dicing method is not particularly limited, and can be performed using a known device and method.

(2) Next, in order to form the porous metal layer precursor that will form the porous metal layer 13 shown in FIG. 1 after firing, a metal fine particle dispersant is prepared. That is, the porous metal layer 13 is preferably a layer obtained by sintering a metal fine particle dispersion material.

The metal fine particle dispersant is prepared by converting metal fine particles (M) into a paint. Such a metal fine particle dispersant is preferably formed by dispersing the metal fine particles (M) in an organic dispersion medium.

The metal fine particles (M) are selected from Cu (copper), Ag (silver), Au (gold), Al (aluminum), Ni (nickel), Sn (tin), In (indium) and Ti (titanium). It is preferable to contain one or more kinds of metals, and since it is excellent in heat dissipation and conductivity, it is more preferable to contain one or two kinds selected from Cu and Ag, and further, for processability and migration. It is particularly preferable to contain Cu from the viewpoint of prevention, cost reduction and the like.

The metal fine particles (M) are fine particles having high conductivity and thermal conductivity and sinterability, and those having an average primary particle diameter of nano size (referring to particles having an average primary particle diameter of less than 1 μm) are preferable. Specifically, metal fine particles (M1) having an average primary particle diameter of 2 to 500 nm are preferable. By setting the average primary particle size of the metal fine particles (M) to the above range, a dense porous body having a uniform particle size and pores can be formed by firing.

As the metal fine particles (M), metal fine particles (M1) having an average primary particle diameter of 2 to 500 nm may be used in combination with metal fine particles (M2) having an average primary particle diameter of 0.5 to 50 μm. By such a combined use, the metal fine particles (M1) are well dispersed and stabilized between the metal fine particles (M2), so that it is possible to effectively suppress the free movement of the metal fine particles (M1) during firing. The above-mentioned metal fine particles (M1) can be further improved in dispersibility and stability. When the metal fine particles (M2) are mixed with the metal fine particles (M) and used, the metal fine particles (M1) in the metal fine particles (M) are 50 to 95% by volume, and the metal fine particles (M2) are 50 to 50 to 100% by volume. It is preferably 5% by volume (the total of% by volume is 100% by volume). As the metal fine particles (M2), it is preferable to use the same kind of metal particles as described in the metal fine particles (M1).

Here, the average particle diameter of the primary particles means the diameter of the primary particles of the individual metal fine particles constituting the secondary particles. The primary particle size is a measured value that can be measured from an image obtained by using an electron microscope. The average particle size means the number average particle size of the primary particles that can be observed using an electron microscope.

The blending amount of the metal fine particles (M) is preferably 50 to 85% by mass in 100% by mass of the metal fine particle dispersant.

The organic dispersion medium preferably contains one or more polyols having two or more hydroxyl groups in the molecule, and the melting point of the polyol is more preferably 30 to 280 ° C. The polyol disperses metal fine particles (M) in the porous metal layer precursor, and at the time of heating and sintering, undergoes a dehydrogenation reaction to generate hydrogen radicals and promote sintering. Demonstrate.

Examples of such a polyol include ethylene glycol, diethylene glycol, 1,2-propanediol, 1,3-propanediol, 1,2-butanediol, 1,3-butanediol, 1,4-butanediol, and 2-butene. -1,4-diol, 2,3-butanediol, pentandiol, hexanediol, octanediol, glycerol, 1,1,1-trishydroxymethylethane, 2-ethyl-2-hydroxymethyl-1,3-propane Diol, 1,2,6-hexanetriol, 1,2,3-hexanetriol, 1,2,4-butanetriol, threitol, erythritol, pentaerythritol, pentitol, xylitol, ribitol, arabinose, hexitol, mannitol, Sorbitol, Zulsitol, Glyceraldehyde, Dioxyacetone, Threitol, Elittlerose, Erythrose, Arabinose, Ribos, Ribulose, Xylose, Xylrose, Lixose, Glucose, Fructose, Mannose, Idoth, Sorboth, Growth, Tallose, Tagatose, Galactose, Allose, One or more selected from altrose, lactose, xylose, arabinose, isomaltose, glucoheptose, heptose, maltotriol, lactulose, and trehalose can be exemplified.

As the components of the organic dispersion medium, alcohol, an organic solvent having an amide group, an ether compound, a ketone compound, an amine compound and the like can be blended in addition to the above polyol. Dispersion media other than these polyols are preferably blended in an organic dispersion medium so as to be 30% by volume or less in total.

Further, the organic dispersion medium may contain an organic binder, if necessary.
The organic binder exhibits functions of suppressing aggregation of metal fine particles (M) in the metal fine particle dispersant, adjusting the viscosity of the metal fine particle dispersant, and maintaining the shape after being applied onto the conductor member 11 or the like. As such an organic binder, select from a cellulose resin-based binder, an acetate resin-based binder, an acrylic resin-based binder, a urethane resin-based binder, a polyvinylpyrrolidone resin-based binder, a polyamide resin-based binder, a butyral resin-based binder, and a terpene-based binder. One kind or two or more kinds are preferable. When an organic binder is blended as the organic dispersion medium, it is preferably 0.1 to 10% by mass with respect to 100% by mass of the organic dispersion medium. If the amount of the organic binder in the organic dispersion medium is too large, the organic binder is less likely to be thermally decomposed when the porous metal layer precursor is fired, and the amount of residual carbon in the porous metal layer 13 increases. Therefore, sintering may be hindered and problems such as cracks and thin profits may occur.

Further, the metal fine particle dispersant may contain an organic dispersant, if necessary. The organic dispersant has an action of dispersing the metal fine particles (M) in the porous metal layer precursor. A water-soluble polymer compound can be used as the organic dispersant, and examples of such a water-soluble polymer compound include amine-based polymers such as polyethyleneimine and polyvinylpyrrolidone; polyacrylic acid and carboxy. Hydromolecular polymers having a carboxylic acid group such as methylcellulose; acrylamide such as polyacrylamide; polyvinyl alcohol, polyethylene oxide, starch and gelatin and the like can be mentioned. When the dispersant is mixed with the metal fine particle dispersant, it is preferably 0.1 to 10% by mass with respect to 100% by mass of the organic dispersion medium. By setting the above range, a good dispersion effect can be obtained.

Further, the metal fine particle dispersant may contain components other than the above, if necessary. Examples of the components other than the above include various additives such as thickeners and antistatic agents. When various additives are blended, the total amount thereof is preferably 10% by mass or less with respect to 100% by mass of the organic dispersion medium.

Further, it is preferable that the metal fine particle dispersant has an appropriate viscosity. The viscosity of the metal particle dispersant may be appropriately adjusted to a viscosity suitable for the method for forming the porous metal layer precursor (coating method or printing method), but is preferably 20 to 200 Pa · s, for example. If the viscosity is too high, it causes the formation of print marks on the surface of the formed porous metal layer precursor and voids in which air is entrained. The viscosity can be measured with a vibration viscometer according to JIS Z8803 (2011). Examples of the vibration viscometer include a vibration viscometer manufactured by SEKONIC Corporation and a model: VM100A.

The method for adjusting the metal fine particle dispersant is not particularly limited, and the above components can be weighed and blended in an appropriate amount and dispersed by a known dispersion method.

(3) Next, the metal fine particle dispersant prepared above is used to form a porous metal layer precursor that becomes the porous metal layer 13 after firing.

The porous metal layer precursor may be formed directly on the conductor member 11 or the semiconductor element 12, or may be formed on the carrier sheet and then arranged between the conductor member 11 and the semiconductor element 12.

The method for forming the porous metal layer precursor is not particularly limited, and can be appropriately selected from known methods according to the viscosity, formation range, thickness, and the like. For example, a coating method, a printing method, a brush coating method, a transfer method, a sputtering method and the like can be used.

The porous metal layer precursor is formed on the conductor member 11, the semiconductor element 12, or the carrier sheet, and then dried, if necessary. The drying temperature of the porous metal layer precursor is preferably 110 to 180 ° C., the drying time is preferably 10 to 60 minutes, and the drying atmosphere is preferably a nitrogen atmosphere having an oxygen concentration of 1% or less. The thickness of the porous metal layer precursor after drying shrinks to a thickness of 50 to 70% as compared with that before drying.

When forming the porous metal layer precursor, the porous metal layer precursor is deformed (flowed or shrunk) in the firing step accompanied by pressurization, which will be described later. It is preferable to appropriately adjust the viscosity of the body, the formation width, the thickness and the like. _{Thereby, the thickness t m} and the width L _m of the porous metal layer 13 obtained after pressurization and firing can be controlled within a predetermined range. For example, regarding the viscosity of the porous metal layer precursor, the viscosity of the metal fine particle dispersant used when forming the porous metal layer precursor, the drying conditions when drying the porous metal layer precursor, and the like. Can be adjusted by appropriately adjusting.

(4) Next, a laminated body in which the porous metal layer precursor formed above is arranged between the conductor member 11 and the semiconductor element 12 is produced.

Specifically, (i) the semiconductor element 12 is arranged on the porous metal precursor formed on the conductor member 11, and (ii) the semiconductor element 12 on which the porous metal precursor is formed is made porous. The porous metal precursor arranged on the conductor member 11 from the metal precursor side or (iii) formed on the carrier sheet is arranged on the conductor member 11, and further, on the porous metal layer precursor. By arranging the semiconductor element 12 in the above-mentioned laminated body, the laminated body can be manufactured.

(5) Then, by firing the laminate thus obtained, the porous metal layer precursor is sintered and the porous metal layer 13 is formed. As a result, the conductor member 11 and the semiconductor element 12 are joined via the porous metal layer 13, and the connection structure 1 shown in FIG. 1 is obtained. It is preferable that the laminate is fired by heating with pressure.

The pressurization at the time of firing the laminate is preferably performed from the upper side of the semiconductor element 12 at a pressure of 5 to 20 MPa. If the pressure condition exceeds 20 MPa, the semiconductor element 12 may be damaged.

For the pressurization as described above, for example, the sintering apparatus shown in FIG. 3 can be used. That is, the porous metal layer precursor can be sintered to form the porous metal layer 13 according to the present embodiment by pressurizing and firing by the following operation using the apparatus.

The press plate 42 for layup shown in FIG. 3A is prepared, the work 41 is laid up on the press plate 42, and the work 41 is set on the lower heating plate 44 of the vacuum press machine 43. After that, as shown in FIG. 3B, the chamber 45 is closed to create a vacuum inside the chamber 45. Then, as shown in FIG. 3C, the work 41 is sandwiched between the upper heating plate 47 and the lower heating plate 44 in a state where pressure is applied by the pressurizing cylinder 46 to heat the work 41. By heating and firing under the above pressure, the porous metal layer precursor is sintered and the porous metal layer 13 is formed.

Further, it is preferable that the laminated body is heated at a heating rate of 5 to 20 ° C./min and then held at a constant temperature. By setting the temperature rise rate in the above range, for example, it becomes possible to form the porous metal layer 13 having a pore ratio of 2 to 25% by volume and an average pore diameter of 30 to 600 nm.

The holding temperature is preferably 200 to 300 ° C. The holding time is preferably adjusted appropriately depending on the holding temperature, but is preferably 0.01 to 1.0 hour, for example. By setting the holding temperature and holding time within the above ranges, the porous metal layer precursor is sintered satisfactorily, and the conductor member 11 and the semiconductor element 12 are brought together by the well-formed porous metal layer 13. It is well joined. Further, if the holding temperature is too high or the holding time is too long, the semiconductor element 12 may be damaged, and the metal fine particles forming the porous metal layer 13 are likely to diffuse into the semiconductor element 12. It tends to be.

The laminate held at the above temperature and pressure for a certain period of time is slowly loaded after cooling, and is recovered from the firing apparatus as the connection structure 1.

The connection structure 1 thus obtained can prevent an increase in leakage current in the semiconductor element 12, and is excellent in withstand voltage characteristics.

In the connection structure 1, it is preferable that an insulating resin is further interposed between the semiconductor element 12 and the porous metal layer 13. The method of interposing the insulating resin is not particularly limited, and examples thereof include the following methods.

(B) Method of blending an insulating resin with a porous metal layer precursor An appropriate amount of an insulating resin is blended in advance in a metal fine particle dispersant for forming a porous metal layer precursor, and the metal fine particles are dispersed. The material is used to form a porous metal layer precursor. When a laminate having a porous metal layer precursor containing such an insulating resin is fired by the above method, the insulating resin and organic material in the porous metal layer precursor are subjected to pressurization and heating during firing. The dispersion medium is separated from the metal fine particles (M) and extruded to the outer peripheral side. Since the extruded insulating resin stays on the outer peripheral surface of the porous metal layer 13 even after sintering, a connection structure 1 in which the insulating resin is interposed between the semiconductor element 12 and the porous metal layer 13 can be obtained. ..

(B) Method for forming the insulating resin layer Prepare a solution in which the insulating resin is dispersed in advance. An insulating resin layer is formed on the semiconductor element 12, the porous metal layer precursor, or the carrier sheet using the resin solution, and is arranged between the semiconductor element 12 and the porous metal layer precursor. By firing the laminate thus obtained by the above-mentioned method, a connection structure 1 in which an insulating resin is interposed between the semiconductor element 12 and the porous metal layer 13 can be obtained. The method for forming and arranging the insulating resin layer can be the same as that for the porous metal layer precursor described above.

As described above, since the insulating resin is interposed between the semiconductor device 12 and the porous metal layer precursor at the time of firing, the porous metal layer precursor flows due to heating accompanied by pressurization. Even when the porous metal layer precursor crawls up the side surface of the semiconductor element 12, the insulating resin first adheres to the side surface 123 side of the semiconductor element 12, so that the metal fine particles (M) are directly attached to the side surface 123. Can be prevented from adhering to the semiconductor element 12, and metal diffusion into the semiconductor element 12 can also be prevented.

Further, as such an insulating resin, the above-mentioned heat-resistant resin can be preferably used.

[Second Embodiment]
In this embodiment, another embodiment of the connection structure 1 of the present invention will be described with reference to FIGS. 4 and 5. It should be noted that the parts other than the parts shown below have the same configuration and operation / effect as those of the first embodiment, and some duplicate descriptions are omitted.

Here, FIG. 4 is a diagram showing a cross section of the connection structure 1, and FIG. 5 is a diagram showing a part of a cross section of the connection structure that does not satisfy the preferable conditions.

As shown in FIG. 4, a part of the semiconductor element 12 constituting the connection structure 1 according to the first embodiment is improved. That is, the connection structure 1 has a chamfered portion 125 in which the semiconductor element 12 preferably extends over the surface 122 on the opposite side of the surface 121 facing the porous metal layer 13 and the side surface 123 of the semiconductor element 12. There is.

Here, the chamfer height H of the chamfered portion 125 along the height direction of the semiconductor element 12 is preferably ½ or less of _{the thickness t c of the semiconductor element 12.} By having such a chamfered portion 125, the chipping resistance is improved.

However, as shown in FIG. 5A, if the chamfer height H is too large, chipping is likely to occur during dicing, and the connection surface between the semiconductor element 12 and the porous metal layer 13 during firing. Yield deteriorates because cracks are likely to occur in the vicinity. Further, when the chamfer height H is too large, the leakage current tends to increase and the withstand voltage characteristics of the semiconductor element 12 tend to decrease as the amount of creeping up of the porous metal layer precursor during firing increases. .. In particular, when the crawled porous metal layer precursor adheres to the guard ring on the semiconductor surface side, breakdown may occur due to the movement of metal charges (ions).

Note that the creeping amount _{t f,} as shown in FIG. 6 (A) and (B), and the reference plane of the surface (121,132) of the back electrode and the porous metal layer 13 of the semiconductor element 12 is in contact In this case, the height when the porous metal layer 13 or the porous metal layer precursor flows along the side surface 123 of the semiconductor element 12 in the thickness direction from the reference plane.

In particular, when the creep-up amount t _{f of} the porous metal layer precursor is more than half of the thickness t _c of the semiconductor device 12, there is a problem of metal diffusion into the semiconductor device 12 and an increase in leakage current associated therewith. Becomes noticeable.

Further, the chamfer width W of the chamfered portion 125 is preferably 12.5 μm or more. As shown in FIG. 5B, if the chamfer width W is too small, it becomes difficult to form the chamfered portion 125. Further, if the chamfering width W is too small, the porous metal layer precursor flows in the heating step accompanied by pressurization when forming the porous metal layer 13, and crawls up the side surface 123 of the semiconductor element 12. In this case, there is a risk that the guard ring electrode 127 of the semiconductor element 12 and the porous metal layer precursor come into contact with each other.

The chamfer width W of the chamfered portion 125 is preferably 45 μm or less. As shown in FIG. 5C, if the chamfering width W is too large, depending on the withstand voltage of the semiconductor element 12 and the usage conditions (humidity and pressure), the porous surface 123 of the semiconductor element 12 is crawled up as described above. There is a risk that air will cause dielectric breakdown between the quality metal layer 13 and the semiconductor element 12 and cause spark discharge.

Further, as shown in FIG. 4, the chamfered portion 125 has a straight line X _{1 along the side surface 123 of the semiconductor element 12 and a straight line X 2} along the surface 122 on the opposite side of the surface facing the porous metal layer 13. It is preferable to have an arcuate curved surface having a radius R centered on the intersection D with the above.

The chamfer height H and the chamfer width W of the chamfered portion 125 having such an arcuate curved surface have a radius R. Therefore, the radius R is preferably 12.5 to 45 μm. When the radius R satisfies the above range, the chamfering portion can be easily formed, and the porous metal layer precursor crawls up the side surface 123 of the semiconductor element 12 in the connection process involving pressurization. Even so, it is possible to prevent the porous metal layer from coming into contact with the electrode 127, and it is possible to secure an appropriate discharge distance between the creeped-up porous metal layer and the electrode 127.

In FIG. 4, the chamfered portion 125 of the semiconductor element 12 is shown as an arcuate curved surface having a radius R centered on the intersection D, but the present invention is not limited to this, and the chamfered portion is a flat surface. It may be present, or it may be just rounded corners. Further, the chamfer height H and the chamfer width W of the chamfered portion 125 may have different lengths.

The method for forming the chamfered portion 125 is not necessarily limited, but is preferably formed by performing the dicing step of the semiconductor element 12 in two stages. According to such a method, the chamfering process can be performed in the dicing process, it is not necessary to provide a separate process for the chamfering process, and the manufacturing process can be simplified. Further, since it is not necessary to individually process the individualized semiconductor elements 12, it is easy to form the chamfered portion.

Specifically, in the first dicing step, the height amount is set to a position where the dicing blade (hereinafter, simply referred to as “blade”) can be _{inserted up to 1/2 or less of the thickness t m of the semiconductor wafer, and the subsequent second dicing step.} In the dicing step, the height amount is set at a position where the blade sufficiently penetrates the semiconductor wafer, and a two-step dicing step is performed.

In the first dicing step, the height amount, by the blades set to 1/2 fall to below the position of the thickness t _m of the semiconductor wafer, less than half of the thickness t _m of the semiconductor element 12 to chamfer height H Can be.

Further, the chamfer width W can be set to a desired size by selecting the calf width (blade thickness) of the blade and setting the feed rate and the like.
For example, the calf width of the blade used in the first dicing step is set to be larger than the calf width used in the second dicing step, and the chamfer width W can be controlled by the difference in the size. That is, when the feed rate is constant, the width L _{c1 of the} surface 122 in contact with the chamfered portion 125 is determined by the calf width of the blade used in the first dicing step.
Therefore, the chamfered width W of the semiconductor element 12 obtained under the above dicing conditions includes the width L _{c of the surface 121 facing the porous metal layer 13 and the width L c1 of the} surface 122 in contact with the chamfered portion 125. Can be expressed as (L _{c −} L _c1 ) / 2, and it is preferable that the relationship of the following formula (2) is satisfied.
12.5 μm ≤ (L _{c −} L _c1 ) / 2 ≤ 45 μm (2)

As the dicing device and the blade, known ones can be widely used. Further, known settings can be used for dicing conditions other than the above.

Further, the method for forming the chamfered portion 125 is not limited to the above method, and the chamfered portion 125 can be formed by a known chamfering process. Examples of the known chamfering process include a method of grinding or polishing the chamfered portion with a grindstone or the like.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, but includes all aspects included in the concept of the present invention and claims, and varies within the scope of the present invention. Can be modified to.

Hereinafter, the present invention will be described in more detail based on examples, but the present invention is not limited to these examples.

The (1) material, (2) sintering apparatus, and (3) evaluation method used in this example and comparative example are described below.

(1) Material (A) Semiconductor element / semiconductor element (A-1)
The size of the semiconductor element (A-1) is 7 mm × 7 mm, and the thickness is 150 μm. Further, the surface facing the porous metal layer is metallized with a Ti—Ni—Au alloy.
-Semiconductor device (A-2)
The size of the semiconductor element (A-2) is 7 mm × 7 mm, and the thickness is 150 μm. Further, the surface facing the porous metal layer is metallized with a Ti—Ni—Cu alloy.

(B) Porous Metal Layer Precursor / Porous Metal Layer Precursor (B-1)
A copper fine particle dispersant (1) in which copper fine particles having an average primary particle diameter of 20 nm are dispersed in diethylene glycol at a concentration of 70% by mass was used. The copper fine particle dispersant (1) contains 2% by mass of polyvinylpyrrolidone as a polymer dispersant.
-Porous metal layer precursor (B-2)
Copper fine particles in which copper fine particles having an average primary particle diameter of 20 nm and copper fine particles having an average primary particle diameter of 5 μm are mixed at a volume ratio of 7: 3 are dispersed in diethylene glycol at a concentration of 70% by mass. Material (2) was used. The copper fine particle dispersant (2) contains 2% by mass of polyvinylpyrrolidone as a polymer dispersant.
-Porous metal layer precursor (B-3)
A silver fine particle dispersant (3) in which silver fine particles having an average primary particle diameter of 20 nm are dispersed in octanediol at a concentration of 90% by mass was used. The silver fine particle dispersant (3) contains 2% by mass of polyethylene glycol as a polymer dispersant.

(C) Conductor member / DBC substrate (C-1)
A DBC substrate (Cu / silicon nitrogen / Cu) manufactured by Toshiba Materials Co., Ltd. was used. In the DBC substrate, the thickness of the Cu plate is 0.3 mm, the thickness of the ceramic plate is 0.32 mm, and the thickness of the Cu plate is 0.3 mm.

(2) Sintering device The sintering device shown in FIG. 3 was used. Using the device, the porous metal layer precursor was sintered by the following operation to form a porous metal layer.
The press plate 42 for layup shown in FIG. 3A is prepared, the work 41 is laid up on the press plate 42, and the work 41 is set on the lower heating plate 44 of the vacuum press machine 43. After that, as shown in FIG. 3B, the chamber 45 is closed to create a vacuum inside the chamber 45. Then, as shown in FIG. 3C, the work 41 is sandwiched between the upper heating plate 47 and the lower heating plate 44 in a state where pressure is applied by the pressurizing cylinder 46 to heat the work 41.
By the above heating and firing, the porous metal layer precursor is sintered and the porous metal layer is formed.

(3) Measurement and evaluation / Measurement of chamfered portion R The prepared sample is embedded with resin, the cross section is polished, and then the cross section formed by the cross section polisher (manufactured by JEOL Ltd.) is subjected to a scanning electron microscope. An image was created using an acceleration voltage of 20.0 kV, a magnification of 5000 times, and a WD of 12.1 mm). From the obtained image, the chamfered portion R on the side surface of the semiconductor element was measured using image processing software (WinROOF manufactured by Mitani Corporation).

・ Chipping resistance (yield)
The presence or absence of chipping was confirmed in the obtained sample using an optical microscope. The yield (non-defective product rate (%)) was calculated by using the sample in which chipping was confirmed as a defective product. In this example, a yield of 96% or more was considered to be good.

-Withstand voltage test For 10 arbitrarily extracted samples (n = 10), the leakage current characteristics when a reverse voltage of 1200 V was applied were measured using a curve tracer 2600-PCT-4B manufactured by Keithley Instruments. Samples with a leak current of 100 μA or less were regarded as acceptable (cleared), and the number of passed samples (cleared number) was counted. In this embodiment, the number of clears is 9 or more as good.

Hereinafter, examples and comparative examples of the present invention will be described.
[Example 1]
(Formation of porous metal layer precursor)
Using a printing mask with an opening diameter of 6 inches and a thickness of 0.1 mm on the back electrode of the 6 inch wafer related to the semiconductor element (A-1), printing is supplied with the metal fine particle dispersion material (1) squeegee, and the inside of the constant temperature bath. Placed in. After that, the inside of the constant temperature bath was replaced with nitrogen to create a nitrogen atmosphere having an oxygen concentration of 1%, the temperature was raised from room temperature to 150 ° C., and the mixture was dried at 150 ° C. for 60 minutes to obtain the porous metal layer precursor (B-1). Formed.

(Dicing of semiconductor elements)
Next, the dicing tape was collectively attached together with the dicing frame on the dried porous metal layer precursor (B-1), and the pieces were made into 7.0 mm squares using a dicing device (DAD6340 manufactured by DISCO Corporation). It was clarified. As the dicing conditions, the blade model number NBC-ZH 105F-SE-27HEFF (manufactured by DISCO Corporation, calf width 0.040 to 0.050 mm) is used, the rotation speed is 40,000 rpm, the feed rate is 10.0 mm / sec, and the feed rate is 10.0 mm / sec. The feed pitch was set to 7.0 mm, and the height amount was set so that the 10 μm blade could be inserted into the dicing tape.

(Formation of porous metal layer)
A semiconductor device (A-1) with an individualized porous metal layer precursor (B-1) is picked up by a die spiker (CAP-300II model manufactured by Canon Machinery Co., Ltd.), and the porous metal layer is picked up. The semiconductor device was mounted on the prepared DBC substrate (C-1) with the precursor facing down. Then, the DBC substrate (C-1) in which the porous metal layer precursor (B-1) and the semiconductor element (A-1) were arranged was heated and sintered using the above-mentioned sintering apparatus.

Specifically, a 30 μm release material (PTFE sheet) is placed on the semiconductor element, and under a reduced pressure atmosphere (vacuum degree 3000 Pa or less), while pressurizing from the upper side of the semiconductor element with a pressure of 10 MPa with a hot plate. At the same time, heating was started at a heating rate of 10 ° C./min, the temperature was raised to 300 ° C., and then the temperature was maintained at 300 ° C. for 20 minutes. After that, it was cooled and unloaded.

By the above sintering, a porous metal layer is formed from the porous metal layer precursor (B-1), and the semiconductor element (A-1) is attached to the DBC substrate (C-) via the porous metal layer. It was joined to 1) to obtain a connection structure.

[Example 2]
(Formation of porous metal layer precursor)
A porous metal layer precursor (B-1) made of a metal fine particle dispersant is applied to the prepared DBC substrate (C-1) using a printing mask having an opening diameter of 6.98 mm square and a thickness of 0.1 mm. It was printed and supplied with a squeegee, and dried in a constant temperature bath set at 150 ° C. for 60 minutes.

(Formation of porous metal layer)
Next, a semiconductor device (A-1) previously separated into 7.0 mm squares was mounted on the dried porous metal layer precursor (B-1). Then, the connection structure was obtained by the same method as in Example 1.

[Example 3]
In the formation of the porous metal layer precursor, a connection structure was obtained by the same method as in Example 2 except that a printing mask having an opening diameter of 7.02 mm square was used.

[Example 4]
In the dicing of the semiconductor element, a connection structure was obtained by the same method as in Example 3 except that the dicing conditions were set as follows.

The dicing step of Example 4 was performed in two steps. In the first dicing step, a blade model number NBC-ZH 105F-SE-27HEFF (manufactured by DISCO Corporation, calf width 0.040 to 0.050 mm) is used, the rotation speed is 40,000 rpm, and the feed rate is 10.0 mm / sec. The feed pitch was set to 7.0 mm, and the height amount was set so that the blade could be inserted into 1/2 of the chip thickness. In the second dicing step, a blade model number NBC-ZH 105F-SE-27HEFB (manufactured by DISCO Corporation, calf width 0.020 to 0.025 mm) is used, the rotation speed is 40,000 rpm, and the feed rate is 10.0 mm. The feed pitch was set to 7.0 mm at / sec, and the height amount was set so that the 10 μm blade could be inserted into the dicing tape.

[Example 5]
In the dicing of the semiconductor element, the first dicing step uses the blade model number NBC-ZH 105F-SE-27HEFL (manufactured by DISCO Corporation, calf width 0.100 to 0.110 mm), and the second dicing step is A connection structure was obtained in the same manner as in Example 4 except that the blade model number NBC-ZH 105F-SE-27HEFF (manufactured by DISCO Corporation, calf width 0.040 to 0.050 mm) was used.

[Example 6]
In the dicing of the semiconductor element, the second dicing step is the same as in Example 5 except that the blade model number NBC-ZH 105F-SE-27HEFA (manufactured by DISCO Corporation, calf width 0.015 to 0.020 mm) is used. The connection structure was obtained by the method of.

[Example 7]
In the formation of the porous metal layer precursor, a connection structure was obtained by the same method as in Example 4 except that the precursor was dried in a constant temperature bath set at 150 ° C. for 15 minutes.

[Example 8]
In the formation of the porous metal layer precursor, a connection structure was obtained by the same method as in Example 5 except that the precursor was dried in a constant temperature bath set at 150 ° C. for 15 minutes.

[Example 9]
In the formation of the porous metal layer precursor, a connection structure was obtained by the same method as in Example 6 except that the precursor was dried in a constant temperature bath set at 150 ° C. for 15 minutes.

[Example 10]
A connection structure was obtained in the same manner as in Example 1 except that the semiconductor element (A-2) was used instead of the semiconductor element (A-1).

[Example 11]
A connection structure was obtained in the same manner as in Example 1 except that the porous metal layer precursor (B-2) was used instead of the porous metal layer precursor (B-1).

[Example 12]
A connection structure was obtained in the same manner as in Example 1 except that the porous metal layer precursor (B-3) was used instead of the porous metal layer precursor (B-1).

[Example 13]
In the formation of the porous metal layer precursor, a connection structure was obtained by the same method as in Example 1 except that the print mask thickness was set to 0.3 mm.

[Comparative Example 1]
When the porous metal layer precursor (B-1) was printed and supplied to the DBC substrate (C-1) with a squeegee, except that a printing mask having an opening diameter of 6.50 mm square and a thickness of 0.1 mm was used. A connection structure was obtained in the same manner as in Example 2.

[Comparative Example 2]
In the formation of the porous metal layer precursor, a connection structure was obtained by the same method as in Example 2 except that a printing mask having an opening diameter of 7.50 mm square was used.

[Comparative Example 3]
A connection structure was obtained in the same manner as in Comparative Example 1 except that the semiconductor element (A-2) was used instead of the semiconductor element (A-1).

[Comparative Example 4]
A connection structure was obtained in the same manner as in Comparative Example 1 except that the porous metal layer precursor (B-2) was used instead of the porous metal layer precursor (B-1).

[Comparative Example 5]
A connection structure was obtained in the same manner as in Comparative Example 1 except that the porous metal layer precursor (B-3) was used instead of the porous metal layer precursor (B-1).

The results of measurement and evaluation of the connection structures obtained in Examples 1 to 13 and Comparative Examples 1 to 5 by the above method are shown in Tables 1 and 2.

As shown in Table 1, in the connection structure according to Examples 1 to 13 of the present invention, in particular, the width L _m of the porous metal layer has a predetermined relationship (L _c −t _m ≦ L _m ≦ L. to satisfy _{c +} t _m), the yield is good, it was confirmed that excellent withstand voltage characteristics.

On the other hand, as shown in Table 2, in the connection structures according to Comparative Examples 1 to 5, the width L _m of the porous metal layer has a predetermined relationship (L _c −t _m ≦ L _m ≦ L _c + t _m. ) not satisfied _(is L _{m <L} c -t _m or _{L m> L c + t m} ) for, withstand voltage characteristics is poor has been confirmed.

Further, according to the present invention, as confirmed in Examples 4 to 9, the yield can be further improved by providing a predetermined chamfered portion on the semiconductor element.

1 Connection structure 11 Conductor member 12 Semiconductor element 121 Surface facing the porous metal layer 122 Surface opposite to the surface facing the porous metal layer 123 Side surface 125 Chamfering part 127 Guard ring electrode 13 Porous metal layer 41 Work 42 Press plate 43 Vacuum press machine 44 Lower heating plate 45 Chamber 46 Pressurizing cylinder 47 Upper heating plate

Claims (8)

A semiconductor element formed by bonding a conductor member and a porous metal layer formed by sintering a metal fine particle dispersion material (E) obtained by dispersing metal fine particles (M) in an organic dispersion medium on the conductor member. It is a joint structure with and
The thickness _{t m} of the porous metal layer has a 100μm or less,
The width L _{m of the porous metal layer is between the width L c of} the surface of the semiconductor device facing the porous metal layer and the thickness t _m of the porous metal layer, according to the following equation (1). ) Satisfying the relationship,
L _c −t _m ≦ L _m ≦ L _c + t _m (1)
The semiconductor device has a chamfered portion over a surface opposite to the surface facing the porous metal layer and a side surface of the semiconductor element.
The chamfer height H of the chamfered portion along the height direction semiconductor element is 1/2 or less of the thickness t _c of the semiconductor element, the connection structure. The joint structure according to claim 1, wherein the chamfer width W of the chamfered portion is 12.5 μm or more. The joint structure according to claim 1 or 2, wherein the chamfer width W of the chamfered portion is 45 μm or less. The chamfered portion has an arcuate shape with a radius R centered on an intersection D of a straight line along the side surface of the semiconductor element and a straight line along the surface opposite to the surface facing the porous metal layer. Has a curved surface
The joint structure according to claim 1, wherein the radius R is 12.5 μm to 45 μm. The bonded structure according to any one of claims 1 to 4, wherein an insulating resin is further interposed between the semiconductor element and the porous metal layer. The connection structure according to any one of claims 1 to 5, wherein the porous metal layer is a layer formed by firing a porous metal layer precursor by pressurization and heating. The connection structure according to any one of claims 1 to 6, wherein the metal fine particles (M) include metal fine particles (M1) having an average particle diameter of 2 to 500 nm. The connection structure according to any one of claims 1 to 7, wherein the metal fine particles (M) contain one or two selected from copper and silver.

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