JP2017027149A5 - - Google Patents

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Publication number
JP2017027149A5
JP2017027149A5 JP2015142265A JP2015142265A JP2017027149A5 JP 2017027149 A5 JP2017027149 A5 JP 2017027149A5 JP 2015142265 A JP2015142265 A JP 2015142265A JP 2015142265 A JP2015142265 A JP 2015142265A JP 2017027149 A5 JP2017027149 A5 JP 2017027149A5
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Japan
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register
vector
semiconductor device
instruction
general
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JP2015142265A
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Japanese (ja)
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JP6616608B2 (ja
JP2017027149A (ja
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Priority to JP2015142265A priority Critical patent/JP6616608B2/ja
Priority claimed from JP2015142265A external-priority patent/JP6616608B2/ja
Priority to US15/154,753 priority patent/US20170017489A1/en
Priority to CN201610556654.1A priority patent/CN106354477A/zh
Publication of JP2017027149A publication Critical patent/JP2017027149A/ja
Publication of JP2017027149A5 publication Critical patent/JP2017027149A5/ja
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Publication of JP6616608B2 publication Critical patent/JP6616608B2/ja
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JP2015142265A 2015-07-16 2015-07-16 半導体装置 Active JP6616608B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2015142265A JP6616608B2 (ja) 2015-07-16 2015-07-16 半導体装置
US15/154,753 US20170017489A1 (en) 2015-07-16 2016-05-13 Semiconductor device
CN201610556654.1A CN106354477A (zh) 2015-07-16 2016-07-14 半导体器件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015142265A JP6616608B2 (ja) 2015-07-16 2015-07-16 半導体装置

Publications (3)

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JP2017027149A JP2017027149A (ja) 2017-02-02
JP2017027149A5 true JP2017027149A5 (enExample) 2018-07-05
JP6616608B2 JP6616608B2 (ja) 2019-12-04

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JP2015142265A Active JP6616608B2 (ja) 2015-07-16 2015-07-16 半導体装置

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US (1) US20170017489A1 (enExample)
JP (1) JP6616608B2 (enExample)
CN (1) CN106354477A (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11157287B2 (en) 2017-07-24 2021-10-26 Tesla, Inc. Computational array microprocessor system with variable latency memory access
US11893393B2 (en) 2017-07-24 2024-02-06 Tesla, Inc. Computational array microprocessor system with hardware arbiter managing memory requests
US11157441B2 (en) 2017-07-24 2021-10-26 Tesla, Inc. Computational array microprocessor system using non-consecutive data formatting
US10671349B2 (en) 2017-07-24 2020-06-02 Tesla, Inc. Accelerated mathematical engine
US11409692B2 (en) 2017-07-24 2022-08-09 Tesla, Inc. Vector computational unit
US11561791B2 (en) 2018-02-01 2023-01-24 Tesla, Inc. Vector computational unit receiving data elements in parallel from a last row of a computational array
US10740098B2 (en) * 2018-02-06 2020-08-11 International Business Machines Corporation Aligning most significant bits of different sized elements in comparison result vectors
JP6981329B2 (ja) * 2018-03-23 2021-12-15 日本電信電話株式会社 分散深層学習システム
US11507374B2 (en) * 2019-05-20 2022-11-22 Micron Technology, Inc. True/false vector index registers and methods of populating thereof
GB2601466A (en) * 2020-02-10 2022-06-08 Xmos Ltd Rotating accumulator
US11442726B1 (en) * 2021-02-26 2022-09-13 International Business Machines Corporation Vector pack and unpack instructions

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
JPH0616287B2 (ja) * 1982-09-29 1994-03-02 株式会社日立製作所 マスク付きベクトル演算処理装置
JPS6327975A (ja) * 1986-07-22 1988-02-05 Hitachi Ltd ベクトル演算制御方式
JPH01271875A (ja) * 1988-04-22 1989-10-30 Nec Corp ベクトル演算制御方式
JPH04342067A (ja) * 1991-05-20 1992-11-27 Nec Software Ltd ベクトル演算装置
US5801975A (en) * 1996-12-02 1998-09-01 Compaq Computer Corporation And Advanced Micro Devices, Inc. Computer modified to perform inverse discrete cosine transform operations on a one-dimensional matrix of numbers within a minimal number of instruction cycles
US6976049B2 (en) * 2002-03-28 2005-12-13 Intel Corporation Method and apparatus for implementing single/dual packed multi-way addition instructions having accumulation options
US7293056B2 (en) * 2002-12-18 2007-11-06 Intel Corporation Variable width, at least six-way addition/accumulation instructions
US7565514B2 (en) * 2006-04-28 2009-07-21 Freescale Semiconductor, Inc. Parallel condition code generation for SIMD operations
US7676647B2 (en) * 2006-08-18 2010-03-09 Qualcomm Incorporated System and method of processing data using scalar/vector instructions
JP4228241B2 (ja) * 2006-12-13 2009-02-25 ソニー株式会社 演算処理装置
US9092213B2 (en) * 2010-09-24 2015-07-28 Intel Corporation Functional unit for vector leading zeroes, vector trailing zeroes, vector operand 1s count and vector parity calculation

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