JP2017005081A - Interposer, semiconductor device, and method of manufacturing them - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an interposer and a semiconductor device that are small in high-frequency transmission loss in a through hole and that achieve high electric characteristics and fine wiring formation, and to provide a method of manufacturing them.SOLUTION: An interposer comprises: a substrate with a through hole; one or more wiring layers arranged on the substrate via a seed layer; an adhesion layer that is formed by an insulator formed of oxide or a resin, on a wall surface of the through hole; and a through electrode formed on the adhesion layer and that can make both surface sides of the substrate be conductive to each other.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an interposer, a semiconductor device, and a manufacturing method thereof.

  Semiconductor devices such as various memories, CMOS, and CPU manufactured by the wafer process have terminals for electrical connection. The pitch of the connection terminals and the pitch of the connection portion on the printed wiring board side that should be electrically connected to the semiconductor element differ from each other by several to several tens of times. Therefore, when an attempt is made to electrically connect a semiconductor element and a printed board, an intermediary board (semiconductor element mounting board) for pitch conversion called an interposer is used. In general, a semiconductor element is mounted on one surface of an interposer and connected to a printed wiring board on the other surface or the periphery of the substrate.

  Conventionally, a substrate using an organic material has been used as an interposer for mounting a semiconductor element on a printed wiring board. However, due to the rapid development of electronic devices such as smartphones in recent years, three-dimensional or 2.5-dimensional mounting in which semiconductor elements are stacked vertically or different types of semiconductor elements are mounted side by side on the same substrate Technology is becoming essential. Through the above-mentioned technological development, it is considered that electronic devices can be further increased in speed, capacity, and power consumption. On the other hand, as the density of semiconductor elements increases, the interposer is also required to create finer wiring. However, the conventional organic substrate has a problem that it is difficult to form a fine wiring with a scale because the moisture absorption of the resin and the expansion and contraction due to temperature are large.

  In recent years, therefore, much attention has been paid to the development of interposers that use silicon or glass as the substrate. Substrates made of these materials are less susceptible to moisture absorption and expansion / contraction, which is advantageous for forming fine wiring. In addition, a through electrode called TSV (Through-Silicon Via) or TGV (Through-Glass Via) can be formed in which a fine through hole is formed and filled with a conductive material. This through electrode connects the wiring on the front and back surfaces of the substrate with the shortest distance, and realizes excellent electrical characteristics such as an increase in signal transmission speed. Furthermore, it can be said that this is an effective mounting method for downsizing and increasing the density of devices because of the structure in which wiring is formed inside. In addition, since the multi-pin parallel connection is possible by using the through electrode, it is not necessary to increase the speed of the LSI itself, and low power consumption can be realized. Thus, an interposer that uses silicon or glass for the substrate has many advantages.

  Comparing silicon interposer (Si-IP) and glass interposer (G-IP), Si-IP is superior to G-IP in terms of fine workability, and a wiring / TSV formation process has already been established. On the other hand, since it can be handled only by a circular silicon wafer, the peripheral portion of the wafer cannot be used, and since it cannot be produced in a large size at a time, there is a disadvantage that the cost is increased. G-IP can perform batch processing with a large panel, and a production method based on a roll-to-roll method can be considered, so that the cost can be significantly reduced. Furthermore, unlike TGV, where through holes are formed by electrical discharge or laser processing, TSV digs holes by gas etching, which increases the processing time and includes a wafer thinning process. It is a factor.

  Further, in terms of electrical characteristics, G-IP is superior in electrical characteristics because there is no fear of generation of parasitic elements even in a high-speed circuit because the substrate itself is an insulator unlike Si-IP. In the first place, if glass is used for the substrate, the process of forming the insulating film itself is not necessary, so that the insulation reliability is high and the tact time is short.

JP 2006-60119 A JP2012-15209A

  As described above, if a glass substrate is used, an interposer can be made at a low cost. However, as a problem, a process for forming fine wiring and TGV has not yet been established, and copper and glass, which are mainstream wiring materials, have been established. It is mentioned that the adhesiveness with is poor.

  In general, in the formation of an insulator electrode on a glass substrate, in order to improve the adhesion between the glass and the insulator electrode, an inorganic adhesion layer is formed on the glass surface, and the electrode is formed thereon ( (See Patent Document 1 above). Materials with good adhesion to glass include titanium and chromium, but chromium and titanium have lower electrical conductivity than copper, and current concentrates on the chromium layer or titanium layer due to the skin effect in high-frequency transmission. Transmission loss occurs. This phenomenon is particularly noticeable in the TGV whose outer periphery is covered with titanium or chromium, which impairs the excellent electrical characteristics of the glass.

  As in Patent Document 2, there is an attempt to use a resin in order to improve the adhesion between the through hole and the through electrode. Since the resin layer is formed by a wet process such as coating, there is a problem that due to the small diameter of the through hole, the through hole is completely filled with the resin, and the through electrode cannot be formed.

  An object of the present invention is to provide an interposer that has low high-frequency transmission loss inside a through hole and has high electrical characteristics and fine wiring formation.

  In order to solve the above problems, the present invention comprises a substrate having a through hole, one or more wiring layers disposed on the substrate through a seed layer, and an oxide or resin on the wall surface of the through hole. An interposer comprising an adhesion layer formed of an insulator and a through electrode formed on the adhesion layer and capable of conducting both surfaces of the substrate.

  The present invention is also a semiconductor device in which a semiconductor chip is fixed to the above-described interposer.

  The present invention also includes a step of fixing a substrate on an insulating layer of a support substrate whose surface is modified with an insulator made of an oxide or a resin, a through-hole forming step for forming a through-hole in the substrate, and a formed through-hole An adhesion layer forming step of forming an adhesion layer by irradiating the insulator with a laser through the hole to sublimate the insulator and bringing the sublimated insulator into close contact with the inner wall of the through hole, and a substrate made of a conductive material in the through hole This is a method for manufacturing an interposer, which includes a through electrode forming step of forming a through electrode capable of conducting both surfaces of the substrate and a conductive layer removing step of selectively removing a part of the conductive layer on the surface of the substrate.

  Moreover, this invention is a manufacturing method of a semiconductor device including the process of manufacturing an interposer with the manufacturing method of the above-mentioned interposer, and the process of fixing a semiconductor chip to the manufactured interposer.

  According to the present invention, it is possible to provide an interposer having a low high-frequency transmission loss inside the through hole and having high electrical characteristics and fine wiring formation.

Schematic sectional view showing the structure of the interposer according to the first embodiment Schematic sectional view showing the structure of a modification of the interposer according to the first embodiment 1 is a schematic cross-sectional view showing a structure of a semiconductor device in which a semiconductor chip is mounted on an interposer according to a first embodiment. 1 is a flowchart showing a method for forming an interposer according to a first embodiment. Schematic sectional drawing which shows the process of the formation method of the interposer which concerns on 1st Embodiment Schematic sectional view showing the structure of the interposer according to the second embodiment The flowchart which shows the formation method of the interposer which concerns on 2nd Embodiment. Schematic sectional drawing which shows the process of the formation method of the interposer which concerns on 2nd Embodiment Schematic sectional view showing the structure of a modification of the interposer according to the second embodiment Schematic sectional view showing the structure of a semiconductor device in which a semiconductor chip is mounted on an interposer according to a second embodiment

  Next, embodiments of the present invention will be described with reference to the drawings.

  In the following description, the case where glass is used for the substrate will be described as an example. The substrate is not limited to a glass substrate, and may be made of silicon.

(First embodiment)
FIG. 1 is a schematic cross-sectional view showing the structure of an interposer 100 according to the first embodiment. As shown in FIG. 1, the interposer 100 according to the first embodiment includes a glass substrate 11 having a through hole 13, an adhesion layer 16 formed on the inner surface of the through hole 13, a surface of the glass substrate 11, and an adhesion layer. 16 includes a seed layer 14 formed on 16, a wiring layer 23 formed on the seed layer 14, and a through electrode 20 penetrating through the through hole 13.

  FIG. 2 is a schematic cross-sectional view showing an interposer 200 according to a modification of the first embodiment. As shown in FIG. 2, in the interposer 200, the insulating resin layers 30 and the wiring layers 23 are alternately stacked on the glass substrate 11, and each wiring layer 23 is electrically connected through the conductive via 25.

  FIG. 3 is a schematic cross-sectional view showing a structure of a semiconductor device 300 in which a semiconductor chip is mounted on the interposer 100 according to the first embodiment. As shown in FIG. 3, the semiconductor device 300 is configured by fixing (mounting) the connection pads 41 of the semiconductor chip 50 to the lands 42 of the above-described interposer 100 via, for example, solder 40.

  Next, a method for forming an interposer will be described with reference to FIGS. FIG. 4 is a flowchart showing a method for forming the interposer 100 according to the present embodiment. For example, as shown in FIG. 4, the interposer 100 according to the present embodiment is formed in the order of the steps of fixing the support, forming the through-hole / adhesion layer in the through-hole, forming the seed layer, forming the through-electrode, and forming the wiring layer. Is called.

  FIG. 5 is a schematic cross-sectional view showing the steps of the method for forming the interposer 100.

(Process of fixing glass substrate to support)
First, as shown in FIG. 5A, the glass substrate 11 is fixed to a support 12 (support substrate) whose surface is modified with an insulator 17 with a tape or the like. The thickness of the glass substrate 11 is, for example, 50 μm or more and 700 μm or less. The base material of the support 12 is made of epoxy / phenol, polyimide, cycloolefin, PBO (polyparaphenylene benzobisoxazole), or a composite material thereof, glass, ceramics, or the like, and has a linear expansion coefficient of 1. What is 40 or less may be used. The insulator portion of the support 12 is made of at least one of an oxide insulator such as SiO ₂ and a resin insulator such as PVC (polyvinyl chloride) or epoxy resin, and is a conductive metal formed by plating. And composed of materials with good adhesion.

  The glass substrate 11 can be fixed to the support 12 by adhesion with a tape or resin, or adsorption with water or a solvent.

(Process for forming through holes)
Next, as shown in FIG. 5B, a through hole 13 is formed in the glass substrate 11. The diameter of the through hole 13 is, for example, 15 μm or more and 100 μm or less, and the depth is 50 μm or more and 700 μm or less. The through hole 13 is formed using an excimer laser, a UV-YAG laser, a CO ₂ laser, or the like.

(Process for forming the adhesion layer in the through hole)
Next, the insulator 17 of the support 12 is irradiated with laser through the through hole 13. The insulator 17 is sublimated by the energy of the irradiated laser and is in close contact with the inner wall of the through hole 13, and as shown in FIG. 5C, an adhesion layer 16 is formed in the through hole 13 (side wall). The thickness of the adhesion layer 16 may be 20 nm or more and 500 nm or less. Further, the resistivity of the adhesion layer 16 is set to be larger than 1 × 10 ¹⁶ Ω · m.

  By this step, the adhesion layer 16 using, as a material, an oxide that is difficult to form by a wet process or a resin that closes the through hole by filling can be formed inside the through hole 13.

(Seed layer formation process)
Next, as shown in FIG. 5 (d), the glass substrate 11 is separated from the support 12, and a seed layer 14 that is a conductive layer is formed on the surface of the glass substrate 11 and the adhesion layer 16 in the through hole 13. . As a method for forming the seed layer 14, a suitable method such as sputtering or electroless plating is selected. Next, as shown in FIG. 5E, a resist 15 is formed on the seed layer 14 formed on the surface of the glass substrate 11 by photolithography.

(Penetration electrode formation / wiring layer formation process)
Next, as shown in FIG. 5F, the through electrode 20 and the wiring layer 23 are formed by filling the through hole 13 and the opening of the resist 15 with a conductive material. At this time, a land may be formed on the end face of the through electrode 20.

  The conductive material is made of at least one of copper, silver, gold, aluminum, at least one of these compounds, or a mixture of a powder of these conductive materials and a resin material.

  Next, as shown in FIG. 5G, after removing the resist 15 on the glass substrate 11, a part of the seed layer 14 is removed by etching.

  Through the above steps, the interposer 100 shown in FIG. 1 is manufactured.

  Here, as shown in FIG. 2, the insulating resin layer 30 may be formed on the manufactured interposer 100, a plurality of wiring layers 23 may be provided, and the insulating resin layers 30 and the wiring layers 23 may be alternately stacked. The insulating resin layer 30 may be made of any one of epoxy / phenol, polyimide, cycloolefin, PBO, or a composite material thereof, and may have a linear expansion coefficient of 30 to 40. The numbers of laminated insulating resin layers 30 and wiring layers 23 on the front and back of the glass substrate 11 may be different. In FIG. 2, each wiring layer 23 is electrically connected to another adjacent wiring layer 23 through a conductive via 25 formed in an insulating layer stacked on each wiring layer 23.

  Further, the semiconductor device 300 as shown in FIG. 3 can be obtained by mounting the semiconductor chip 50 on the land 42 of the interposer 100 via the solder 40.

  According to the interposer and the manufacturing method thereof according to the present embodiment, the adhesion layer 16 is made of an oxide insulator or an insulating resin that has good adhesion to the glass and is difficult to form by a wet process in the through hole 13 of the glass substrate 11. The through electrode 20 formed on the adhesion layer 16 and the front and back wiring layers formed on the glass substrate 11 are electrically connected via the seed layer 14. Thereby, the interposer which has the penetration electrode 20 with low loss and high adhesiveness with respect to high-speed transmission can be obtained. In addition, by forming the adhesion layer 16 in the through electrode 20 by a dry process, it is possible to form the through electrode 20 having a high adhesion force and the periphery of the through electrode 20 made of only a conductive material having high conductivity. . As a result, an interposer having excellent high-speed transmission and high reliability can be obtained.

(Second Embodiment)
Next, a second embodiment will be described with reference to FIGS. FIG. 6 is a schematic cross-sectional view showing the structure of the interposer 101 according to the second embodiment.

  Here, in the first embodiment, the glass substrate 11 is used as a starting material for the process, and after forming the through hole 13, the adhesion layer 16 is formed inside the through hole 13, and the conductive electrode is filled to fill the through electrode 20. An example of forming the above has been described. The basic structure of the interposer 101 according to the second embodiment is the same as that of the interposer according to the first embodiment. However, the present embodiment performs filling in the through-hole 13 with a plurality of types such as plating and resin. Thus, it is different from the first embodiment.

  Specifically, as shown in FIG. 6, the interposer 101 according to the second embodiment includes a glass substrate 11 having a through hole 13, an adhesion layer 16 formed on the inner surface of the through hole 13, and the glass substrate 11. The seed layer 14 formed on the surface and the adhesion layer 16, the wiring layer 23 formed on the seed layer 14 on the surface of the glass substrate 11, the plating layer 21 formed on the seed layer 14, and the plating layer 21 Embedded resin 22 filled in the interior space. That is, the through electrode 20 is configured mainly with the plating layer 21.

  Next, a method for forming an interposer will be described with reference to FIGS. FIG. 7 is a flowchart showing a method for forming the interposer 101 according to the present embodiment. For example, as shown in FIG. 7, the interposer 101 according to the present embodiment is formed by fixing a support, forming a through-hole / adhesion layer in the through-hole, forming a seed layer, forming a plating layer, filling an embedded resin, polishing a surface, It is performed in the order of each step of layer formation, plating layer formation, wiring layer / penetrating electrode formation.

  FIG. 8 is a schematic cross-sectional view showing the steps of the method for forming the interposer 101.

(Process of fixing glass substrate to support)
First, as shown in FIG. 8A, the glass substrate 11 is fixed to a support 12 whose surface is modified with an insulator 17 with a tape or the like. The glass substrate 11 and the support body 12 can use the same thing as the glass substrate 11 and the support body 12 with an insulator which concern on 1st Embodiment. The glass substrate 11 can be fixed to the support 12 by adhesion with a tape or resin, or adsorption with water or a solvent.

(Process for forming through holes)
Next, as shown in FIG. 8B, a through hole 13 is formed in the glass substrate 11. The diameter of the through hole 13 is, for example, 15 μm or more and 100 μm or less, and the depth is 50 μm or more and 700 μm or less. The through hole 13 is formed using an excimer laser, a UV-YAG laser, a CO ₂ laser, or the like.

(Process for forming through-hole adhesion layer)
Next, the insulator 17 of the support 12 is irradiated with laser through the through hole 13. The insulator is sublimated by the energy of the irradiated laser and is closely adhered to the inside of the through hole 13, and as shown in FIG. 8C, the adhesion layer 16 is formed in the through hole 13 (side wall). The thickness of the adhesion layer 16 may be 20 nm or more and 500 nm or less. Further, the resistivity of the adhesion layer 16 is set to be larger than 1 × 10 ¹⁶ Ω · m.

(Seed layer formation process)
Next, as shown in FIG. 8D, the glass substrate 11 is separated from the support 12, and the seed layer 14 is formed on the surface of the glass substrate 11 and the adhesion layer 16 in the through hole 13. As a method for forming the seed layer 14, a suitable method such as sputtering or electroless plating is selected.

(Plating layer formation process)
Next, as shown in FIG. 8E, a plating layer 21 is formed on the seed layer 14 in the through hole 13. The plating layer 21 is formed to a thickness that does not block the through hole 13.

(Embedded resin filling process)
Next, as shown in FIG. 8F, the embedded resin 22 is filled into the through holes 13. For the filling, screen printing, filling with a dispenser, or the like can be used. The embedding resin 22 is made of epoxy / phenol, polyimide, cycloolefin, PBO, or a composite material thereof, and the linear expansion coefficient may be 30 or more and 40 or less. By filling the embedded resin 22, there is no gap in the through hole 13, and peeling of the plating layer 21 inside the through hole 13 can be prevented. Even in the case of high-frequency transmission, the skin effect occurs near the interface of the through electrode 20 with the adhesion layer 16 and the embedded resin 22 formed on the center side of the through-hole 13 prevents high-frequency transmission. There is nothing.

(Polishing process)
Next, as shown in FIG. 8G, the seed layer 14 on the surface of the glass substrate 11 and the embedded resin 22 accumulated on the through hole 13 are removed by polishing. By smoothing the surface of the glass substrate 11 by this step, it is possible to improve the reliability during formation and mounting of the wiring layer 23. As the polishing method, physical polishing such as buff polishing or chemical polishing such as CMP (Chemical Mechanical Planarization) is used, and a method suitable for the material of the embedded resin is selected.

(Seed layer formation process)
Next, as shown in FIG. 8H, a seed layer 14 is formed on the surface of the glass substrate 11. As a method for forming the seed layer 14, a suitable method such as sputtering or electroless plating can be selected.

(Plating layer formation process)
Next, as shown in (i) and (j) of FIG. 8, after forming a resist 15 on the seed layer 14, a plating layer 21 is formed.

(Process for forming wiring layers and through electrodes)
Next, after removing the resist 15, a part of the seed layer 14 is removed by etching, and the through electrode 20 and the wiring layer 23 are formed as shown in FIG. A part of the wiring layer 23 is electrically connected by the through electrode 20. At this time, a land may be formed on the end face of the through electrode 20. The conductive material that forms the through electrode 20 and the wiring layer 23 is at least one of copper, silver, gold, and aluminum, or at least one of these compounds, or a powder of these conductive materials and a resin material. It consists of at least one of the mixtures.

  Through the above steps, the interposer 101 shown in FIG. 6 is manufactured.

  According to the interposer and the manufacturing method thereof according to the present embodiment, the interposer 101 that is excellent in high-speed transmission and highly reliable can be obtained for the same reason as in the first embodiment. Further, in this embodiment, since the embedded resin 22 is used for the filling method of the through electrode 20, the through electrode 20 can be formed even when the opening diameter of the through hole 13 is large.

  FIG. 9 is a schematic cross-sectional view of an interposer 201 that is a modification of the interposer 101. In the above embodiment, the wiring layer is only one layer, but by alternately laminating the wiring layers 23 and the insulating resin layers 30 and connecting them with the conductive vias 25, a plurality of wiring layers as shown in FIG. It is also possible to manufacture the interposer 201 in which the wiring layer is formed. The insulating resin layer 30 is made of any one of epoxy / phenol, polyimide, cycloolefin, PBO, or a composite material thereof, and may have a linear expansion coefficient of 30 to 40.

  FIG. 10 is a schematic cross-sectional view showing the structure of a semiconductor device 301 in which a semiconductor chip is mounted on the interposer 101. As shown in FIG. 10, the semiconductor device 301 is configured by fixing (mounting) the connection pads 41 of the semiconductor chip 50 to the lands 42 of the above-described interposer 101 via, for example, solder 40.

  In each of the above embodiments, the glass substrate 11 is peeled from the support 12 and the seed layer 14 is formed after the formation of the adhesion layer 16, but the adhesion layer remains fixed to the support 12. Plating may be performed on 16.

  In the interposer obtained in each of the above embodiments, a construction method suitable for the size of the wiring to be formed can be selected as appropriate. For example, a build-up method is used to form the fine wiring layer 23, and a conventional method of laminating a prepreg and a copper foil is used to manufacture the interposer for the wiring layer 23 whose wiring size is not fine. Is also possible.

  Examples according to the present invention will be described below. This example corresponds to the manufacturing method (FIG. 5) according to the first embodiment.

  First, a support having SiN (silicon nitride) formed on a low expansion glass substrate (thickness 300 μm, CTE: 3.5) was fixed with a tape (see FIG. 5A). Next, a through-hole with an opening diameter of 70 μm was formed by a UV-YAG laser (see FIG. 5B), and further laser processing was performed to form a SiN adhesion layer in the through-hole (( c)).

  Next, after separating the glass substrate from the support and performing Ti / Cu sputtering on the glass substrate surface, electroless plating was performed to form a seed layer on the glass substrate surface and the through hole wall surface (( d)).

  Next, after laminating a dry film resist RY-3525 (thickness 25 μm) manufactured by Hitachi Chemical Co., Ltd. on both surfaces of the obtained glass substrate, an opening is formed by photolithography (see FIG. 5 (e)). The through electrode and the wiring layer were plated by electrolytic copper plating (see (f) of FIG. 5).

  Next, the resist was removed, and a part of the seed layer was removed by etching (see FIG. 5G) to obtain an interposer using a glass substrate having a through electrode and a wiring layer (see FIG. 5). (See (g)).

  The interposer, the semiconductor device, and the manufacturing method thereof according to the present invention can be used for a semiconductor device provided with an interlayer connection structure through a connection hole.

100, 101, 200, 201 Interposer 300, 301 Semiconductor device 10 Glass substrate with support 11 Glass substrate 12 Support (support substrate)
DESCRIPTION OF SYMBOLS 13 Through-hole 14 Seed layer 15 Resist 16 Adhesion layer 17 Insulator 20 Through-electrode 21 Plating layer 22 Embedded resin 23 Wiring layer 25 Conductive via 30 Insulating resin layer 40 Solder 41 Connection pad 42 Land 50 Semiconductor chip

Claims (9)

A substrate having a through hole;
One or more wiring layers disposed on the substrate via a seed layer;
An adhesion layer formed of an insulator made of an oxide or resin on the wall surface of the through hole;
An interposer provided with a penetrating electrode formed on the adhesion layer and capable of conducting both surfaces of the substrate.   The interposer according to claim 1, wherein the wiring layer and the through electrode are made of at least one of copper, silver, gold, and aluminum. 3. The interposer according to claim 1, wherein the adhesion layer has a resistivity greater than 1 × 10 ¹⁶ Ω · m.   The interposer according to any one of claims 1 to 3, wherein an inner diameter of the through hole is 15 µm or more and 100 µm or less, and a depth of the through hole is 50 µm or more and 700 µm or less.   The interposer according to any one of claims 1 to 4, wherein the substrate is a glass substrate having a thickness of 50 µm to 700 µm.   A semiconductor device in which a semiconductor chip is fixed to the interposer according to claim 1. Fixing the substrate on the insulating layer of the support substrate whose surface is modified with an insulator made of oxide or resin;
A through hole forming step of forming a through hole in the substrate;
An adhesion layer forming step of forming an adhesion layer by irradiating the insulator through the formed through hole to sublimate the insulator and bringing the insulator sublimated onto the inner wall of the through hole into close contact with each other.
A through electrode forming step of forming a through electrode capable of conducting both sides of the substrate with a conductive material in the through hole; and
And a conductive layer removing step of selectively removing a part of the conductive layer on the surface of the substrate.   The method for manufacturing an interposer according to claim 7, wherein a glass substrate is used as the substrate. A step of producing an interposer by the method of producing an interposer according to claim 7 or 8,
And a step of fixing the semiconductor chip to the manufactured interposer.