JP2016103587A - Wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board that can accurately read a two-dimensional code and has excellent heat-resistance reliability where peeling does not occur to a solid pattern formed of a conductor layer of an outermost surface layer that is arranged in an area corresponding to the two-dimensional code.SOLUTION: There is provided a wiring board including an insulating board 1 having conductor layers 2 on the inside and a surface, and a solder resist layer 3 that is attached to the surface of the insulating board 1, where the surface of the solder resist layer 3 is subjected to laser processing to form a two-dimensional code 4. A solid pattern 5 formed of the conductor layer 2 is formed on the surface of the insulating board 1 in an area corresponding to the two-dimensional code 4, and the solid pattern 5 and the conductor layers 2 on the inside are connected to each other by a plurality of via conductors 6 formed integrally with the solid pattern 5.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a wiring board provided with a two-dimensional code.

  In recent years, for wiring boards that are becoming smaller and thinner, a two-dimensional code that encodes individual information related to the manufacturing history of the wiring board is recorded on the surface of the wiring board so that the manufacturing history of the wiring board can be traced. Forming is done. By providing such a two-dimensional code on a wiring board, each wiring board is linked to information on the manufacturing process of the wiring board. By tracing such information, the status of the manufacturing process of the wiring board can be accurately determined. It becomes possible to grasp. Therefore, the two-dimensional code having such individual information plays an important role in managing the manufacturing process of the wiring board. For the formation of such a two-dimensional code, a technique is employed in which the substrate surface is partially removed by laser irradiation to form a two-dimensional code by providing a dot-like minute depression.

  In general, a solder resist layer for protecting the outermost conductive layer formed on the wiring board from the outside is deposited on the surface of the wiring board. The solder resist layer is formed of a thermosetting resin having a thickness of about 10 to 30 μm and can be easily partially removed by laser irradiation. Therefore, the two-dimensional code is often provided on the solder resist layer.

  However, when forming a two-dimensional code with a laser on the solder resist layer, if there is a portion with and without the outermost conductor layer directly under the area corresponding to the two-dimensional code, each dot forming the two-dimensional code In some cases, the two-dimensional code cannot be accurately recognized. This is because in the portion where the outermost conductor layer is directly under the dot, the heat of laser irradiation is absorbed by the conductor layer and the dot becomes small, whereas the outermost conductor layer is directly under the dot. In the non-existing portion, the dot becomes large because there is no such heat absorption, and this occurs.

  Therefore, it is conceivable to dispose a solid pattern composed of the outermost conductor layer immediately below the region corresponding to the two-dimensional code. By arranging such a solid pattern, the size of each dot can be made uniform. Also, by providing a solid pattern, the background of the dots can be made dark, and the recognition of each dot can be improved.

  However, if a solid pattern composed of the outermost conductor layer is arranged immediately below the region corresponding to the two-dimensional code, the solid pattern is likely to be peeled off. This is because outgas generated from the inside of the wiring board when heat is applied at the time of manufacturing the wiring board or the like is accumulated under the solid pattern, and a gap is generated under the solid pattern due to the pressure.

JP 2005-294635 A

The problem of the present invention is that the size of each dot in a two-dimensional code formed by laser processing can be made uniform and the two-dimensional code can be read accurately and is arranged in an area corresponding to the two-dimensional code. It is an object of the present invention to provide a wiring board excellent in heat resistance reliability in which no peeling occurs in a solid pattern composed of the outermost conductor layer.

  The wiring board of the present invention comprises an insulating substrate having a conductor layer inside and on the surface, and a solder resist layer deposited on the surface of the insulating substrate, and laser processing is performed on the surface of the solder resist layer. A wiring board formed with a two-dimensional code, wherein a solid pattern made of the conductor layer is formed on a surface of the insulating substrate in a region corresponding to the two-dimensional code, and the solid pattern and the conductor inside The layers are connected by a plurality of via conductors formed integrally with the solid pattern.

  According to the wiring board of the present invention, since the solid pattern made of the conductor layer is formed on the surface of the insulating substrate in the region corresponding to the two-dimensional code, the size of each dot forming the two-dimensional code is made uniform. Can be. Further, the background of the dots forming the two-dimensional code can be dark, and the two-dimensional code can be read accurately by improving the recognition of each dot. Further, since the solid pattern and the conductor layer inside the insulating substrate are connected by a plurality of via conductors formed integrally with the solid pattern, the solid pattern is firmly connected to the inner conductor layer by the via conductor. Stopped. Therefore, it is possible to provide a wiring board that is excellent in heat resistance reliability without causing peeling of the solid pattern.

FIG. 1 is a schematic cross-sectional view of an essential part showing an example of an embodiment of a wiring board according to the present invention.

  Next, an example of an embodiment of the wiring board of the present invention will be described with reference to the accompanying drawings. As shown in FIG. 1, the wiring board of this example covers an insulating substrate 1, a conductor layer 2 deposited on and inside the insulating substrate 1, and a conductor layer 2 on the surface of the insulating substrate 1. And a solder resist layer 3 deposited in this manner. In FIG. 1, only the main part of the wiring board of this example is schematically shown.

  The insulating substrate 1 is formed, for example, by laminating an insulating layer 1b on an insulating layer 1a. The insulating layers 1a and 1b are made of, for example, a thermosetting resin containing glass cloth or a thermosetting resin not containing glass cloth. In these thermosetting resins, an inorganic insulating filler may be dispersed. The thickness of the insulating layers 1a and 1b is, for example, about 30 to 200 μm.

  The conductor layer 2 is made of, for example, a copper foil or a copper plating layer. The thickness of the conductor layer 2 is, for example, about 5 to 20 μm. The conductor layer 2 is formed in a predetermined pattern by a known subtractive method or semi-additive method.

  The solder resist layer 3 is made of a thermosetting resin. The thickness of the solder resist layer 3 is, for example, about 10 to 30 μm. The solder resist layer 3 is a photothermographic resin dry film resist or a liquid resist deposited on the surface of the insulating substrate 1 and is exposed and developed into a predetermined pattern using a photolithography technique. Thereafter, it is formed by heat curing and ultraviolet curing.

  Furthermore, in the wiring board of this example, the two-dimensional code 4 is formed on the solder resist layer 3. The two-dimensional code 4 is formed by a set of dots that are depressed by subjecting the solder resist layer 3 to laser processing to evaporate a part of the solder resist layer 3. In the two-dimensional code 4, the trace of the transpiration of the solder resist layer 3 is discolored and whitened, and the two-dimensional code 4 can be recognized by the contrast difference between the whitened portion and the surrounding area.

  Furthermore, in the wiring substrate of this example, a solid pattern 5 made of the conductor layer 2 is formed on the surface of the insulating substrate 1 in a region corresponding to the two-dimensional code 4. The solid pattern 5 completely covers the surface of the insulating substrate 1 in the region without any gap. As described above, since the solid pattern 5 is formed on the surface of the insulating substrate 1 in the region corresponding to the two-dimensional code 4, the heat of laser irradiation is uniformly absorbed during laser processing. The size of each dot to be formed can be made uniform. Further, the background of the dots forming the two-dimensional code 4 can be dark, and the two-dimensional code 4 can be read accurately by improving the recognition of each dot.

  Furthermore, in the wiring board of this example, the solid pattern 5 and the internal conductor layer 2 are connected by a plurality of via conductors 6. The diameter of the via conductor 6 is, for example, about 30 to 100 μm. The via conductor 6 is made of copper plating and is formed integrally with the solid pattern 5. In this way, since the solid pattern 5 and the conductor layer 2 inside the insulating substrate 1 are connected by the plurality of via conductors 6, the solid pattern 5 is firmly locked to the inner conductor layer 2 by the via conductor 6. The Therefore, even if outgas is generated from the inside of the wiring board during the production of the wiring board, etc., it is possible to provide a wiring board having excellent heat resistance reliability that does not cause the solid pattern 5 to peel off.

  In order to prevent the solid pattern 5 from being peeled off, the number of via conductors 6 that connect the solid pattern 5 and the internal conductor layer 2 is preferably 4 to 9 per square mm.

  Further, the internal conductor layer 2 to which the solid pattern 5 is connected is preferably a pattern with a gap such as a mesh shape or a block shape. Even if outgas is generated from the inside of the wiring board at the time of manufacturing the wiring board, etc., by forming the inner conductive layer 2 to which the solid pattern 5 is connected as a pattern having a gap such as a mesh shape or a block shape, the gas Can escape to the outside from the gaps in the pattern, and can effectively prevent the conductor layer 2 from being peeled off.

DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Conductor layer 3 ... Solder resist layer 4 ... Two-dimensional code 5 ... Solid pattern 6 ... Via conductor

Claims (2)

  An insulating substrate having a conductor layer inside and on the surface, and a solder resist layer deposited on the surface of the insulating substrate, and forming a two-dimensional code by performing laser processing on the surface of the solder resist layer A solid pattern made of the conductor layer is formed on the surface of the insulating substrate in a region corresponding to the two-dimensional code, and the solid pattern and the internal conductor layer are A wiring board characterized by being connected by a plurality of integrally formed via conductors.   The wiring board according to claim 1, wherein the conductor layer connected to the solid pattern is a mesh-like or block-like pattern.

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