JP2016092397A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2016092397A
JP2016092397A JP2015129328A JP2015129328A JP2016092397A JP 2016092397 A JP2016092397 A JP 2016092397A JP 2015129328 A JP2015129328 A JP 2015129328A JP 2015129328 A JP2015129328 A JP 2015129328A JP 2016092397 A JP2016092397 A JP 2016092397A
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gate electrode
insulating film
electrode
containing oxygen
semiconductor substrate
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JP6565376B2 (en
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大野陽平
Yohei Ono
金子修一
Shuichi Kaneko
馬場良平
Ryohei Baba
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Sanken Electric Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a HEMT which effectively uses a field plate by a gate electrode to sufficiently alleviate an electric field to inhibit the occurrence of gate leakage or a collapse phenomenon.SOLUTION: A semiconductor device comprises a gate electrode 6 which includes: a first portion of the gate electrode, which functions as a gate; a second portion of the gate electrode, which extends from the first portion of the gate electrode to a surface of an oxide film 4; and an oxygen-containing metal film 5 which extends from the first portion side to the second portion of the gate electrode 6. An end of the second portion of the gate electrode, which extends from the first portion of the gate electrode 6 extends to a region farther from the first portion of the gate electrode 6 than an end of the oxygen-containing metal film 5.SELECTED DRAWING: Figure 2

Description

本発明は、フィールドプレート効果を用い、電界を緩和した高電子移動度トランジスタ（ＨＥＭＴ）に関する。   The present invention relates to a high electron mobility transistor (HEMT) that uses a field plate effect and relaxes an electric field.

高電子移動度トランジスタ（ＨＥＭＴ）においてはリーク電流を少なくするために、フィールドプレートを有効に活用し、電界を緩和する必要がある。   In a high electron mobility transistor (HEMT), it is necessary to effectively use a field plate and reduce an electric field in order to reduce leakage current.

公開特許公報 特開２００９−７６８４５号JP Patent Publication No. 2009-76845

先行文献には、図１で示すように、電子走行層１と、電子供給層２と、ソース電極（図示せず）と、ドレイン電極（図示せず）と、ゲート電極６aと、シリコン酸化物から成る絶縁膜４と、絶縁膜４とゲート電極６aとの間に設けられた膜として、例えばｐ型金属酸化物半導体膜を有するヘテロ接合型電界効果半導体装置（半導体素子）が記載されている。
また、電子供給層２には凹部（リセス部）が形成され、これにより、ノーマリオフ特性を有し且つオン抵抗及びゲートリーク電流が小さいヘテロ接合型電界効果半導体装置を得るとされている。しかし、図１の半導体装置では、絶縁膜４とゲート電極６aとの間に設けられた膜の端部と、絶縁膜４上に配置されたゲート電極６aの端部とが同じ位置に配置されているため、ゲート電極６aによるフィールドプレート効果が効果的に発揮されず、電界の緩和が充分ではなく、ゲートリークやコラプス現象が発生し易いという問題があった。 Prior art documents include an electron transit layer 1, an electron supply layer 2, a source electrode (not shown), a drain electrode (not shown), a gate electrode 6a, a silicon oxide, as shown in FIG. A heterojunction field effect semiconductor device (semiconductor element) having, for example, a p-type metal oxide semiconductor film is described as an insulating film 4 made of, and a film provided between the insulating film 4 and the gate electrode 6a. .
Further, the electron supply layer 2 is formed with a recess (recessed portion), thereby obtaining a heterojunction field effect semiconductor device having normally-off characteristics and low on-resistance and gate leakage current. However, in the semiconductor device of FIG. 1, the end of the film provided between the insulating film 4 and the gate electrode 6a and the end of the gate electrode 6a disposed on the insulating film 4 are arranged at the same position. Therefore, there is a problem that the field plate effect by the gate electrode 6a is not effectively exhibited, the electric field is not sufficiently relaxed, and gate leakage and collapse phenomenon are likely to occur.

本発明は、上記問題点を解決し、ゲート電極によるフィールドプレート効果を有効に発揮させ、電界を効果的に緩和することで、ゲートリーク、コラプス現象を以前よりも抑制できるＨＥＭＴを提供することを目的とするものである。   The present invention provides a HEMT that solves the above-described problems, effectively exhibits the field plate effect by the gate electrode, and effectively reduces the electric field, thereby suppressing gate leakage and collapse phenomenon more than before. It is the purpose.

本発明は、上記課題を解決すべく、以下に掲げる構成とした。
本発明の半導体装置は、電子走行層および電子供給層を備える半導体基板と、半導体基板の表面に形成された絶縁膜およびゲート電極と、を備える高電子移動度トランジスタにおいて、ゲート電極は、ゲートとして機能する第１の部分と、第１の部分から絶縁膜の表面に延伸してフィールドプレートとして機能する第２の部分とを有し、絶縁膜とゲート電極の第２の部分との間には、酸素を含む金属膜が形成されており、ゲート電極の第２の部分は、酸素を含む金属膜よりも半導体基板の外周側に延伸しており、絶縁膜の表面が、ゲート電極の第１の部分側では酸素を含む金属膜により被覆されており、半導体基板の外周側ではゲート電極の第２の部分により被覆されていることを特徴とする。
また、本発明の半導体装置は、電子走行層および電子供給層を備える半導体基板と、半導体基板の表面に形成された絶縁膜およびゲート電極と、を備える高電子移動度トランジスタにおいて、ゲート電極は、絶縁膜に形成された開口内に配置された第１の部分と、絶縁膜の表面に配置された第２の部分とを有し、絶縁膜の開口側の表面は、酸素を含む金属膜を介してゲート電極の第２の部分に被覆されており、絶縁膜の開口側から離間した側の表面は、酸素を含む金属膜を介さずにゲート電極の第２の部分に被覆されていることを特徴とする。
また、本発明の半導体装置は、電子走行層および電子供給層を備える半導体基板と、半導体基板の表面に形成された絶縁膜、ゲート電極、ドレイン電極およびソース電極と、を備える高電子移動度トランジスタにおいて、ゲート電極は、絶縁膜に形成された開口内に配置された電極部と、絶縁膜の表面に配置されたフィールドプレート部とを有し、ゲート電極の電極部とドレイン電極との間においては、絶縁膜の開口側の表面は酸素を含む金属膜を介してフィールドプレート部に被覆されており、絶縁膜の開口側から離間した側の表面は酸素を含む金属膜を介さずにフィールドプレート部に被覆されており、ゲート電極の電極部とソース電極との間においては、絶縁膜の表面は酸素を含む金属膜を介してフィールドプレート部に被覆されており、ゲート電極の電極部とソース電極との間におけるフィールドプレート部の延伸長は、ゲート電極の電極部とドレイン電極との間におけるフィールドプレート部の延伸長に比べて短いことを特徴とする。 In order to solve the above problems, the present invention has the following configurations.
A semiconductor device according to the present invention is a high electron mobility transistor including a semiconductor substrate including an electron transit layer and an electron supply layer, and an insulating film and a gate electrode formed on the surface of the semiconductor substrate. A first portion that functions, and a second portion that extends from the first portion to the surface of the insulating film and functions as a field plate, and between the insulating film and the second portion of the gate electrode , A metal film containing oxygen is formed, the second portion of the gate electrode extends to the outer peripheral side of the semiconductor substrate relative to the metal film containing oxygen, and the surface of the insulating film is the first electrode of the gate electrode. The portion is covered with a metal film containing oxygen, and the outer peripheral side of the semiconductor substrate is covered with a second portion of the gate electrode.
The semiconductor device of the present invention is a high electron mobility transistor comprising a semiconductor substrate comprising an electron transit layer and an electron supply layer, and an insulating film and a gate electrode formed on the surface of the semiconductor substrate. A first portion disposed in the opening formed in the insulating film and a second portion disposed on the surface of the insulating film, and the surface on the opening side of the insulating film is a metal film containing oxygen And the second part of the gate electrode is covered with the surface of the insulating film away from the opening side of the insulating film without passing through the metal film containing oxygen. It is characterized by.
The semiconductor device of the present invention is a high electron mobility transistor comprising a semiconductor substrate having an electron transit layer and an electron supply layer, and an insulating film, a gate electrode, a drain electrode, and a source electrode formed on the surface of the semiconductor substrate. The gate electrode has an electrode portion disposed in the opening formed in the insulating film and a field plate portion disposed on the surface of the insulating film, and between the electrode portion of the gate electrode and the drain electrode. The surface on the opening side of the insulating film is covered with the field plate portion via a metal film containing oxygen, and the surface on the side away from the opening side of the insulating film is a field plate without going through the metal film containing oxygen. The surface of the insulating film is covered with the field plate part through a metal film containing oxygen between the electrode part of the gate electrode and the source electrode. , Stretching the length of the field plate portion between the electrode portion and the source electrode of the gate electrode is characterized by shorter than the stretch length of the field plate portion between the electrode portion and the drain electrode of the gate electrode.

本発明によれば、フィールドプレートの効果を良好に活用でき、電界を緩和することができる。   According to the present invention, the effect of the field plate can be favorably utilized and the electric field can be relaxed.

従来のＨＥＭＴのゲート電極部分の断面図である。It is sectional drawing of the gate electrode part of the conventional HEMT. 本発明の一実施の形態に係るＨＥＭＴのゲート電極部分の断面図である。It is sectional drawing of the gate electrode part of HEMT which concerns on one embodiment of this invention. 従来品のＨＥＭＴと本発明の一実施の形態に係るＨＥＭＴのＶｄｓ（ドレイン・ソース間電圧）と電流コラプスの関係を示したものである。The relationship between Vds (drain-source voltage) and current collapse of the HEMT of the conventional product and the HEMT according to one embodiment of the present invention is shown.

以下、本発明の実施の形態となる構造について説明する。   Hereinafter, the structure which becomes embodiment of this invention is demonstrated.

図２は本発明の一実施の形態に係る高電子移動度トランジスタ（ＨＥＭＴ）のゲート電極部分の断面図である。本発明はゲート電極部分に特徴があるため、その他の部分の説明は省略する。
本実施形態の半導体装置（半導体素子）では、第１の窒化物半導体材料（例えばＧａＮ）からなる電子走行層１上に、第１の窒化物半導体材料とは異なる格子定数を有する第２の窒化物半導体材料（例えばＡｌＧａＮ）からなる電子供給層２と、第３の窒化物半導体材料（例えばＧａＮ）からなるキャップ層３が順次積層されている。本願明細書では、便宜上、この電子走行層１と電子供給層２とキャップ層３とを合わせて半導体基板と総称する。 FIG. 2 is a cross-sectional view of a gate electrode portion of a high electron mobility transistor (HEMT) according to an embodiment of the present invention. Since the present invention is characterized by the gate electrode portion, description of other portions is omitted.
In the semiconductor device (semiconductor element) of the present embodiment, the second nitride having a lattice constant different from that of the first nitride semiconductor material on the electron transit layer 1 made of the first nitride semiconductor material (for example, GaN). An electron supply layer 2 made of a nitride semiconductor material (eg, AlGaN) and a cap layer 3 made of a third nitride semiconductor material (eg, GaN) are sequentially stacked. In the present specification, for convenience, the electron transit layer 1, the electron supply layer 2, and the cap layer 3 are collectively referred to as a semiconductor substrate.

半導体基板の表面には、絶縁膜としての酸化膜４と、酸素を含む金属膜５と、チタン上にアルミ銅と窒化チタンを順次積層してなるゲート電極６とが形成されている。また、図２では図示を省略しているが、図面に向かって右側の半導体基板の表面上にはドレイン電極が配置されており、図面に向かって左側の半導体基板の表面上にはソース電極が配置されている。   On the surface of the semiconductor substrate, an oxide film 4 as an insulating film, a metal film 5 containing oxygen, and a gate electrode 6 formed by sequentially stacking aluminum copper and titanium nitride on titanium are formed. Although not shown in FIG. 2, a drain electrode is disposed on the surface of the semiconductor substrate on the right side as viewed in the drawing, and a source electrode is provided on the surface of the semiconductor substrate on the left side as viewed in the drawing. Has been placed.

酸化膜４はシリコン酸化物からなり、その一部には図示のように開口（ゲート開口）が設けられている。このゲート開口からは、半導体基板の表面が露出している。本実施形態の半導体装置（半導体素子）では、平面視において、ゲート開口の内側の半導体基板表面に凹部（リセス部）が形成されている。凹部（リセス部）はキャップ層３よりも深く形成されているため、本実施形態の半導体装置では、ゲート開口を通じての電子供給層２の表面が露出している。   The oxide film 4 is made of silicon oxide, and an opening (gate opening) is provided in a part thereof as shown in the figure. The surface of the semiconductor substrate is exposed from the gate opening. In the semiconductor device (semiconductor element) of this embodiment, a recess (recess portion) is formed on the surface of the semiconductor substrate inside the gate opening in plan view. Since the concave portion (recess portion) is formed deeper than the cap layer 3, in the semiconductor device of this embodiment, the surface of the electron supply layer 2 through the gate opening is exposed.

酸素を含む金属膜５は、ゲート開口の内側に形成された第１の部分と、ゲート開口の外側に形成され酸化膜４の表面を被覆する第２の部分とを有する。
酸素を含む金属膜５の第１の部分は、図示のように、その中央側はリセス部の底面と側面に形成されており、その外周側はゲート開口を構成する酸化膜４の側面を被覆している。
すなわち、酸素を含む金属膜５の第１の部分は、リセス部の底面に露出した電子供給層２の表面と、リセス部の側面に露出した電子供給層２の表面とキャップ層３の表面、リセス部の外側に露出した半導体基板の表面、およびゲート開口の側面（酸化膜４の側面）を被覆している。 The metal film 5 containing oxygen has a first portion formed inside the gate opening and a second portion formed outside the gate opening and covering the surface of the oxide film 4.
As shown in the figure, the first portion of the metal film 5 containing oxygen is formed on the bottom and side surfaces of the recess portion, and the outer peripheral side covers the side surface of the oxide film 4 constituting the gate opening. doing.
That is, the first portion of the oxygen-containing metal film 5 includes the surface of the electron supply layer 2 exposed on the bottom surface of the recess portion, the surface of the electron supply layer 2 exposed on the side surface of the recess portion, and the surface of the cap layer 3. The surface of the semiconductor substrate exposed outside the recess and the side surface of the gate opening (side surface of the oxide film 4) are covered.

酸素を含む金属膜５の第２の部分は、第１の部分に連続して形成され、半導体基板の外周側に向かって延伸してゲート開口の外側の酸化膜４の表面を被覆する。ここで、図２では１つのゲート電極６しか記載されていないが、本発明を半導体基板に複数のゲート電極６を備える複数のセルに適応する場合、便宜上、半導体基板の外周は各セルの外周の意味であることは言うまでも無い。
ゲート電極６は、ゲート開口の内側に形成された第１の部分と、ゲート開口の外側に形成された第２の部分とを有する。 The second portion of the metal film 5 containing oxygen is formed continuously with the first portion, extends toward the outer peripheral side of the semiconductor substrate, and covers the surface of the oxide film 4 outside the gate opening. Here, only one gate electrode 6 is shown in FIG. 2, but when the present invention is applied to a plurality of cells having a plurality of gate electrodes 6 on a semiconductor substrate, for convenience, the outer periphery of the semiconductor substrate is the outer periphery of each cell. Needless to say, it means.
The gate electrode 6 has a first portion formed inside the gate opening and a second portion formed outside the gate opening.

ゲート電極６の第１の部分は、図示のように、その中央側はリセス部の底面と側面に形成されており、その外周側はゲート開口を構成する酸化膜４の側面を被覆している。すなわち、ゲート電極６の第１の部分は、リセス部の底面に露出した電子供給層２の表面と、リセス部の側面に露出した電子供給層２の表面とキャップ層３の表面、リセス部の外側に露出した半導体基板の表面、およびゲート開口の側面（酸化膜４の側面）を酸素を含む金属膜５を介して被覆している。   As shown in the figure, the first portion of the gate electrode 6 is formed on the bottom surface and side surface of the recess portion, and the outer peripheral side covers the side surface of the oxide film 4 constituting the gate opening. . That is, the first portion of the gate electrode 6 includes the surface of the electron supply layer 2 exposed on the bottom surface of the recess portion, the surface of the electron supply layer 2 exposed on the side surface of the recess portion, the surface of the cap layer 3, and the recess portion. The surface of the semiconductor substrate exposed to the outside and the side surface of the gate opening (side surface of the oxide film 4) are covered with a metal film 5 containing oxygen.

ゲート電極６の第２の部分は、第１の部分に連続して形成され、半導体基板の外周側に向かって延伸してゲート開口の外側の酸化膜４の表面を被覆する。ここで、ゲート電極６の第２の部分のうちドレイン電極に向かって延伸する部分は、酸素を含む金属膜５の第２の部分よりもドレイン電極側、すなわち半導体基板の外周側まで延伸している。つまり、ゲート電極６の第２の部分のうちドレイン電極に向かって延伸する部分の端部は、酸素を含む金属膜５の第２の部分のうちドレイン電極に向かって延伸する部分の端部よりも、ドレイン電極側、すなわち半導体基板の外周側まで延伸している。   The second portion of the gate electrode 6 is formed continuously with the first portion, extends toward the outer peripheral side of the semiconductor substrate, and covers the surface of the oxide film 4 outside the gate opening. Here, the portion of the second portion of the gate electrode 6 that extends toward the drain electrode extends to the drain electrode side, that is, the outer peripheral side of the semiconductor substrate, than the second portion of the metal film 5 containing oxygen. Yes. That is, the end portion of the second portion of the gate electrode 6 extending toward the drain electrode is more than the end portion of the second portion of the metal film 5 containing oxygen extending toward the drain electrode. Also, it extends to the drain electrode side, that is, the outer peripheral side of the semiconductor substrate.

この結果、ゲート電極６の第２の部分のうちドレイン電極に向かって延伸する部分は、リセス部側では酸素を含む金属膜５の第２の部分の表面を被覆しており、半導体基板の外周側では酸化膜４の表面を被覆している。つまり、リセス部側の酸化膜４上では、酸化膜４とゲート電極６との間に酸素を含む金属膜５が介在しているが、半導体基板の外周側の酸化膜４上では、酸化膜４とゲート電極６とが直接接触している。このように、酸化膜４の表面が、半導体基板の外周側ではゲート電極６に接触し、リセス部側では、金属膜よりも導電率が低いが酸化膜４よりも導電率が高い酸素を含む金属膜に接触していることで、段階的に緩やかな電界緩和効果が得られ、コラプス現象の抑制効果が良好に発揮される。図３は、従来のＨＥＭＴと本発明の一実施形態に係るＨＥＭＴのＶｄｓ・電流コラプス関係を示すが、図示のように、本発明の一実施形態のＨＥＭＴによれば、従来例に比較して電流コラプスを良好に抑制出来ることが分かる。さらに、本出願人が確認したところによれば、酸素を含む金属膜５をＮｉＯＸ膜とした場合、特に良好にゲートリークの低減、コラプス現象の抑制が図られることがわかっている。なお、この場合でも、ＮｉＯＸの導電率はゲート電極６の導電率よりも低く、酸化膜４の導電率よりも高くする。すなわち、ＮｉＯＸ膜の酸素の組成比は、完全な絶縁膜（酸化膜）を構成する場合の酸素組成比X=1よりも多い状態、すなわち酸素過剰の状態とすべきである。また、酸素を含む金属膜５は、ｐ型導電型の性質を備える金属酸化物膜とするのが良い。 As a result, the portion extending toward the drain electrode in the second portion of the gate electrode 6 covers the surface of the second portion of the metal film 5 containing oxygen on the recess portion side, and the outer periphery of the semiconductor substrate On the side, the surface of the oxide film 4 is covered. In other words, on the oxide film 4 on the recess portion side, the metal film 5 containing oxygen is interposed between the oxide film 4 and the gate electrode 6, but on the oxide film 4 on the outer peripheral side of the semiconductor substrate, the oxide film 4 and the gate electrode 6 are in direct contact. As described above, the surface of the oxide film 4 is in contact with the gate electrode 6 on the outer peripheral side of the semiconductor substrate, and contains oxygen having a conductivity lower than that of the metal film but higher than that of the oxide film 4 on the recess portion side. By being in contact with the metal film, a gradual electric field relaxation effect can be obtained in a stepwise manner, and the collapse phenomenon can be effectively suppressed. FIG. 3 shows the relationship between the conventional HEMT and the VMT / current collapse of the HEMT according to the embodiment of the present invention. It can be seen that the current collapse can be satisfactorily suppressed. Further, according to the present applicant's confirmation, it has been found that when the metal film 5 containing oxygen is a NiO x film, the gate leakage can be reduced and the collapse phenomenon can be suppressed particularly well. Even in this case, the conductivity of NiO X is lower than that of the gate electrode 6 and higher than that of the oxide film 4. That is, the oxygen composition ratio of the NiO X film should be larger than the oxygen composition ratio X = 1 in the case of forming a complete insulating film (oxide film), that is, in an oxygen excess state. The metal film 5 containing oxygen is preferably a metal oxide film having p-type conductivity.

なお、酸素を含む金属膜５については、その第１の部分を酸素プアの金属膜、すなわち実質的に絶縁膜としても良い。この場合、ＭＩＳ構造のトランジスタを構成する。更には、第１の部分を酸素プアの金属膜の代わりに窒化膜や酸化膜などを適用することもできる。   Note that the first portion of the metal film 5 containing oxygen may be an oxygen-poor metal film, that is, a substantially insulating film. In this case, a MIS structure transistor is formed. Furthermore, a nitride film, an oxide film, or the like can be applied to the first portion in place of the oxygen poor metal film.

ゲート電極６の第２の部分のうちソース電極に向かって延伸する部分においては、従来の半導体装置と同様に、その端部が酸素を含む金属膜５の端部と同じ位置にある。また、ゲート電極６の第２の部分の延伸長は、ドレイン電極側に比べてソース電極側で短くなっている。この結果、半導体基板の面積、すなわちチップ面積を小さくできる。なお、ゲート電極６の第２の部分のうちソース電極に向かって延伸する部分についても、ドレイン電極に向かって延伸する部分と同様に、その端部を金属膜５の端部よりも半導体基板の外周側に位置させてもよいが、ゲートリークの低減、コラプス現象の抑制効果は期待されるほどには得られず、チップ面積が大きくなる。本実施形態のように、電位差が大きいゲート・ドレイン間で本発明を採用することで、チップ面積の小型化と電流コラプス低減効果の両方でその効果が最大限発揮される。   Of the second portion of the gate electrode 6, the portion extending toward the source electrode has its end located at the same position as the end of the metal film 5 containing oxygen, as in the conventional semiconductor device. The extension length of the second portion of the gate electrode 6 is shorter on the source electrode side than on the drain electrode side. As a result, the area of the semiconductor substrate, that is, the chip area can be reduced. Of the second portion of the gate electrode 6, the portion extending toward the source electrode also has an end portion closer to the semiconductor substrate than the end portion of the metal film 5, as in the portion extending toward the drain electrode. Although it may be positioned on the outer peripheral side, the effect of reducing gate leakage and suppressing the collapse phenomenon cannot be obtained as expected, and the chip area increases. By adopting the present invention between the gate and the drain having a large potential difference as in the present embodiment, the effect can be maximized in both the reduction of the chip area and the current collapse reduction effect.

なお、ゲート電極６のうち第２の部分はいわゆるゲートフィールドプレートとして機能する部分であるが、本発明では、ドレイン電極とソース電極間の電流を制御するゲート部として機能する第１の部分と合わせてゲート電極と総称する。
更に、本出願人が確認したところ、ゲート開口の端部から酸素を含む金属膜５の端部までの距離をa、酸素を含む金属膜５の端部からゲート電極６の端部までの距離をｂとした場合、ＨＥＭＴのゲートリーク低減とコラプス現象の抑制の為には、０μｍ＜a＜２．０μｍ、０μｍ＜ｂ＜２．０μｍであることが望ましく、ｂ/aを1から１２０の範囲で設定することが望ましいことが分かった。 The second portion of the gate electrode 6 is a portion that functions as a so-called gate field plate. However, in the present invention, the second portion is combined with the first portion that functions as a gate portion for controlling the current between the drain electrode and the source electrode. And collectively referred to as gate electrodes.
Further, the applicant has confirmed that the distance from the end of the gate opening to the end of the metal film 5 containing oxygen is a, and the distance from the end of the metal film 5 containing oxygen to the end of the gate electrode 6 is Is 0 μm <a <2.0 μm, 0 μm <b <2.0 μm, and b / a is 1 to 120 in order to reduce HEMT gate leakage and suppress collapse phenomenon. It turned out to be desirable to set the range.

また、ゲート電極６の第２の部分の下側において、酸化膜４の厚みを変化させることで段階的に緩やかに電界緩和効果を得ることができる。特に、酸化膜４の厚みを半導体基板の外周側に向けて薄くなるように、その厚みを段階的にあるいは連続的に反化させると、本願発明の作用効果と相まって、更に緩やかな電界緩和効果を得ることができる。   Further, by changing the thickness of the oxide film 4 below the second portion of the gate electrode 6, an electric field relaxation effect can be obtained gradually and gradually. In particular, if the thickness of the oxide film 4 is decreased stepwise or continuously so that the thickness of the oxide film 4 decreases toward the outer peripheral side of the semiconductor substrate, a more gentle electric field relaxation effect is coupled with the effect of the present invention. Can be obtained.

図２の本発明の一実施の形態のＨＥＭＴにおいて、ＧａＮキャップ層３を設けない構造としても良い。また、半導体基板に凹部（リセス部）を設けていない構造としても良い。また、本発明は、ノーマリオン型、ノーマリオフ型のいずれのＨＥＭＴにも適用できる。また、酸素を含む金属膜の表面をタングステンによって被覆すると、金属膜中の酸素が製造工程の過程、あるいは経年的なデバイスの使用によって変化することが良好に防止され、高い信頼性が得られる。   The HEMT according to the embodiment of the present invention shown in FIG. 2 may have a structure in which the GaN cap layer 3 is not provided. Moreover, it is good also as a structure where the recessed part (recessed part) is not provided in the semiconductor substrate. Further, the present invention can be applied to either a normally-on type or a normally-off type HEMT. Further, when the surface of the metal film containing oxygen is coated with tungsten, it is possible to satisfactorily prevent the oxygen in the metal film from being changed by the manufacturing process or the use of aged device, and high reliability can be obtained.

１、電子走行層
２、電子供給層
３、ＧａＮキャップ層
４、酸化膜
５、酸素を含む金属膜
６、ゲート電極 DESCRIPTION OF SYMBOLS 1, Electron travel layer 2, Electron supply layer 3, GaN cap layer 4, Oxide film 5, Metal film 6 containing oxygen, Gate electrode

Claims (8)

電子走行層および電子供給層を備える半導体基板と、
該半導体基板の表面に形成された絶縁膜およびゲート電極と、を備える高電子移動度トランジスタにおいて、
前記ゲート電極は、ゲートとして機能する第１の部分と、該第１の部分から前記絶縁膜の表面に延伸してフィールドプレートとして機能する第２の部分とを有し、
前記絶縁膜と前記ゲート電極の第２の部分との間には、酸素を含む金属膜が形成されており、
前記ゲート電極の第２の部分は、前記酸素を含む金属膜よりも前記半導体基板の外周側に延伸しており、
前記絶縁膜の表面が、前記ゲート電極の第１の部分側では前記酸素を含む金属膜により被覆されており、前記半導体基板の外周側では前記ゲート電極の第２の部分により被覆されていることを特徴とする半導体装置。 A semiconductor substrate comprising an electron transit layer and an electron supply layer;
In a high electron mobility transistor comprising an insulating film and a gate electrode formed on the surface of the semiconductor substrate,
The gate electrode has a first portion that functions as a gate, and a second portion that extends from the first portion to the surface of the insulating film and functions as a field plate,
Between the insulating film and the second portion of the gate electrode, a metal film containing oxygen is formed,
The second portion of the gate electrode extends to the outer peripheral side of the semiconductor substrate from the metal film containing oxygen,
The surface of the insulating film is covered with the metal film containing oxygen on the first portion side of the gate electrode, and is covered with the second portion of the gate electrode on the outer peripheral side of the semiconductor substrate. A semiconductor device characterized by the above. 電子走行層および電子供給層を備える半導体基板と、
該半導体基板の表面に形成された絶縁膜およびゲート電極と、を備える高電子移動度トランジスタにおいて、
前記ゲート電極は、前記絶縁膜に形成された開口内に配置された第１の部分と、前記絶縁膜の表面に配置された第２の部分とを有し、
前記絶縁膜の前記開口側の表面は、酸素を含む金属膜を介して前記ゲート電極の第２の部分により被覆されており、前記絶縁膜の前記開口側から離間した側の表面は、前記酸素を含む金属膜を介さずに前記ゲート電極の第２の部分により被覆されていることを特徴とする半導体装置。 A semiconductor substrate comprising an electron transit layer and an electron supply layer;
In a high electron mobility transistor comprising an insulating film and a gate electrode formed on the surface of the semiconductor substrate,
The gate electrode has a first portion arranged in an opening formed in the insulating film, and a second portion arranged on the surface of the insulating film,
The surface on the opening side of the insulating film is covered with a second portion of the gate electrode through a metal film containing oxygen, and the surface of the insulating film on the side away from the opening side is covered with the oxygen The semiconductor device is covered with the second portion of the gate electrode without a metal film containing 前記酸素を含む金属膜の導電率は、前記絶縁膜の導電率よりも高く、前記ゲート電極の導電率よりも低いことを特徴とする請求項１又は２に記載の半導体装置。   3. The semiconductor device according to claim 1, wherein a conductivity of the metal film containing oxygen is higher than a conductivity of the insulating film and lower than a conductivity of the gate electrode. 前記酸素を含む金属膜は、酸素を含むニッケル膜であることを特徴とする請求項１又は２に記載の半導体装置。   The semiconductor device according to claim 1, wherein the metal film containing oxygen is a nickel film containing oxygen. 電子走行層および電子供給層を備える半導体基板と、
該半導体基板の表面に形成された絶縁膜、ゲート電極、ドレイン電極およびソース電極と、を備える高電子移動度トランジスタにおいて、
前記ゲート電極は、前記絶縁膜に形成された開口内に配置された電極部と、前記絶縁膜の表面に配置されたフィールドプレート部とを有し、
前記ゲート電極の電極部と前記ドレイン電極との間においては、前記絶縁膜の前記開口側の表面は酸素を含む金属膜を介して前記フィールドプレート部により被覆されており、前記絶縁膜の前記開口側から離間した側の表面は前記酸素を含む金属膜を介さずに前記フィールドプレート部により被覆されており、
前記ゲート電極の電極部と前記ソース電極との間においては、前記絶縁膜の表面は酸素を含む金属膜を介して前記フィールドプレート部に被覆されており、
前記ゲート電極の電極部と前記ソース電極との間における前記フィールドプレート部の延伸長は、前記ゲート電極の電極部と前記ドレイン電極との間における前記フィールドプレート部の延伸長に比べて短いことを特徴とする半導体装置。 A semiconductor substrate comprising an electron transit layer and an electron supply layer;
In a high electron mobility transistor comprising an insulating film, a gate electrode, a drain electrode and a source electrode formed on the surface of the semiconductor substrate,
The gate electrode has an electrode portion disposed in an opening formed in the insulating film, and a field plate portion disposed on a surface of the insulating film,
Between the electrode portion of the gate electrode and the drain electrode, the surface on the opening side of the insulating film is covered with the field plate portion through a metal film containing oxygen, and the opening of the insulating film The surface on the side separated from the side is covered with the field plate part without the metal film containing oxygen,
Between the electrode portion of the gate electrode and the source electrode, the surface of the insulating film is covered with the field plate portion through a metal film containing oxygen,
The extension length of the field plate portion between the electrode portion of the gate electrode and the source electrode is shorter than the extension length of the field plate portion between the electrode portion of the gate electrode and the drain electrode. A featured semiconductor device. 電子走行層上に電子供給層を備え、
前記電子供給層上にキャップ層を備え、
前記キャップ層上に酸化膜を備える構造の高電子移動度トランジスタＨＥＭＴにおいて、
ゲート電極の下部に前記電子供給層と電気的に接続されたｐ型金属酸化物半導体膜を有し、
ゲート電極よりｐ型金属酸化物半導体膜の長さが短く、前記ゲート電極が前記酸化膜と接する部分を有することを特徴とする半導体装置。 An electron supply layer is provided on the electron transit layer,
A cap layer is provided on the electron supply layer,
In the high electron mobility transistor HEMT having a structure including an oxide film on the cap layer,
A p-type metal oxide semiconductor film electrically connected to the electron supply layer below the gate electrode;
A semiconductor device, wherein a p-type metal oxide semiconductor film is shorter than a gate electrode, and the gate electrode has a portion in contact with the oxide film. 前記ゲート電極と接する部分における前記酸化膜の膜厚が一定ではなく、前記ゲート電極が前記酸化膜と接する部分において、酸化膜厚が変化することを特徴とする請求項６に記載の半導体装置。   7. The semiconductor device according to claim 6, wherein the thickness of the oxide film in a portion in contact with the gate electrode is not constant, and the thickness of the oxide film changes in a portion in which the gate electrode is in contact with the oxide film. 前記ゲート電極と接する部分における前記酸化膜の膜厚が、ゲート電極端に向かって厚くなることを特徴とする請求項７の半導体装置。   8. The semiconductor device according to claim 7, wherein a thickness of the oxide film in a portion in contact with the gate electrode increases toward an end of the gate electrode.
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