JP2016092083A - Vertical type schottky barrier diode using gallium nitride substrate as drift layer - Google Patents
Vertical type schottky barrier diode using gallium nitride substrate as drift layer Download PDFInfo
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本発明は、縦型ショットキーバリアダイオード、特にＧａＮ基板をドリフト層として用いたショットキーバリアダイオードに係る。 The present invention relates to a vertical Schottky barrier diode, and more particularly to a Schottky barrier diode using a GaN substrate as a drift layer.
ＧａＮ等窒化物半導体をパワーデバイスに用いる場合、大電流化、高耐圧化、小型化等が求められる。Ｓｉ基板上にＧａＮ系膜を形成したデバイスとして、横型のショットキーバリアダイオード構造（図１および図２参照、非特許文献１および非特許文献２参照）が知られている。これらの構造はオーミック電極、ショットキー電極ともに素子表面側に設けており、また電流の流れは横方向（基板面に平行方向）である。そのため、どの構造も製造プロセスが複雑であり、また電流パスが制限され、大きな電流が得られないという問題がある。一方、縦型のショットキーバリアダイオード構造（図３参照、非特許文献３参照）が知られているが、厚膜のｎ−−ＧａＮドリフト層を成長するため、コストがかかり、耐圧がｎ−−ＧａＮドリフト層の膜厚で支配されるため、大きな耐圧を得ることが困難である。 When a nitride semiconductor such as GaN is used for a power device, a large current, a high breakdown voltage, miniaturization, etc. are required. As a device in which a GaN-based film is formed on a Si substrate, a lateral Schottky barrier diode structure (see FIGS. 1 and 2, Non-Patent Document 1 and Non-Patent Document 2) is known. In these structures, both the ohmic electrode and the Schottky electrode are provided on the element surface side, and the current flow is in the lateral direction (parallel to the substrate surface). For this reason, the manufacturing process is complicated in any structure, and the current path is limited, and a large current cannot be obtained. On the other hand, a vertical Schottky barrier diode structure (see FIG. 3 and Non-Patent Document 3) is known. However, since a thick n − -GaN drift layer is grown, the cost increases and the breakdown voltage is n −. Since it is governed by the film thickness of the GaN drift layer, it is difficult to obtain a large breakdown voltage.
本発明の課題は、ＧａＮ基板を用いたショットキーバリアダイオードにおいて、大電流化、高耐圧化、小型化を図ることである。 An object of the present invention is to achieve a large current, a high breakdown voltage, and a small size in a Schottky barrier diode using a GaN substrate.
本発明者らは、基板面に垂直方向に電流を流し、かつ、ＧａN基板内にドリフト層を形成することを創案した。すなわち、本発明によれば、以下のショットキーバリアダイオードが提供される。 The inventors of the present invention have invented that a current is allowed to flow in a direction perpendicular to the substrate surface and that a drift layer is formed in the GaN substrate. That is, according to the present invention, the following Schottky barrier diode is provided.
［１］ｎ−−ＧａＮ基板の一方の面がＮ面またはＧａ面のいずれか一方に、他方の面がその逆の面とし、当該一方の面に対してｎ＋−ＧａＮ層を形成し、さらに当該ｎ＋−ＧａＮ層上にオーミック電極を形成し、ｎ−−ＧａＮ基板の他方の面にショットキー電極を形成した、ｎ−−ＧａＮ基板をドリフト層とするショットキーバリアダイオード。 [1] One surface of the n − -GaN substrate is either an N surface or a Ga surface, the other surface is the opposite surface, and an n + -GaN layer is formed on the one surface, Furthermore an ohmic electrode is formed on the n + -GaN layer, n - -GaN the other surface of the substrate to form a Schottky electrode, n - -GaN Schottky barrier diode substrate and the drift layer.
［２］ｎ−−ＧａＮ基板の不純物濃度が２×１０１５ｃｍ−３〜２×１０１７ｃｍ−３である、前記［１］に記載のショットキーバリアダイオード。 [2] The Schottky barrier diode according to [1], wherein the n − -GaN substrate has an impurity concentration of 2 × 10 15 cm −3 to 2 × 10 17 cm −3 .
［３］前記ｎ＋−ＧａＮ層の不純物濃度が１×１０１８ｃｍ−３〜１×１０１９ｃｍ−３である前記［１］または［２］に記載のショットキーバリアダイオード。 [3] The Schottky barrier diode according to [1] or [2], wherein the impurity concentration of the n + -GaN layer is 1 × 10 18 cm −3 to 1 × 10 19 cm −3 .
［４］前記ｎ−−ＧａＮ基板のショットキー電極側表面に絶縁膜またはｐ‐ＧａＮ層が形成され、その一部が前記ショットキー電極と重なる前記［１］〜［３］のいずれかに記載のショットキーバリアダイオード。 [4] The insulating film or p-GaN layer is formed on the Schottky electrode side surface of the n − -GaN substrate, and a part thereof overlaps with the Schottky electrode. Schottky barrier diode.
［５］ｎ−−ＧａＮ基板が、ＨＶＰＥ法、Ｎａフラックス法、あるいはアモノサーマル法のいずれかで製造された前記［１］〜［４］のいずかに記載のショットキーバリアダイオード。
[5] The Schottky barrier diode according to any one of [1] to [4], wherein the n − -GaN substrate is manufactured by any one of the HVPE method, the Na flux method, and the ammonothermal method.
以下、図面を参照しつつ本発明の実施の形態について説明する。本発明は、以下の実施形態に限定されるものではなく、発明の範囲を逸脱しない限りにおいて、変更、修正、改良を加え得るものである。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiments, and changes, modifications, and improvements can be added without departing from the scope of the invention.
本発明において基板は、ｎ−−ＧａＮ基板であり、ＨＶＰＥ法(Hydride vapor phase epitaxy)、Ｎａフラックス法、あるいはアモノサーマル法のいずれかで製造された結晶を加工して用いる。基板のサイズは、径が２インチ以上、厚みは２００μｍ〜７００μｍであることが好ましい。当該基板は（０００１）面が用いられ、両面ともに鏡面研磨され、一方の面がＧａ面、他方の面がＮ面になるように加工されることが好ましい。当該基板はドリフト層となるため、不純物濃度が２×１０１５ｃｍ−３〜２×１０１７ｃｍ−３、キャリア移動度が５００ｃｍ２／Ｖｓ以上であることが好ましい。不純物としては周期律表第１４族（第４ｂ族）元素が用いられ、Ｓｉが好適に用いられる。 In the present invention, the substrate is an n − -GaN substrate, and a crystal manufactured by any one of the HVPE method (Hydride vapor phase epitaxy), the Na flux method, or the ammonothermal method is used. The substrate preferably has a diameter of 2 inches or more and a thickness of 200 μm to 700 μm. The (0001) surface is used for the substrate, and both surfaces are preferably mirror-polished and processed so that one surface is a Ga surface and the other surface is an N surface. Since the substrate serves as a drift layer, the impurity concentration is preferably 2 × 10 15 cm −3 to 2 × 10 17 cm −3 and the carrier mobility is 500 cm 2 / Vs or higher. As the impurity, a group 14 (group 4b) element of the periodic table is used, and Si is preferably used.
ｎ−−ＧａＮ基板上の一方のＧａ面またはＮ面に、ＭＯＣＶＤ法やＭＢＥ法などの公知の成膜手法にて、ｎ＋−ＧａＮ層が形成される。当該ｎ＋−ＧａＮ層の不純物濃度は１×１０１８ｃｍ−３〜１×１０１９ｃｍ−３、より好ましくは１×１０１８ｃｍ−３〜５×１０１８ｃｍ−３、キャリア移動度は１５０ｃｍ２／Ｖｓ〜２５０ｃｍ２／Ｖｓであることが好ましく、厚みは５０ｎｍ〜５００ｎｍであることが好ましい。 An n + -GaN layer is formed on one Ga surface or N surface of the n − -GaN substrate by a known film formation method such as MOCVD or MBE. The impurity concentration of the n + -GaN layer is 1 × 10 18 cm −3 to 1 × 10 19 cm −3 , more preferably 1 × 10 18 cm −3 to 5 × 10 18 cm −3 , and the carrier mobility is 150 cm. is preferably 2 / Vs~250cm 2 / Vs, it is preferable that the thickness is 50 nm~500 nm.
ｎ＋−ＧａＮ層の上に電子ビーム蒸着法等にてオーミック電極を形成する。オーミック電極としては、例えば、Ｔｉ／Ａｌ／Ｎｉ／Ａｕ（この順に膜形成）なる構成の電極が形成される。各層の厚みは１０ｎｍ〜２００ｎｍである。 An ohmic electrode is formed on the n + -GaN layer by electron beam evaporation or the like. As the ohmic electrode, for example, an electrode having a configuration of Ti / Al / Ni / Au (film formation in this order) is formed. The thickness of each layer is 10 nm to 200 nm.
ｎ−‐ＧａＮ基板の他方のＮ面またはＧａ面の素子中央部となる領域以外にはＳｉＯ２等の絶縁層あるいはＰ型ＧａＮ層を形成することが好ましい。ＳｉＯ２等の絶縁層あるいはＰ型ＧａＮ層が形成されない素子中央部の領域にショットキー電極が形成される。たとえば、ショットキー電極としては、例えば、Ｎｉ／Ａｕ（この順に膜形成）なる構成の電極が形成される。各層の厚みは１０ｎｍ〜２００ｎｍである。 It is preferable to form an insulating layer such as SiO 2 or a P-type GaN layer other than the region that becomes the element central portion of the other N-face or Ga-face of the n − -GaN substrate. A Schottky electrode is formed in the central region of the device where the insulating layer such as SiO 2 or the P-type GaN layer is not formed. For example, as the Schottky electrode, for example, an electrode having a configuration of Ni / Au (film formation in this order) is formed. The thickness of each layer is 10 nm to 200 nm.
（実施例１：ｎ−‐ＧａＮ基板のＮ面にｎ＋−ＧａＮ層を形成し、ショットキー電極側にＳｉＯ２形成）
基板として２インチ径の厚み３２５μｍの（０００１）面ｎ−−ＧａＮ単結晶基板（不純物濃度：５x１０１６ｃｍ−３、移動度：７００ｃｍ２／Ｖｓ、Ｇａ面及びＮ面ともに鏡面研磨）を用い、これを所定のＭＯＣＶＤ装置の反応菅内に設置した。ＭＯＣＶＤ装置は、キャリアガスあるいは反応ガスとして、少なくともＨ２、Ｎ２、ＴＭＧ（トリメチルガリウム）、ＮＨ３及びドーパントとしてＳｉＨ４(モノシラン)が、反応管内に供給可能とされている。キャリアガスとして、水素を流量２０ＳＬＭ、及び窒素を流量１０ＳＬＭで流しながら、反応管内の圧力を７６０Ｔｏｒｒに保ちつつ、基板を１１３０℃まで昇温した後、１０分間保持し、ｎ−−ＧａＮ基板のＮ面に対してサーマルクリーニングを実施した。その後、基板温度を１１３０℃に保ちつつ、ＴＭＧとそのキャリアガスである水素を供給するとともに、ＮＨ３とそのキャリアガスである水素及びＳｉＨ４とを供給することにより、不純物濃度が２x１０１８ ｃｍ-３、膜厚０.１μｍのｎ＋−ＧａＮ層をｎ−−ＧａＮ基板のＮ面上に形成した。供給反応ガスのモル比、すなわち、第５族ガス／第３族ガス（ＮＨ３／ＴＭＧ）の比は２０００とし、反応管内の圧力は７６０Ｔｏｒｒ、ＳｉＨ４の流量は２０ＳＣＣＭとした。
ｎ＋−ＧａＮ層を形成後、ｎ＋−ＧａＮ層のＮ面に電子ビーム蒸着法を用いて、Ｔｉ／Ａｌ／Ｎｉ／Ａｕ(２０/１２０/４０/５０ｎｍ)を形成し、さらに８００℃で３０秒間アニールして、オーミック電極を形成した。その後、ドリフト層であるｎ−−ＧａＮ基板のＧａ面上に電子ビーム蒸着法により、ショットキー電極中央部を除いて絶縁膜ＳｉＯ２を厚み１００ｎｍ形成した。さらに、フォトリソグラフィ技術とリフトオフ法を用いてショットキー電極としてＮｉ／Ａｕ (５０/１００ｎｍ)を電子ビーム蒸着法により形成した。ショットキー電極サイズは１×１ｍｍ２とした。
上記のように、オーミック電極およびショットキー電極を形成したショットキーダイオード素子（図４参照）の順方向及び逆方向の電流−電圧特性を測定した。その結果を、図５および図６に示す。立ち上がり電圧：１.９３Ｖ、順方向電圧：３.０Ｖ（＠順方向電流：８Ａ）、耐圧：４.１ｋＶであった。
(Example 1: An n + -GaN layer is formed on the N face of an n − -GaN substrate, and SiO 2 is formed on the Schottky electrode side)
Using a (0001) plane n − -GaN single crystal substrate (impurity concentration: 5 × 10 16 cm −3 , mobility: 700 cm 2 / Vs, both Ga plane and N plane mirror polished) having a 2 inch diameter and a thickness of 325 μm as a substrate, This was installed in a reaction vessel of a predetermined MOCVD apparatus. In the MOCVD apparatus, at least H 2 , N 2 , TMG (trimethyl gallium), NH 3 as a carrier gas or a reaction gas, and SiH 4 (monosilane) as a dopant can be supplied into the reaction tube. As the carrier gas, while flowing a hydrogen flow 20 SLM, and the nitrogen flow rate 10 SLM, while maintaining the pressure in the reaction tube to 760 Torr, after raising the substrate to 1130 ° C., held for 10 minutes, n - -GaN substrate of N Thermal cleaning was performed on the surface. Then, while maintaining the substrate temperature at 1130 ° C., TMG and its carrier gas, hydrogen, are supplied, and NH 3 and its carrier gas, hydrogen and SiH 4 , are supplied, so that the impurity concentration becomes 2 × 10 18 cm −. 3. An n + -GaN layer having a thickness of 0.1 μm was formed on the N surface of the n − -GaN substrate. The molar ratio of the supplied reaction gas, that is, the ratio of Group 5 gas / Group 3 gas (NH 3 / TMG) was 2000, the pressure in the reaction tube was 760 Torr, and the flow rate of SiH 4 was 20 SCCM.
After forming the n + -GaN layer by using an electron beam evaporation method on the N surface of the n + -GaN layer to form a Ti / Al / Ni / Au ( 20/120/40 / 50nm), an additional 800 ° C. An ohmic electrode was formed by annealing for 30 seconds. Thereafter, an insulating film SiO 2 having a thickness of 100 nm was formed on the Ga surface of the n − -GaN substrate, which is a drift layer, by the electron beam evaporation method except for the central portion of the Schottky electrode. Furthermore, Ni / Au (50/100 nm) was formed as a Schottky electrode by an electron beam evaporation method using a photolithography technique and a lift-off method. The Schottky electrode size was 1 × 1 mm 2 .
As described above, the forward-direction and reverse-direction current-voltage characteristics of the Schottky diode element (see FIG. 4) in which the ohmic electrode and the Schottky electrode were formed were measured. The results are shown in FIG. 5 and FIG. Rise voltage: 1.93 V, forward voltage: 3.0 V (@ forward current: 8 A), withstand voltage: 4.1 kV.
（実施例２：ｎ−‐ＧａＮ基板のＧａ面にｎ＋−ＧａＮ層を形成し、ショットキー電極側にＳｉＯ２形成）
実施例１と同じｎ−−ＧａＮ基板を用い、ｎ−−ＧａＮ基板のＧａ面に対して実施例１と同様にサーマルクリーニングを実施した。その後、実施例１と同じ条件で、同じ不純物濃度２x１０１８ ｃｍ-３ 、膜厚０.１μｍのｎ＋−ＧａＮ層をｎ−−ＧａＮ基板のＧａ面上に形成した。
ｎ＋−ＧａＮ層を形成後、ｎ＋−ＧａＮ層のＧａ面に電子ビーム蒸着法を用いて、Ｔｉ／Ａｌ／Ｎｉ／Ａｕ(２０/１２０/４０/５０ｎｍ)を形成し、さらに８００℃で３０秒間アニールして、オーミック電極を形成した。その後、ドリフト層であるｎ−−ＧａＮ基板のＮ面上に電子ビーム蒸着法により、ショットキー電極中央部を除いて絶縁膜ＳｉＯ２を厚み１００ｎｍ形成した。さらに、フォトリソグラフィ技術とリフトオフ法を用いてショットキー電極としてＮｉ／Ａｕ (５０/１００ｎｍ)を電子ビーム蒸着法により形成した。ショットキー電極サイズは１×１ｍｍ２とした。
上記のように、オーミック電極およびショットキー電極を形成したショットキーダイオード素子（図７参照）の順方向及び逆方向の電流−電圧特性を測定した。その結果を、図８および図９に示す。立ち上がり電圧：１.７３Ｖ、順方向電圧：２.６７Ｖ（＠順方向電流：８Ａ）、耐圧：４.２ｋＶであった。
(Example 2: An n + -GaN layer is formed on the Ga surface of an n − -GaN substrate, and SiO 2 is formed on the Schottky electrode side)
The same n − -GaN substrate as in Example 1 was used, and thermal cleaning was performed on the Ga surface of the n − -GaN substrate in the same manner as in Example 1. Thereafter, an n + -GaN layer having the same impurity concentration of 2 × 10 18 cm −3 and a thickness of 0.1 μm was formed on the Ga surface of the n − -GaN substrate under the same conditions as in Example 1.
After forming the n + -GaN layer by using an electron beam evaporation of Ga surface of the n + -GaN layer to form a Ti / Al / Ni / Au ( 20/120/40 / 50nm), an additional 800 ° C. An ohmic electrode was formed by annealing for 30 seconds. Thereafter, an insulating film SiO 2 having a thickness of 100 nm was formed on the N surface of the n − -GaN substrate, which is a drift layer, by an electron beam evaporation method except for the central portion of the Schottky electrode. Furthermore, Ni / Au (50/100 nm) was formed as a Schottky electrode by an electron beam evaporation method using a photolithography technique and a lift-off method. The Schottky electrode size was 1 × 1 mm 2 .
As described above, the forward-direction and reverse-direction current-voltage characteristics of the Schottky diode element (see FIG. 7) in which the ohmic electrode and the Schottky electrode were formed were measured. The results are shown in FIG. 8 and FIG. The rising voltage was 1.73 V, the forward voltage was 2.67 V (@ forward current: 8 A), and the withstand voltage was 4.2 kV.
（実施例３：ｎ−‐ＧａＮ基板のＮ面にｎ＋−ＧａＮ層を形成し、ショットキー電極側にＰ−ＧａＮ形成）
実施例１と同じ条件で、ｎ−−ＧａＮ基板のＮ面にｎ＋−ＧａＮ層を形成した。一方、ｎ−−ＧａＮ基板のＧａ面上にＳｉＯ２膜（１００ｎｍ）を全面に成膜した。その後、部分的にＳｉＯ２膜を除去し、ＳｉＯ２膜以外の部分のｎ−−ＧａＮドリフト層をＲＩＥ装置（反応ガス：ＢＣｌ３、流量：１０ｓｃｃｍ、ガス圧：３Ｐａ、電力：５Ｗ、エッチング時間：１０分）を用いて選択的に０.１μm除去した。その後、ＳｉＯ２膜をマスクとして、成長温度１０３０℃、圧力７６０Ｔｏｒｒ、第５族ガス／第３族ガス（ＮＨ３／ＴＭＧ）の比は２７００、Ｃｐ２Ｍｇ（３００ｓｃｃｍ、ビスシクロペンタジエニルマグネシウム）を用いて膜厚が０.１μmのＰ−ＧａＮ層の選択再成長を行った。そして、ＳｉＯ２膜を除去した後、７５０℃、２０分間、窒素雰囲気中で活性化アニールを行った。そして、実施例１と同様の電極形成を行って、ショットキーダイオード素子（図１０参照）の順方向及び逆方向の電流−電圧特性を測定した。その結果を、図１１および図１２に示す。立ち上がり電圧：１.８７Ｖ、順方向電圧：２.８Ｖ（＠順方向電流：８Ａ）、耐圧：４.５ｋＶであった。
(Example 3: An n + -GaN layer is formed on the N face of an n − -GaN substrate, and P-GaN is formed on the Schottky electrode side)
Under the same conditions as in Example 1, an n + -GaN layer was formed on the N surface of the n − -GaN substrate. On the other hand, a SiO 2 film (100 nm) was formed on the entire Ga surface of the n − -GaN substrate. Thereafter, partially removing the SiO 2 film, in the portion other than the SiO 2 film n - -GaN drift layer RIE apparatus (reaction gas: BCl3, flow rate: 10 sccm, gas pressure: 3 Pa, power: 5W, etching time: 10 μm) to selectively remove 0.1 μm. Thereafter, using the SiO 2 film as a mask, a growth temperature of 1030 ° C., a pressure of 760 Torr, a Group 5 gas / Group 3 gas (NH 3 / TMG) ratio of 2700, and Cp 2 Mg (300 sccm, biscyclopentadienyl magnesium) are used. Then, selective regrowth of a P-GaN layer having a film thickness of 0.1 μm was performed. Then, after removing the SiO 2 film, activation annealing was performed in a nitrogen atmosphere at 750 ° C. for 20 minutes. And the electrode formation similar to Example 1 was performed, and the current-voltage characteristic of the forward direction and reverse direction of a Schottky diode element (refer FIG. 10) was measured. The results are shown in FIG. 11 and FIG. The rising voltage was 1.87 V, the forward voltage was 2.8 V (@ forward current: 8 A), and the withstand voltage was 4.5 kV.
（実施例４：ｎ−‐ＧａＮ基板のＧａ面にｎ＋−ＧａＮ層を形成し、ショットキー電極側にＰ−ＧａＮ形成）
実施例２と同じ条件で、ｎ−−ＧａＮ基板のＧａ面にｎ＋−ＧａＮ層を形成した。一方、ｎ−−ＧａＮ基板のＮ面上にＳｉＯ２膜（１００ｎｍ）を全面に成膜した。その後、部分的にＳｉＯ２膜を除去し、ＳｉＯ２膜以外の部分のｎ−−ＧａＮドリフト層をＲＩＥ装置（反応ガス：ＢＣｌ３、流量：１０ｓｃｃｍ、ガス圧：３Ｐａ、電力：５Ｗ、エッチング時間：１０分）を用いて選択的に０.１μm除去した。その後、ＳｉＯ２膜をマスクとして、成長温度１０３０℃、圧力７６０Ｔｏｒｒ、第５族ガス／第３族ガス（ＮＨ３／ＴＭＧ）の比は２７００、Ｃｐ２Ｍｇ（３００ｓｃｃｍ）を用いて膜厚が０.１μmのＰ−ＧａＮ層の選択再成長を行った。そして、ＳｉＯ２膜を除去した後、７５０℃、２０分間、窒素雰囲気中で活性化アニールを行った。そして、実施例２と同様の電極形成を行って、ショットキーダイオード素子（図１０参照）の順方向及び逆方向の電流−電圧特性を測定した。その結果を、図１１および図１２に示す。立ち上がり電圧：１.６７Ｖ、順方向電圧：２.４７Ｖ（＠順方向電流：８Ａ）、耐圧：４.３ｋＶであった。
(Example 4: An n + -GaN layer is formed on the Ga surface of an n − -GaN substrate, and P-GaN is formed on the Schottky electrode side)
Under the same conditions as in Example 2, an n + -GaN layer was formed on the Ga surface of the n − -GaN substrate. On the other hand, a SiO 2 film (100 nm) was formed on the entire N surface of the n − -GaN substrate. Thereafter, partially removing the SiO 2 film, in the portion other than the SiO 2 film n - -GaN drift layer RIE apparatus (reaction gas: BCl3, flow rate: 10 sccm, gas pressure: 3 Pa, power: 5W, etching time: 10 μm) to selectively remove 0.1 μm. Then, using the SiO 2 film as a mask, the growth temperature is 1030 ° C., the pressure is 760 Torr, the Group 5 gas / Group 3 gas (NH 3 / TMG) ratio is 2700, and the film thickness is 0.1 μm using Cp 2 Mg (300 sccm). The selective regrowth of the P-GaN layer was performed. Then, after removing the SiO 2 film, activation annealing was performed in a nitrogen atmosphere at 750 ° C. for 20 minutes. And the electrode formation similar to Example 2 was performed, and the current-voltage characteristic of the forward direction and reverse direction of the Schottky diode element (refer FIG. 10) was measured. The results are shown in FIG. 11 and FIG. The rising voltage was 1.67 V, the forward voltage was 2.47 V (@ forward current: 8 A), and the withstand voltage was 4.3 kV.
実施例１〜４における順方向及び逆方向の電流−電圧特性をまとめると、立ち上がり電圧：１.６７〜１.９３Ｖ、順方向電圧：２.４７〜３.０Ｖ（＠順方向電流：８Ａ）、耐圧：４.１〜４.５ｋＶ、であり、いずれも大電流化および高耐圧化に対応できていることが判った。 The forward-current and reverse-direction current-voltage characteristics in Examples 1 to 4 are summarized as follows: rising voltage: 1.67 to 1.93 V, forward voltage: 2.47 to 3.0 V (@ forward current: 8 A) , Withstand voltage: 4.1 to 4.5 kV, and it has been found that both can cope with a large current and a high withstand voltage.
本発明は、ショットキーバリアダイオードに用いられる。
The present invention is used for a Schottky barrier diode.
Claims (5)
The Schottky barrier diode according to claim 1, wherein the n − -GaN substrate is manufactured by any one of an HVPE method, a Na flux method, and an ammonothermal method.
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