JP2006196623A - Epitaxial substrate and semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor element having a structure which improves the backward withstanding voltage. <P>SOLUTION: A Schottky diode 11 comprises a p-type gallium nitride support substrate 13 having a first surface 13a and a second opposite surface 13b, and reveals a carrier concentration exceeding 1×10<SP>17</SP>cm<SP>-3</SP>. A p-type gallium nitride epitaxial layer 15 is provided on the first surface 13a. An ohmic electrode 17 is provided on the second surface 13b. A Schottky electrode 19 is provided on the p-type gallium nitride epitaxial layer 15 having a thickness D1 of 5-1000 micrometers and a carrier concentration of 1×10<SP>14</SP>to 1×10<SP>17</SP>cm<SP>-3</SP>. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an epitaxial substrate and a semiconductor device.

Non-Patent Document 1 describes a pin diode. The pin diode includes an epitaxial layer grown on a GaN free-standing substrate. The forward turn-on voltage is about 5 volts at a temperature of 300K. A thick film used as a GaN free-standing substrate is grown on an Al ₂ O ₃ substrate by a hydride vapor phase epitaxy (HVPE) method. This thick film is separated from the Al ₂ O ₃ substrate by laser beam irradiation to produce a GaN free-standing substrate. An undoped gallium nitride film having a thickness of 3 micrometers is grown on the GaN free-standing substrate by metal organic vapor phase epitaxy. Next, an Mg-doped gallium nitride film having a thickness of 0.3 micrometers is grown on the undoped gallium nitride film. The GaN free-standing substrate, the undoped gallium nitride film, and the Mg-doped gallium nitride film constitute a pin structure.

Non-Patent Document 2 describes the characteristics of a gallium nitride pn junction. First, a 2 micrometer-thick GaN film is formed on a c-plane sapphire substrate by metal organic vapor phase epitaxy using a SiO ₂ mask for LEO regrowth. The mask pattern has a stripe shape with openings of 5 micrometers at intervals of 45 micrometers. In LEO growth, gallium nitride grows vertically on the mask opening and overgrows on the mask in the horizontal direction. The height of the grown gallium nitride and the length of overgrowth are each about 8 micrometers. A pn junction diode is formed on the LEO gallium nitride portion. The pn junction diode includes an undoped n-type GaN film having a thickness of 1 micrometer and a magnesium-doped p-type GaN film having a thickness of 0.5 micrometers grown thereon. The size of the pn junction diode is 2 micrometers × 20 micrometers.
Y. Irokawa et. Al. Appl. Phys. Lett. Vol. 83, No. 11, 15 September 2003 P. Kozodoy et. Al. Appl. Phys. Lett. Vol. 73, No. 7, 17 August 1998

In the gallium nitride pn junction diode of Non-Patent Document 2, the reverse dislocation current is reduced in the low dislocation portion (10 ⁶ cm ⁻² or less) and the breakdown is reduced compared to the high dislocation portion (˜4 × 10 ⁸ cm ⁻² ). It shows that the voltage is improved. However, the device structure in this report is complicated, and it is practically impossible to fabricate a device at a low dislocation. The thickness of the GaN epitaxial layer of Non-Patent Document 1 is 3 micrometers, and does not have a sufficient thickness for the carrier concentration of 5 × 10 ¹⁶ cm ⁻³ . The reverse breakdown voltage of the pin diode of Non-Patent Document 1 is not sufficiently high.

  The breakdown mechanism of a nitride semiconductor device such as a diode is as follows. When the electric field strength at the Schottky junction or PN junction, which is the maximum electric field strength in the reverse bias state, exceeds a critical value, the reverse leakage current due to impact ionization increases rapidly. This is the breakdown phenomenon. Breakdown is ideal when the thickness of the epitaxial layer where the depletion layer extends is sufficiently thick and the depletion layer is in the epitaxial layer even when the electric field strength at the junction reaches a critical value. However, the thickness of the epitaxial layer is not sufficient with respect to the carrier concentration, and before the electric field strength at the junction reaches a critical value, the total thickness of the epitaxial layer is depleted and punch-through occurs. In this case, since the electric field strength at the junction reaches the critical value earlier, breakdown occurs earlier than in the ideal case. In addition, since the depletion layer extends to the epitaxial layer / substrate interface, the leakage current due to the imperfection of the interface may deteriorate the reverse direction characteristics and lower the breakdown voltage. Due to the above effects, the breakdown voltage is reduced when punch-through occurs.

  The present invention has been made in view of the above matters, and has an object to provide a semiconductor device having a structure capable of improving a breakdown voltage and including a group III compound semiconductor layer. An object is to provide an epitaxial substrate for a semiconductor device.

According to one aspect of the present invention, a semiconductor device including a group III nitride semiconductor layer. The semiconductor element has (a) a p-type Al _x Ga having a first surface and a second surface opposite to the first surface and having a carrier concentration exceeding 1 × 10 ¹⁷ cm ^−3. _A support substrate made of _1-xN (0 ≦ x ≦ 1), (b) a first group III nitride epitaxial layer provided on the first surface, and (c) on the second surface And (d) a Schottky electrode provided on the first group III nitride epitaxial layer, and the thickness of the first group III nitride epitaxial layer is 5 micrometers or more The carrier concentration of the first group III nitride epitaxial layer is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less, and the semiconductor element is a Schottky diode.

In this Schottky diode, the thickness of the first group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the first epitaxial layer is not less than 1 × 10 ¹⁴ cm ^{−3 and not} less than 1 × 10. Since it is ¹⁷ cm ⁻³ or less, breakdown without punch-through can be realized by the thickness of the epitaxial layer and the carrier concentration.

According to another aspect of the present invention, the semiconductor device includes a group III nitride semiconductor layer. This semiconductor element has (a) a p-type Al _x having a first surface and a second surface opposite to the first surface and having a carrier concentration exceeding 1 × 10 ¹⁷ cm ^−3. A support substrate made of Ga _1-x N (0 ≦ x ≦ 1), (b) a first III nitride epitaxial layer provided on the first surface, and (c) on the second surface (D) a second group III nitride epitaxial layer provided on the first group III nitride epitaxial layer and containing a p-type dopant; and (e) the second group III nitride epitaxial layer provided on the first group III nitride epitaxial layer. An ohmic electrode provided on the group III nitride epitaxial layer, and the thickness of the first group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers, and the first group III nitride The carrier concentration of the material epitaxial layer is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less, and the semiconductor element is a pn junction diode.

According to this pn junction diode, the thickness of the first group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the first group III nitride epitaxial layer is 1 × 10 ^14. Since it is not less than cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ , breakdown without punch-through can be realized by the thickness of this epitaxial layer and this carrier concentration.

According to still another aspect of the present invention, the semiconductor device includes a group III nitride semiconductor layer. The semiconductor element has (a) a p-type Al _x Ga having a first surface and a second surface opposite to the first surface and having a carrier concentration exceeding 1 × 10 ¹⁷ cm ^−3. _A support substrate made of _1-xN (0 ≦ x ≦ 1), (b) a first group III nitride epitaxial layer provided on the first surface, and (c) the first group III An n-type semiconductor region provided in the nitride epitaxial layer; (d) a p-type semiconductor region provided in the n-type semiconductor region; and (e) a source electrode provided on the p-type semiconductor region; (F) a drain electrode provided on the second surface; (g) an insulating layer provided on the first gallium nitride epitaxial layer; and (h) a gate provided on the insulating layer. And the thickness of the first group III nitride epitaxial layer is 5 micrometers or less. And 1000 micrometers or less, the carrier concentration of the first III nitride epitaxial layer is than 1 × ¹⁰ 14 ^{cm -3} 1 × ¹⁰ 17 ^{cm -3} or less, the semiconductor element is a MIS transistor.

This MIS transistor has a structure in which a current flows in a vertical direction from one of a source electrode provided on a p-type semiconductor region and a drain electrode provided on a second surface of the substrate. Since the thickness of the first epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the first epitaxial layer is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ , By the thickness of this epitaxial layer and this carrier concentration, breakdown without punch-through between the source and drain can be realized.

  In the semiconductor device according to the present invention, the n-type dopant in the n-type semiconductor region is preferably introduced by ion implantation. In the semiconductor device according to the present invention, it is preferable that the p-type dopant in the p-type semiconductor region is introduced by ion implantation.

According to still another aspect of the present invention, the semiconductor device includes a group III nitride semiconductor layer. The semiconductor element has (a) a p-type Al _x Ga having a first surface and a second surface opposite to the first surface and having a carrier concentration exceeding 1 × 10 ¹⁷ cm ^−3. _A support base made of _1-xN (0 ≦ x ≦ 1), (b) a first group III nitride epitaxial layer provided on the first surface and exhibiting n conductivity, and (c) the first A p-type semiconductor region provided in one group III nitride epitaxial layer, (d) an n-type semiconductor region provided in the p-type semiconductor region, and (e) provided on the n-type semiconductor region. An emitter electrode; (f) a collector electrode provided on the second surface; (g) an insulating layer provided on the first gallium nitride epitaxial layer; and (h) on the insulating layer. And the thickness of the first group III nitride epitaxial layer is 5 mils. And 1000 microns inclusive Rometoru, the carrier concentration of the first III nitride epitaxial layer is than 1 × ¹⁰ 14 ^{cm -3} 1 × ¹⁰ 17 ^{cm -3} or less, the semiconductor element is an insulated gate bipolar It is a transistor (IGBT).

This IGBT has a structure in which a current flows in a vertical direction from one of an emitter electrode provided on an n-type semiconductor region and a collector electrode provided on a second surface of a substrate. Since the thickness of the first epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the first epitaxial layer is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ , By the thickness of this epitaxial layer and this carrier concentration, breakdown without punch-through between the emitter and collector can be realized.

The semiconductor device of the present invention has a carrier concentration exceeding (a) 1 × 10 ¹⁷ cm ⁻³ , and has a first surface and a second surface opposite to the first surface. A group III nitride supporting base made of Al _x Ga _1-x N (0 ≦ x ≦ 1), and (b) a first group III nitride epitaxial layer provided on the first surface and exhibiting a p conductivity type (C) a second group III nitride epitaxial layer provided on the first group III nitride epitaxial layer and exhibiting an n conductivity type; and (d) in the first group III nitride epitaxial layer. A p-type semiconductor region provided; (e) an n-type semiconductor region provided in the p-type semiconductor region; (f) an emitter electrode provided on the n-type semiconductor region; and (g) the first And a collector electrode provided on the surface of (2), and (h) provided on the second group III nitride epitaxial film. An insulating layer; and (i) a gate electrode provided on the insulating layer, wherein the thickness of the second group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers. The group III nitride epitaxial layer has a carrier concentration of 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less, and the semiconductor element is a gate insulating bipolar transistor (IGBT).

This IGBT has a structure in which a current flows in a vertical direction from one of an emitter electrode provided on an n-type semiconductor region and a collector electrode provided on a second surface of a substrate. Since the thickness of the second epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the second epitaxial layer is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ , By the thickness of this epitaxial layer and this carrier concentration, breakdown without punch-through between the emitter and collector can be realized.

  In the semiconductor device according to the present invention, the p-type dopant in the p-type semiconductor region is preferably introduced by ion implantation. In the semiconductor device according to the present invention, the n-type dopant in the n-type semiconductor region is preferably introduced by ion implantation.

  In the semiconductor element according to the present invention, it is preferable that a plane orientation of the first surface of the support base is a (0001) plane. This provides a low dislocation group III nitride substrate.

In the semiconductor element according to the present invention, the plane orientation of the first surface of the support base is in the range of plus 5 degrees or less minus 5 degrees or more from one of the (1-100) plane and the (11-20) plane. Preferably there is.
According to this semiconductor element, dislocations in the epitaxial layer are reduced, the reverse leakage current is reduced, and the reverse breakdown voltage is improved.

In the semiconductor element according to the present invention, it is preferable that the dislocation density of the first surface of the support base is 1 × 10 ⁸ cm ⁻² or less.
According to this semiconductor element, since the dislocation density is small, dislocations in the epitaxial layer are reduced. Therefore, the reverse leakage current is reduced and the reverse breakdown voltage is improved.

In the semiconductor device according to the present invention, the first surface of the support base has a dislocation density higher than the dislocation density of the first area having a dislocation density of 1 × 10 ⁸ cm ⁻² or less and the first area. And a second area having
According to this semiconductor element, dislocations in the epitaxial layer formed on an area having a lower dislocation density are small. Therefore, the reverse leakage current of the semiconductor element is further reduced and the reverse breakdown voltage is improved.

According to one aspect of the present invention, an epitaxial substrate has (a) a first surface and a second surface opposite to the first surface, and the carrier exceeds 1 × 10 ¹⁷ cm ^−3. A free-standing substrate made of p-type Al _x Ga _1-x N (0 ≦ x ≦ 1) having a concentration, and (b) a first group III nitride epitaxial film provided on the first surface. And the thickness of the first group III nitride epitaxial film is 5 micrometers or more and 1000 micrometers or less, and the carrier concentration of the first epitaxial film is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 6 ¹⁷ cm ⁻³ or less.

According to this epitaxial substrate, the thickness of the first group III nitride epitaxial film is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the first group III nitride epitaxial film is 1 × 10 ¹⁴ cm. ^{Since it is −3} or more and 1 × 10 ¹⁷ cm ⁻³ or less, breakdown without punch-through can be realized by the thickness of the epitaxial layer and the carrier concentration. Therefore, an epitaxial substrate for a semiconductor device with improved breakdown voltage is provided.

  The epitaxial substrate of the present invention may further include a second group III nitride epitaxial film provided on the first group III nitride epitaxial film and containing an n-type dopant. According to this epitaxial substrate, an epitaxial substrate for a pn junction diode with improved breakdown voltage is provided. In the epitaxial substrate of the present invention, it is preferable that the n-type dopant is introduced by ion implantation or an n-type epitaxial layer is formed by metal organic vapor phase epitaxy.

The epitaxial substrate of the present invention includes (c) an n-type semiconductor region provided in the first group III nitride epitaxial film, and (d) a p-type semiconductor region provided in the n-type semiconductor region. It is preferable that the first group III nitride epitaxial film has p conductivity type.
According to this epitaxial substrate, an epitaxial substrate for a MIS transistor with improved breakdown voltage is provided.

The epitaxial substrate of the present invention includes (c) a p-type semiconductor region provided in the first group III nitride epitaxial film, and (d) an n-type semiconductor region provided in the p-type semiconductor region. It is preferable that the first group III nitride epitaxial film has an n conductivity type.
According to this epitaxial substrate, an epitaxial substrate for an insulated gate bipolar transistor that has an improved breakdown voltage and can be used with a large current is provided.

The epitaxial substrate of the present invention has (a) a p-type having a carrier concentration exceeding 1 × 10 ¹⁷ cm −3 and having a first surface and a second surface opposite to the first surface. A group III nitride free-standing substrate made of Al _x Ga _1-x N (0 ≦ x ≦ 1), (b) a first group III nitride epitaxial film provided on the first surface, and (c) ) A second group III nitride epitaxial film provided on the first group III nitride epitaxial film; and (d) a p-type semiconductor region provided in the second group III nitride epitaxial film. (E) an n-type semiconductor region provided in the p-type semiconductor region, and the thickness of the second group III nitride epitaxial film is not less than 5 micrometers and not more than 1000 micrometers, 2 group III nitride epitaxial film has a carrier concentration of 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less, the first group III nitride epitaxial film has a p conductivity type, and the second group III nitride epitaxial film has an n conductivity type. .

According to this epitaxial substrate, the thickness of the second group III nitride epitaxial film is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the second group III nitride epitaxial film is 1 × 10 ¹⁴ cm. ^{Since it is −3} or more and 1 × 10 ¹⁷ cm ⁻³ or less, breakdown without punch-through can be realized by the thickness of the epitaxial layer and the carrier concentration. Therefore, an epitaxial substrate for a semiconductor device with improved breakdown voltage is provided.

  In the epitaxial substrate of the present invention, the first III nitride epitaxial film is preferably grown by HVPE. Since the growth rate is fast, a thick epitaxial film can be provided within a practical time. On the other hand, in the epitaxial substrate of the present invention, the second group III nitride epitaxial film is preferably formed by a metal organic chemical vapor deposition method. According to this epitaxial substrate, a high quality epitaxial film is provided.

In the epitaxial substrate of the present invention, it is preferable that the plane orientation of the first surface of the self-standing substrate is a (0001) plane.
According to this epitaxial substrate, a low dislocation group III nitride substrate can be used.

In the epitaxial substrate of the present invention, the plane orientation of the first surface of the self-standing substrate is in the range of plus 5 degrees or less minus 5 degrees or more from either one of the (1-100) plane and the (11-20) plane. It is preferable that
According to this epitaxial substrate, there is provided an epitaxial substrate for a semiconductor device in which dislocations in the epitaxial layer are reduced, the reverse direction and leakage current are reduced, and the reverse breakdown voltage is improved.

In the epitaxial substrate of the present invention, it is preferable that the dislocation density of the first surface of the free-standing substrate is 1 × 10 ⁸ cm ⁻² or less.
According to this epitaxial substrate, since the dislocation density is small, dislocations in the epitaxial layer are reduced. Therefore, there is provided an epitaxial substrate for a semiconductor device in which the reverse leakage current is reduced and the reverse breakdown voltage is improved.

In the epitaxial substrate of the present invention, the first surface of the freestanding substrate has a dislocation density higher than the dislocation density of the first area having a dislocation density of 1 × 10 ⁸ cm ⁻² or less and the first area. It is preferable to include a second area.
According to this semiconductor element, when the semiconductor element is formed on an area having a lower dislocation density, the dislocations in the epitaxial layer are further reduced. Therefore, there is provided an epitaxial substrate for a semiconductor device in which the reverse leakage current is further reduced and the reverse breakdown voltage is improved.

  The above and other objects, features, and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

  As described above, according to the present invention, a group III nitride device having a structure capable of improving the reverse breakdown voltage is provided, and an epitaxial substrate for the semiconductor device is provided.

  The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Subsequently, embodiments of the semiconductor device and the epitaxial substrate according to the present invention will be described with reference to the accompanying drawings. Where possible, the same parts are denoted by the same reference numerals.

(First embodiment)
FIG. 1 is a drawing showing a group III nitride semiconductor device according to the first embodiment. This semiconductor element is a Schottky diode 11. The Schottky diode 11 includes a p-conductivity-type gallium nitride support base 13, a p-conductivity-type gallium nitride epitaxial layer 15, an ohmic electrode 17, and a Schottky electrode 19. The gallium nitride support base 13 has a first surface 13a and a second surface 13b opposite to the first surface, and exhibits a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ . The gallium nitride epitaxial layer 15 is provided on the first surface 13a. The ohmic electrode 17 is provided on the second surface 13b. The Schottky electrode 19 is provided on the gallium nitride epitaxial layer 15. The thickness D1 of the gallium nitride epitaxial layer 15 is not less than 5 micrometers and not more than 1000 micrometers. Further, the carrier concentration of the gallium nitride epitaxial layer 15 is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less. If the carrier concentration is 1 × 10 ¹⁴ cm ⁻³ or more, there is an advantage that the on-resistance can be reduced. If the carrier concentration is 1 × 10 ¹⁷ cm ⁻³ or less, there is an advantage that a large breakdown voltage can be obtained.

According to the Schottky diode 11, the thickness of the gallium nitride epitaxial layer 15 is 5 micrometers or more and 1000 micrometers or less, and the carrier concentration of the epitaxial layer 15 is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ^−. Since it is ³ or less, an ideal breakdown without punch-through can be realized by appropriately designing the thickness of the epitaxial layer and the carrier concentration. Therefore, breakdown of the Schottky diode 11 can be increased.
The carrier concentration of the gallium nitride substrate is greater than the carrier concentration of the epitaxial layer. As shown in FIG. 1, in the Schottky diode 11, the ohmic electrode 17 is provided on the entire second surface 13 b of the substrate 13. On the other hand, the Schottky electrode 19 is formed in a circular shape at a part of the surface of the epitaxial layer, for example, substantially at the center of the element. As the Schottky electrode 19, for example, Pt / Au can be used, but Ni may also be used. The gallium nitride support base 13 and the gallium nitride epitaxial layer 15 have p conductivity type. The gallium nitride epitaxial layer 15 is directly homoepitaxially grown on the gallium nitride support base 13. The thickness D2 of the gallium nitride support base 13 is preferably, for example, not less than 100 micrometers and not more than 700 micrometers.

Example 1
A (0001) plane GaN free-standing substrate prepared by the HVPE method is prepared. A Schottky diode is manufactured by the following procedure. The p-conductivity-type GaN free-standing substrate has a carrier concentration of 3 × 10 ¹⁷ cm ⁻³ and a thickness of 400 micrometers. The average dislocation density in this substrate is 5 × 10 ⁶ cm ⁻² . A p-conductivity type epitaxial film having a carrier concentration of 5 × 10 ¹⁵ cm ⁻³ and a thickness of 20 μm is grown on the GaN free-standing substrate by the HVPE method to produce an epitaxial substrate (hereinafter referred to as sample A). ). An ohmic electrode is formed on the back surface of the substrate, and a Schottky electrode is formed on the epitaxial film. After organic cleaning, an ohmic electrode is formed on the entire back surface of the substrate. In the formation of the ohmic electrode, Ni / Au (50 nm / 100 nm) is formed by resistance heating vapor deposition. After forming the ohmic electrode film, alloying is performed at 600 degrees Celsius for about 10 minutes. The Schottky electrode is made of Pt / Au (30 nm / 100 nm) by EB vapor deposition. The shape of the Schottky electrode is, for example, a circle having a diameter of 200 micrometers. Prior to forming each of the ohmic electrode and the Schottky electrode, the surface of the epitaxial film is treated for 1 minute at room temperature using an aqueous HCl solution (hydrochloric acid 1: pure water 1) before vapor deposition.
On the other hand, on another GaN free-standing substrate, an epitaxial film having a carrier concentration of 5 × 10 ¹⁵ cm ⁻³ and a thickness of 3 μm is grown by HVPE to produce an epitaxial substrate (hereinafter referred to as sample B) To do). An ohmic electrode and a Schottky electrode are formed in the same manner as described above.

FIG. 2 is a drawing showing IV characteristics of Sample A and Sample B. FIG. A characteristic curve C _A shows the characteristics of the sample A, and a characteristic curve C _B shows the characteristics of the sample B. FIG. 3A is a drawing for explaining the breakdown voltage of a Schottky diode having a thick epitaxial film, and FIG. 3B is a drawing for explaining the breakdown voltage of a Schottky diode having a thin epitaxial film. The reverse breakdown voltage of sample B is smaller than the reverse breakdown voltage of sample A. The reason for this is that in sample A, the thickness of the epitaxial layer is sufficiently thick, and as shown in FIG. 3A, the depletion layer DepA reaches the interface between the substrate and the epitaxial film as the applied voltage is increased. Prior to this, impact ionization occurs near the interface between the Schottky electrode and the epitaxial film, and a reverse leakage current thereby flows. This impact ionization determines the reverse breakdown voltage. In sample B, since the thickness of the epitaxial film is not sufficient, as shown in FIG. 3B, when the applied voltage is increased, the impact ionization occurs on the epi-surface under the Schottky electrode. Punch-through occurs when the depletion layer DepB reaches the interface between the substrate and the epitaxial film, and the reverse breakdown voltage decreases.

(Example 2)
A (0001) plane GaN free-standing substrate prepared by the HVPE method is prepared. The p-conductivity-type GaN free-standing substrate has a carrier concentration of 3 × 10 ¹⁷ cm ⁻³ and a thickness of 400 micrometers. The average dislocation density of this substrate is 5 × 10 ⁵ cm ⁻² . A p-conductivity type epitaxial film having a carrier concentration of 5 × 10 ¹⁵ cm ⁻³ and a thickness of 20 μm is grown on the GaN free-standing substrate by HVPE method to produce an epitaxial substrate (Sample C). Using this epitaxial substrate, a Schottky diode is manufactured using the same process as in the first embodiment.

FIG. 4 is a diagram showing the IV characteristics of Sample A and Sample C. A characteristic curve C _A shows the characteristics of the sample A, and a characteristic curve C _C shows the characteristics of the sample C. The average dislocation density in the GaN free-standing substrate of sample A is 5 × 10 ⁶ cm ⁻² , while the average dislocation density of the GaN free-standing substrate of sample C is 5 × 10 ⁵ cm ⁻² . The reverse breakdown voltage of sample C is higher than that of sample A. That is, it is considered that dislocations existing in the support base increase the reverse leakage current.

(Example 3)
A (1-100) plane GaN free-standing substrate prepared by the HVPE method is prepared. The p-conductivity-type GaN free-standing substrate has a carrier concentration of 3 × 10 ¹⁷ cm ⁻³ and a thickness of 400 micrometers. A p-conductivity type epitaxial film having a carrier concentration of 5 × 10 ¹⁵ cm ⁻³ and a thickness of 20 μm is grown on a GaN free-standing substrate by HVPE to produce an epitaxial substrate (hereinafter referred to as sample D) To do). Using this epitaxial substrate, a Schottky diode is manufactured using the same process as in the first embodiment.

FIG. 5 is a drawing showing the IV characteristics of Sample A and Sample D. In Figure 5, the characteristic curve C _A indicates the characteristics of the sample A, the characteristic curve C _D indicates the characteristics of the sample D. The GaN free-standing substrate of sample A has a (0001) plane, while the GaN free-standing substrate of sample D has a (1-100) plane, so that the reverse breakdown voltage of sample C is Compared to reverse breakdown voltage. That is, when the gallium nitride film on the (1-100) plane is epitaxially grown, threading dislocations in the [0001] direction do not occur. Therefore, this Schottky diode has very little leakage.

Example 4
A (0001) plane GaN free-standing substrate prepared by the HVPE method is prepared. The p-conductivity-type GaN free-standing substrate has a carrier concentration of 3 × 10 ¹⁷ cm ⁻³ and a thickness of 400 micrometers. On the GaN free-standing substrate, a p-conductivity type epitaxial film having a carrier concentration of 1 × 10 ¹⁷ cm ⁻³ and a thickness of 10, ⁵ , and ³ micrometers is grown by HVPE to produce an epitaxial substrate ( Referenced as samples E, F, G). Using these epitaxial substrates, a Schottky diode is manufactured using the same process as in the first embodiment.

FIG. 6 is a drawing showing the IV characteristics of the samples E, F, and G described above. 6 shows characteristic curves _{C E, C F, C G} is the sample E, F, G of the characteristics, respectively. Samples E and F show substantially the same reverse breakdown voltage, but the reverse breakdown voltage of sample G is smaller than that of samples E and F. In the sample G, when the applied voltage is increased, punch-through occurs in which the depletion layer in the epitaxial film reaches the interface between the substrate and the epitaxial film. Therefore, it is considered that the reverse breakdown voltage decreases. Therefore, an epitaxial film thickness of at least 5 micrometers is necessary.

In the drift layer (p− layer) of a power conversion device such as a Schottky diode, the carrier concentration is desirably 1 × 10 ¹⁷ cm ⁻³ or less in order to improve the breakdown voltage. In order not to cause punch-through, it is important to appropriately design the epitaxial thickness according to the carrier concentration. When the carrier concentration is 1 × 10 ¹⁷ cm ⁻³ , if the epitaxial film thickness is 5 micrometers or more, the epitaxial film thickness is sufficient for high breakdown voltage.

(Second Embodiment)
FIG. 7 is a drawing showing a semiconductor device including a group III nitride semiconductor layer according to the second embodiment. The semiconductor element is a pn junction diode 31. The pn junction diode 31 includes a p-conductivity-type gallium nitride support base 33, a p-conductivity-type first gallium nitride epitaxial layer 35, a first ohmic electrode 37, and an n-conductivity-type second gallium nitride epitaxial film. 39 and a second ohmic electrode 41. The gallium nitride support base 33 has a first surface 33a and a second surface 33b opposite to the first surface 33a, and exhibits a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ . The thickness of the first gallium nitride epitaxial layer 35 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the first gallium nitride epitaxial layer 35 is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm. ^-3 or less. The first gallium nitride epitaxial layer 35 is provided on the first surface 33a. The first ohmic electrode (for example, anode electrode) 37 is provided on the second surface 33b. The second gallium nitride epitaxial film 39 is provided on the first gallium nitride epitaxial layer 35 and contains an n-type dopant. The second ohmic electrode (for example, cathode electrode) 41 is provided on the second gallium nitride epitaxial film 39.

According to this pn junction diode 31, the thickness of the first gallium nitride epitaxial layer 35 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the first gallium nitride epitaxial layer 35 is 1 × 10 ¹⁴ cm. ^{Since it is −3} or more and 1 × 10 ¹⁷ cm ⁻³ or less, an ideal breakdown without punch-through can be realized by appropriately designing the thickness of the epitaxial layer and the carrier concentration.

The gallium nitride support base 33 and the first gallium nitride epitaxial layer 35 have p conductivity type, and the second gallium nitride epitaxial layer 39 has n conductivity type. The carrier concentration of the GaN free-standing substrate 33 is higher than the carrier concentration of the epitaxial layer 35. The carrier concentration of the first gallium nitride epitaxial layer 35 is lower than the carrier concentration of the second gallium nitride epitaxial film 39. Therefore, the depletion layer mainly extends to the first gallium nitride epitaxial layer 35. As the thickness and carrier concentration of the epitaxial layer 35, the same thickness and carrier concentration as those of the Schottky diode 11 according to the first embodiment can be used. The carrier concentration of the gallium nitride epitaxial layer 39 is preferably 1 × 10 ¹⁷ cm ⁻³ or more.

  In the pn junction diode 31, the ohmic (anode) electrode 37 is provided on the entire second surface 33 b of the substrate 33. For example, Ni / Au (50 nm / 100 nm) can be used as the material of the cathode electrode, and Ti / Al / Ti / Au (20 nm / 100 nm / 20 nm / 300 nm) can be used as the material of the cathode electrode. Can do. The first gallium nitride epitaxial layer 35 is homoepitaxially grown directly on the gallium nitride support substrate 33, and the second gallium nitride epitaxial layer 39 is directly homoepitaxially grown on the first gallium nitride epitaxial layer 35. The thickness of the first gallium nitride epitaxial layer 35 is preferably larger than the thickness of the second gallium nitride epitaxial layer 39. The thickness D3 of the second gallium nitride epitaxial layer is preferably not less than 0.1 micrometers and not more than 10 micrometers, for example.

(Example 5)
A (0001) plane GaN free-standing substrate prepared by the HVPE method is prepared. The carrier concentration of the GaN free-standing substrate is 3 × 10 ¹⁸ cm ⁻³ and the thickness is 400 micrometers. The dislocation density of this substrate is 5 × 10 ⁵ cm ⁻³ . A p-type epitaxial film having a carrier concentration of 5 × 10 ¹⁵ cm ⁻³ and a thickness of 20 μm is grown on the GaN free-standing substrate by the HVPE method to produce an epitaxial substrate. Further, an n-type GaN layer is continuously formed by metal organic vapor phase epitaxy to produce an epitaxial substrate including a PN junction. Si is doped with 5 × 10 ¹⁸ cm ^{−3 as a} dopant, and the thickness is 1 micrometer. The n-type ohmic electrode is a mesa-type surface with a depth of about 2 micrometers, dry-etched with Cl ₂ RIE, and then Ti / Al / Ti / Au (20 nm / 100 nm on the mesa). / 20nm / 300nm) is formed by EB vacuum deposition and heat treatment in nitrogen at 600 ° C. The n-type electrode shape is, for example, a circle having a diameter of 200 micrometers. The p-type ohmic electrode is formed by performing Ni / Au (50 nm / 100 nm) resistance heating vacuum deposition on the entire back surface of the substrate, followed by heat treatment at 700 ° C. in nitrogen for 1 minute (sample H). The IV characteristics of sample H are shown in FIG. This shows that a reverse breakdown voltage similar to that of sample C, which is a Schottky diode having the same structure, can be obtained.

(Third embodiment)
FIG. 9A is a drawing showing a transistor according to the third embodiment, and FIG. 9B is a drawing showing a cross section taken along the line II-II shown in FIG. 9A. It is. The group III nitride semiconductor MIS field effect transistor 51 includes a gallium nitride supporting base 53, a gallium nitride epitaxial layer 55, an n-type semiconductor region 57, a p-type semiconductor region 59, a source electrode 61, a drain electrode 63, And a gate electrode 65. The p-conductivity-type gallium nitride support base 53 has a first surface 53a and a second surface 53b opposite to the first surface 53a, and has a carrier concentration exceeding 1 × 10 ¹⁷ cm ^−3. Have The p conductivity type gallium nitride epitaxial layer 55 is provided on the first surface 53a. The n-type semiconductor region 57 is provided in the gallium nitride epitaxial layer 55. The p-type semiconductor region 59 is provided in the n-type semiconductor region 57. The source electrode 61 is provided on the highly doped p-type semiconductor region 59. The drain electrode 63 is provided on the second surface 53b. The gate electrode 65 is provided on an insulating layer 67 formed on the gallium nitride epitaxial layer 55. Under the gate electrode 65, an extension 57b of the n-type semiconductor region 57 is provided. As a material for the insulating layer, a silicon oxide film, a silicon oxynitride film, a silicon nitride film, alumina, aluminum nitride, AlGaN, or the like can be used. The thickness of the gallium nitride epitaxial layer 55 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the gallium nitride epitaxial layer 55 is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ .

The transistor 51 has a vertical structure in which current flows from one of the source electrode 61 provided on the p-type semiconductor region 59 and the drain electrode 63 provided on the second surface 53b of the substrate to the other. Since the thickness of the gallium nitride epitaxial layer 55 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the gallium nitride epitaxial layer 55 is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ , With an appropriate design of the epitaxial layer thickness and carrier concentration, an ideal breakdown without punch-through can be realized.

If an n-type semiconductor region is formed by ion implantation, there is an advantage that a planar semiconductor device having an n-conductivity type semiconductor in a selected region can be formed. For example, silicon or the like can be used as the n-type dopant. Further, if a p-type semiconductor region is formed by ion implantation, there is an advantage that a planar semiconductor element having a p-conductivity type semiconductor in a selected region can be formed. As the p-type dopant, for example, magnesium or the like can be used. The n-type semiconductor region 57 electrically isolates the p-type semiconductor region 59 from the p-type epitaxial layer 55. The n-type semiconductor region 57 has an extension portion 57b provided under the gate electrode insulating film. When a voltage is applied to the gate electrode 65, a p-type inversion layer is formed at the interface between the n-type region 57b and the insulating film, and carriers flow from the p-type semiconductor region 59 to the p-type epitaxial layer 55 through the inversion layer. The depth of the n-type semiconductor region 57 is preferably not less than 0.1 micrometers and not more than 3 micrometers. The carrier concentration of the surface portion of the n-type semiconductor region 57 is preferably 1 × 10 ¹⁷ cm ⁻³ or more. The depth of the p-type semiconductor region 59 is preferably 0.05 micrometers or more and 2 micrometers or less. The carrier concentration of the p-type semiconductor region 59 is preferably 5 × 10 ¹⁷ cm ⁻³ or more. As shown in FIG. 9A, each of the branches 65 a of the gate electrode 65 is located between the branches 61 a of the source electrode 61. The corners of the electrodes 61 and 65 are rounded to prevent breakdown.

(Fourth embodiment)
FIG. 10 shows a transistor according to the fourth embodiment. A group III nitride semiconductor insulated gate bipolar transistor (IGBT) 71a includes a p-conductivity-type gallium nitride support base 53, an n-conductivity-type gallium nitride epitaxial layer 73, a p-type semiconductor region 75, and an n-type semiconductor region 77. An emitter electrode 72, a collector electrode 74, and a gate electrode 65. The gallium nitride support base 53 has a first surface 53a and a second surface 53b opposite to the first surface 53a, and has a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ . The gallium nitride epitaxial layer 73 is provided on the first surface 53a. The p-type semiconductor region 75 is provided in the n-conductivity type gallium nitride epitaxial layer 73. The n-type semiconductor region 77 is provided in the p-type semiconductor region 75. The emitter electrode 72 is provided on the highly doped n-type semiconductor region 77. The collector electrode 74 is provided on the second surface 53b. The gate electrode 65 is provided on an insulating layer 67 formed on the gallium nitride epitaxial layer 73. Under the gate electrode 65, an extension 75b of the p-type semiconductor region 75 is provided. As a material for the insulating layer, a silicon oxide film, a silicon oxynitride film, a silicon nitride film, alumina, aluminum nitride, AlGaN, or the like can be used. The thickness of the gallium nitride epitaxial layer 73 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the gallium nitride epitaxial layer 73 is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ . Each branch of the gate electrode 65 is located between the branches of the emitter electrode 72. The corners of each electrode 72, 74 are preferably rounded to prevent breakdown.

Transistor 71a has a vertical structure in which current flows from emitter electrode 72 provided on n-type semiconductor region 77 to collector electrode 74 provided on second surface 53b of the substrate. Since the thickness of the gallium nitride epitaxial layer 73 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the gallium nitride epitaxial layer 73 is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ , With an appropriate design of the epitaxial layer thickness and carrier concentration, an ideal breakdown without punch-through can be realized.

If a p-type semiconductor region is formed by ion implantation, there is an advantage that a planar IGBT having a p-type semiconductor in a selected region can be formed. As the p-type dopant, for example, magnesium or the like can be used. Further, if an n-type semiconductor region is formed by ion implantation, there is an advantage that a planar-structure semiconductor element having an n-type semiconductor in a selected region can be formed. For example, silicon or the like can be used as the n-type dopant. The p-type semiconductor region 75 electrically isolates the n-type semiconductor region 77 from the n-type epitaxial layer 73. The p-type semiconductor region 75 has an extension 75b provided under the gate electrode insulating film. When a voltage is applied to the gate electrode 65, an n-type inversion layer is formed at the interface of the p-type region 75b with the insulating film, and carriers flow from the n-type semiconductor region 77 to the epitaxial layer 73 through the inversion layer. The depth of the p-type semiconductor region 75 is preferably not less than 0.1 micrometers and not more than 3 micrometers. The carrier concentration in the surface portion of the p-type semiconductor region 75 is preferably 1 × 10 ¹⁷ cm ⁻³ or more. The depth of the n-type semiconductor region 77 is preferably 0.05 micrometers or more and 2 micrometers or less. The carrier concentration of the n-type semiconductor region 77 is preferably 5 × 10 ¹⁷ cm ⁻³ or more.

(Fifth embodiment)
FIG. 11 shows a transistor according to the fifth embodiment. A group III nitride semiconductor insulated gate bipolar transistor (IGBT) 71b includes a p-conductivity-type gallium nitride support base 53, a p-conductivity-type gallium nitride epitaxial layer 52, an n-conductivity-type gallium nitride epitaxial layer 73, p A type semiconductor region 75, an n type semiconductor region 77, an emitter electrode 72, a collector electrode 74, and a gate electrode 65 are provided. The gallium nitride support base 53 has a first surface 53a and a second surface 53b opposite to the first surface 53a, and has a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ . The gallium nitride epitaxial layer 73 is provided on the first surface 53a. The p-type semiconductor region 75 is provided in the n-conductivity type gallium nitride epitaxial layer 73. The n-type semiconductor region 77 is provided in the p-type semiconductor region 75. The emitter electrode 72 is provided on the highly doped n-type semiconductor region 77. The collector electrode 74 is provided on the second surface 53b. The gate electrode 65 is provided on an insulating layer 67 formed on the gallium nitride epitaxial layer 73. Under the gate electrode 65, an extension 75b of the p-type semiconductor region 75 is provided. As a material for the insulating layer, a silicon oxide film, a silicon oxynitride film, a silicon nitride film, alumina, aluminum nitride, AlGaN, or the like can be used. The thickness of the gallium nitride epitaxial layer 73 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the gallium nitride epitaxial layer 73 is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ . Each branch of the gate electrode 65 is located between the branches of the emitter electrode 72. The corners of each electrode 72, 74 are preferably rounded to prevent breakdown. In this transistor 71b, since the pn junction of the p-conductivity type gallium nitride epitaxial layer 52 and the n-conductivity type gallium nitride epitaxial layer 73 is formed by epitaxial growth, a steep junction surface can be obtained. High breakdown voltage is possible.

In the semiconductor elements 11, 31, 51, 71a, 71b according to the first to fifth embodiments, it is preferable that the plane orientation of the first surface of the gallium nitride support base is the (0001) plane. This provides a low dislocation GaN substrate. Further, in the semiconductor elements 11, 31, 51, 71a, 71b, the plane orientation of the first surface of the gallium nitride supporting base is preferably the (1-100) plane or the (11-20) plane, and there is variation. Considering these, it is preferable that the angle is in the range of plus 5 degrees or less minus 5 degrees or more from any of these crystal faces. According to the semiconductor elements 11, 31, 51, 71a, 71b, dislocations in the epitaxial layer are reduced, the reverse leakage current is reduced, and the reverse breakdown voltage is improved. Further, in the semiconductor elements 11, 31, 51, 71a, 71b, it is preferable that the dislocation density of the first surface of the gallium nitride supporting base is 1 × 10 ⁸ cm ⁻² or less. According to the semiconductor elements 11, 31, 51, 71a and 71b, the dislocation density is small, so that the dislocations in the epitaxial layer are reduced. Therefore, the reverse leakage current is reduced and the reverse breakdown voltage is improved. Furthermore, in the semiconductor elements 11, 31, 51, 71a, 71b, the first surface of the gallium nitride supporting base has a first area with a dislocation density of 1 × 10 ⁸ cm ⁻² or less, And a second area having a dislocation density smaller than the dislocation density of the area. According to the semiconductor elements 11, 31, 51, 71a, and 71b, dislocations in the epitaxial layer are further reduced if the semiconductor elements are formed on an area having a lower dislocation density. Therefore, the reverse leakage current is further reduced and the reverse breakdown voltage is improved.

(Sixth embodiment)
FIG. 12A to FIG. 12C are drawings showing the fabrication of an epitaxial substrate according to the sixth embodiment. As shown in FIG. 12A, a p-conductive gallium nitride free-standing substrate 83 is prepared. The gallium nitride free-standing substrate 83 has a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ . As shown in FIG. 12B, the p conductive epitaxial film 85 is deposited on the first surface 83 a of the gallium nitride free-standing substrate 83. The thickness of the gallium nitride epitaxial film 85 is not less than 5 micrometers and not more than 1000 micrometers. The carrier concentration of the gallium nitride epitaxial film 85 is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less. Thereby, the epitaxial substrate 81 is obtained. By using this substrate, the semiconductor elements shown in the first and third embodiments can be manufactured. The gallium nitride epitaxial film 85 is preferably grown by the HVPE method.

As shown in FIG. 12C, a Schottky electrode film 87 is deposited on the surface of the epitaxial film 85 of the epitaxial substrate 81, and an ohmic electrode film 89 is deposited on the second surface 83 b of the substrate 83. The thickness of the gallium nitride epitaxial film 85 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the gallium nitride epitaxial film 85 is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ . When a voltage is applied between the Schottky electrode film 87 and the ohmic electrode film 89 by appropriately designing the thickness of the epitaxial layer and the carrier concentration, an ideal breakdown without punch-through can be realized. Therefore, an epitaxial substrate for a semiconductor device with improved breakdown voltage is provided.

  In the epitaxial substrate 81, an n-type semiconductor region may be formed in the gallium nitride epitaxial film 85, and a p-type semiconductor region may be formed in the n-type semiconductor region. As a result, an epitaxial substrate for a MIS transistor with improved breakdown voltage is provided.

  Further, instead of the epitaxial substrate 81 for the MIS transistor, an epitaxial substrate for the insulated gate bipolar transistor (IGBT) can be manufactured as follows. First, an n conductivity type gallium nitride epitaxial film is formed on a p conductivity type gallium nitride free-standing substrate 83. A p-type semiconductor region may be formed in the n-conductivity-type gallium nitride epitaxial film, and an n-type semiconductor region may be formed in the p-type semiconductor region. Further, a p-conductivity-type gallium nitride layer is formed on the p-type gallium nitride free-standing substrate 83, an n-conductivity-type gallium nitride epitaxial film is further formed thereon, and a p-type semiconductor region is formed in the n-conductivity-type gallium nitride epitaxial film. And an n-type semiconductor region may be formed in the p-type semiconductor region. As a result, an epitaxial substrate for IGBT with improved breakdown voltage is provided.

  FIG. 12D to FIG. 12G are drawings showing the fabrication of an epitaxial substrate. As shown in FIGS. 12D and 12E, an epitaxial substrate 81 is manufactured. As shown in FIG. 12F, an epitaxial substrate 91 is produced by depositing an n-type gallium nitride epitaxial film 93 on the epitaxial substrate 81. The gallium nitride epitaxial film 93 is preferably grown by metal organic vapor phase epitaxy. Since the carrier concentration of the n-type gallium nitride epitaxial film 93 is higher than the carrier concentration of the p-type gallium nitride epitaxial film 85, the depletion layer is mainly formed in the p-type gallium nitride epitaxial film 85.

As shown in FIG. 12G, an ohmic electrode film 95 is deposited on the epitaxial film 93 of the epitaxial substrate 91, and an ohmic electrode film 97 is deposited on the second surface 83 b of the substrate 83. The thickness of the gallium nitride epitaxial film 85 is not less than 5 micrometers and not more than 1000 micrometers, and the carrier concentration of the gallium nitride epitaxial film 85 is not less than 1 × 10 ¹⁴ cm ^{−3 and not} more than 1 × 10 ¹⁷ cm ⁻³ . When a voltage is applied between the ohmic electrode film 95 and the ohmic electrode film 97 by appropriately designing the thickness of the epitaxial layer and the carrier concentration, an ideal breakdown without punch-through can be realized. Therefore, an epitaxial substrate 91 for a semiconductor device with improved breakdown voltage is provided.

  In the above epitaxial substrates 81 and 91, if the epitaxial film 85 is grown by the HVPE method, a thick epitaxial film up to about 1000 micrometers can be grown within a practical time. On the other hand, in the epitaxial substrate 91, if the epitaxial film 93 is formed by metal organic vapor phase epitaxy, a high quality epitaxial film can be formed. In the epitaxial substrates 81 and 91, the plane orientation of the first surface 83a of the gallium nitride free-standing substrate 83 is preferably the (0001) plane (including a crystallographically equivalent plane). According to this epitaxial substrate, a low dislocation GaN free-standing substrate is provided. Further, in the epitaxial substrates 81 and 91, the plane orientation of the first surface 83a of the gallium nitride free-standing substrate 83 is (1-100) plane (including crystallographically equivalent plane) and (11-20) plane (crystal It is preferable that it is within a range of plus 5 degrees or less minus 5 degrees or more from one side (including a scientifically equivalent plane). According to the epitaxial substrates 81 and 91, dislocations in the epitaxial layer are reduced, the reverse direction and the leakage current are reduced, and the breakdown voltage in the reverse direction is improved.

FIG. 13A is a drawing showing one arrangement of a high dislocation region and a low dislocation region in a GaN free-standing substrate, and FIG. 13B shows another arrangement of a high dislocation region and a low dislocation region in a GaN free-standing substrate. FIG. The first surface 82a of the gallium nitride free-standing substrate 82 for the epitaxial substrates 81 and 91 has a first area where a high dislocation region 82c having a relatively large threading dislocation density appears and a relatively small threading dislocation density. And a second area where the low dislocation region 82d appears. The high dislocation region 82c is surrounded by the low dislocation region 82d, and on the first surface 82a, the first area is randomly distributed in a dot shape within the second area. The threading dislocation density as a whole is, for example, 1 × 10 ⁸ cm ⁻² or less. According to the epitaxial substrates 81 and 91, since the dislocation density is small, dislocations in the epitaxial layer are reduced. Therefore, the reverse leakage current is reduced and the reverse breakdown voltage is improved.

In addition, the first surface 84a of the gallium nitride free-standing substrate 84 in FIG. 13B has a first area where a high dislocation region 84c having a relatively high threading dislocation density appears and a low area having a relatively small threading dislocation density. And a second area where the dislocation region 84d appears. The low dislocation region 84d extends along the high dislocation region 84c. Therefore, the first area (stripe region) and the second area (stripe region) are alternately arranged on the first surface 84a. One low dislocation region 84d is separated from another low dislocation region 84d by a high dislocation region 84c. The threading dislocation density of the low dislocation region is 1 × 10 ⁸ cm ⁻² or less, and the penetration potential density of the second area is larger than the dislocation density of the first area, for example, 1 × 10 ⁸ cm ⁻² or more. If a semiconductor element is formed on an area having a lower dislocation density, dislocations in the epitaxial film are further reduced. Therefore, the reverse leakage current is further reduced and the reverse breakdown voltage is improved.

A high breakdown voltage semiconductor element using a gallium nitride semiconductor can have a higher reverse breakdown voltage and a lower forward on-resistance than a semiconductor element using a silicon semiconductor.
Further, when the Schottky diode and / or the PN diode are integrated on the same substrate as the insulated gate bipolar transistor using the p-type GaN substrate, the structure of the Schottky diode and / or the PN diode can be simplified.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. For example, although a normal-off type field effect transistor has been described, the present invention is not limited to this. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

FIG. 1 is a drawing showing a semiconductor device including a group III nitride semiconductor layer according to a first embodiment. FIG. 2 is a drawing showing the IV characteristics of Samples A and B described above. FIG. 3A is a drawing for explaining the breakdown voltage of a Schottky diode having a thick epitaxial film, and FIG. 3B is a drawing for explaining the breakdown voltage of a Schottky diode having a thin epitaxial film. FIG. 4 is a drawing showing the IV characteristics of Samples A and C described above. FIG. 5 is a drawing showing the IV characteristics of Samples A and C described above. FIG. 6 is a drawing showing the IV characteristics of Samples E, F, and G described above. FIG. 7 is a drawing showing a semiconductor device including a group III nitride semiconductor layer according to the second embodiment. FIG. 8 is a diagram showing IV characteristics of Sample H. FIG. 9A is a drawing showing a transistor according to the third embodiment, and FIG. 9B is a drawing showing a cross section taken along the line I-I shown in FIG. 9A. It is. FIG. 10 is a cross-sectional view of a transistor according to the fourth embodiment. FIG. 11 shows a transistor according to the fifth embodiment. FIG. 12A to FIG. 12C are drawings showing the fabrication of an epitaxial substrate according to the sixth embodiment. FIG. 12D to FIG. 12G are drawings showing the fabrication of an epitaxial substrate. FIG. 13A is a drawing showing one arrangement of a high dislocation region and a low dislocation region in a free-standing substrate, and FIG. 13B is a drawing showing another arrangement of a high dislocation region and a low dislocation region in a free-standing substrate. It is.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Schottky diode, 13 ... Gallium nitride support base, 15 ... Gallium nitride epitaxial layer, 17 ... Ohmic electrode, 19 ... Schottky electrode, 31 ... pn junction diode, 33 ... Gallium nitride support base, 35 ... 1st gallium nitride epitaxial Layer, 37 ... first ohmic electrode, 39 ... second gallium nitride epitaxial film, 41 ... second ohmic electrode, 51 ... III nitride semiconductor MIS type field effect transistor, 52 ... p-conductivity type gallium nitride epitaxial Layers 53... Gallium nitride support base 55. Gallium nitride epitaxial layers 57... N-type semiconductor region 59... P-type semiconductor region 61... Source electrode 63 63 Drain electrode 65 65 Gate electrode 71 a 71 b III Group nitride semiconductor IGBT 72, emitter electrode 73, nitride nitride Epitaxial layer, 74 ... collector electrode, 75 ... p-type semiconductor region, 77 ... n-type semiconductor region, 81 ... epitaxial substrate, 82 ... gallium nitride free-standing substrate, 83 ... group III nitride free-standing substrate, 84 ... gallium nitride free-standing substrate 85 ... Epitaxial film, 87 ... Schottky electrode film, 89 ... Ohmic electrode film, 91 ... Epitaxial substrate, 93 ... Gallium nitride epitaxial film, 95 ... Ohmic electrode film, 97 ... Ohmic electrode film

Claims (25)

P-type Al _x Ga _1-x N (0 ≦ 1) having a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ and having a first surface and a second surface opposite to the first surface. a group III nitride free-standing substrate comprising x ≦ 1);
A first group III nitride epitaxial film provided on the first surface;
The thickness of the first group III nitride epitaxial film is not less than 5 micrometers and not more than 1000 micrometers,
The epitaxial substrate in which the carrier concentration of the first group III nitride epitaxial film is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less. An n-type semiconductor region provided in the first group III nitride epitaxial film;
A p-type semiconductor region provided in the n-type semiconductor region,
2. The epitaxial substrate according to claim 1, wherein the first group III nitride epitaxial film has a p conductivity type. A p-type semiconductor region provided in the first group III nitride epitaxial film;
An n-type semiconductor region provided in the p-type semiconductor region,
2. The epitaxial substrate according to claim 1, wherein the first group III nitride epitaxial film has an n conductivity type. P-type Al _x Ga _1-x N (0 ≦ 1) having a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ and having a first surface and a second surface opposite to the first surface. a group III nitride free-standing substrate comprising x ≦ 1);
A first group III nitride epitaxial film provided on the first surface;
A second group III nitride epitaxial film provided on the first group III nitride epitaxial film;
A p-type semiconductor region provided in the second group III nitride epitaxial film;
An n-type semiconductor region provided in the p-type semiconductor region,
The first group III nitride epitaxial film has p conductivity type,
The second group III nitride epitaxial film has an n conductivity type,
The thickness of the second group III nitride epitaxial film is not less than 5 micrometers and not more than 1000 micrometers,
2. The epitaxial substrate according to claim 1, wherein a carrier concentration of the second group III nitride epitaxial film is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less.   The epitaxial substrate according to claim 1, further comprising a second group III nitride epitaxial film provided on the first group III nitride epitaxial film and containing an n-type dopant.   The epitaxial substrate according to claim 5, wherein the n-type dopant is introduced by ion implantation.   6. The epitaxial substrate according to claim 5, wherein the second group III nitride epitaxial film is formed by metal organic vapor phase epitaxy.   The epitaxial substrate according to any one of claims 1 to 7, wherein a surface orientation of the first surface of the group III nitride free-standing substrate is a (0001) plane.   The plane orientation of the first surface of the group III nitride free-standing substrate is in the range of plus 5 degrees or less minus 5 degrees or more from one of the (1-100) plane and the (11-20) plane. The epitaxial substrate according to any one of claims 1 to 7, wherein the epitaxial substrate is characterized. 10. The epitaxial according to claim 1, wherein a dislocation density in the first surface of the group III nitride free-standing substrate is 1 × 10 ⁸ cm ⁻² or less. substrate. The first surface of the group III nitride self-supporting substrate has a first area having a dislocation density of 1 × 10 ⁸ cm ⁻² or less and a second area having a dislocation density larger than the dislocation density of the first area. The epitaxial substrate according to any one of claims 1 to 9, wherein the epitaxial substrate includes:   The epitaxial substrate according to any one of claims 1 to 11, wherein the first group III nitride epitaxial film is grown by an HVPE method. A semiconductor device including a group III nitride semiconductor layer,
P-type Al _x Ga _1-x N (0 ≦ 1) having a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ and having a first surface and a second surface opposite to the first surface. a group III nitride support substrate consisting of x ≦ 1);
A first group III nitride epitaxial layer provided on the first surface;
An ohmic electrode provided on the second surface;
A Schottky electrode provided on the first group III nitride epitaxial layer,
The thickness of the first group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers,
The carrier concentration of the first group III nitride epitaxial layer is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less,
The semiconductor element is a Schottky diode. A semiconductor device including a group III nitride semiconductor layer,
P-type Al _x Ga _1-x N (0 ≦ 1) having a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ and having a first surface and a second surface opposite to the first surface. a group III nitride support substrate consisting of x ≦ 1);
A first group III nitride epitaxial layer provided on the first surface;
An ohmic electrode provided on the second surface;
A second Group III nitride epitaxial layer provided on the first Group III nitride epitaxial layer and comprising an n-type dopant;
An ohmic electrode provided on the second group III nitride epitaxial layer,
The thickness of the first group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers,
The carrier concentration of the first group III nitride epitaxial layer is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less,
The semiconductor element is a pn junction diode. A semiconductor device including a group III nitride semiconductor layer,
A p-type Al _x Ga _1-x N (0 ≦ 0) having a first surface and a second surface opposite to the first surface and having a carrier concentration exceeding 1 × 10 ¹⁷ cm ^−3. a group III nitride support substrate consisting of x ≦ 1);
A first group III nitride epitaxial layer provided on the first surface;
An n-type semiconductor region provided in the first group III nitride epitaxial layer;
A p-type semiconductor region provided in the n-type semiconductor region;
A source electrode provided on the p-type semiconductor region;
A drain electrode provided on the second surface;
An insulating layer provided on the first group III nitride epitaxial film;
A gate electrode provided on the insulating layer,
The thickness of the first group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers,
The carrier concentration of the first group III nitride epitaxial layer is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less,
The semiconductor element is a MIS transistor.   The semiconductor element according to claim 15, wherein the n-type dopant in the n-type semiconductor region is introduced by ion implantation.   17. The semiconductor device according to claim 15, wherein the p-type dopant in the p-type semiconductor region is introduced by ion implantation. A semiconductor device including a group III nitride semiconductor layer,
P-type Al _x Ga _1-x N (0 ≦ 1) having a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ and having a first surface and a second surface opposite to the first surface. a group III nitride support substrate consisting of x ≦ 1);
A first group III nitride epitaxial layer provided on the first surface and exhibiting n conductivity type;
A p-type semiconductor region provided in the first group III nitride epitaxial layer;
An n-type semiconductor region provided in the p-type semiconductor region;
An emitter electrode provided on the n-type semiconductor region;
A collector electrode provided on the second surface;
An insulating layer provided on the first group III nitride epitaxial film;
A gate electrode provided on the insulating layer,
The thickness of the first group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers,
The carrier concentration of the first group III nitride epitaxial layer is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less,
The semiconductor element is a gate insulating bipolar transistor. A semiconductor device including a group III nitride semiconductor layer,
P-type Al _x Ga _1-x N (0 ≦ 1) having a carrier concentration exceeding 1 × 10 ¹⁷ cm ⁻³ and having a first surface and a second surface opposite to the first surface. a group III nitride support substrate consisting of x ≦ 1);
A first group III nitride epitaxial layer provided on the first surface and exhibiting p conductivity type;
A second group III nitride epitaxial layer provided on the first group III nitride epitaxial layer and exhibiting an n conductivity type;
A p-type semiconductor region provided in the first group III nitride epitaxial layer;
An n-type semiconductor region provided in the p-type semiconductor region;
An emitter electrode provided on the n-type semiconductor region;
A collector electrode provided on the second surface;
An insulating layer provided on the second group III nitride epitaxial film;
A gate electrode provided on the insulating layer,
The thickness of the second group III nitride epitaxial layer is not less than 5 micrometers and not more than 1000 micrometers,
The carrier concentration of the second group III nitride epitaxial layer is 1 × 10 ¹⁴ cm ⁻³ or more and 1 × 10 ¹⁷ cm ⁻³ or less,
The semiconductor element is a gate insulating bipolar transistor.   20. The semiconductor device according to claim 18, wherein the p-type dopant in the p-type semiconductor region is introduced by ion implantation.   The semiconductor element according to claim 18, wherein the n-type dopant in the n-type semiconductor region is introduced by ion implantation.   The semiconductor element according to any one of claims 13 to 21, wherein a plane orientation of the first surface of the support base is a (0001) plane.   The plane orientation of the first surface of the support base is in the range of plus 5 degrees or less minus 5 degrees or more from either one of the (1-100) plane and the (11-20) plane. The semiconductor device according to any one of claims 13 to 21. 24. The semiconductor element according to claim 13, wherein a dislocation density of the first surface of the support base is 1 × 10 ⁸ cm ⁻² or less. The first surface of the support substrate includes a first area having a dislocation density of 1 × 10 ⁸ cm ⁻² or less and a second area having a dislocation density larger than the dislocation density of the first area. The semiconductor device according to claim 13, wherein the semiconductor device is included.

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