JP2016054221A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an art to suppress a load applied to a semiconductor device in order to reduce a thickness of a layer of a grease while employing a grease having a high viscosity degree between a power card and a cooling member in a semiconductor device in which the grease is applied to a clearance between the power card and the cooling member.SOLUTION: In a semiconductor device 2 disclosed in the present specification, two types of greases having viscosity degrees different from each other is sandwiched between a power card 10 and an insulating plate 6 (cooling member). When viewed from a lamination direction of the power card and the cooling member, a first grease 9a is applied to a region which overlaps a semiconductor element. And a second grease 9b having viscosity degree lower than that of the first grease is applied to surround the first grease 9a. By reducing a region where the first grease 9a having a higher viscosity degree is applied, a load required to reduce a thickness of the grease can be suppressed.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a semiconductor device. In particular, the present invention relates to a semiconductor device in which a power card in which a semiconductor element is sealed is in contact with a cooling member with grease and a load is applied in the stacking direction of the power card and the cooling member.

  The above-described type of semiconductor device has high cooling performance for semiconductor elements, and is used, for example, in an inverter of a drive system of an electric vehicle. An example of such a semiconductor device is disclosed in Patent Document 1.

  In the semiconductor device of Patent Document 1, a power card and a cooler (cooling member) are stacked with grease interposed therebetween. Each of the power card and the cooler is a flat plate type, and is held in such a posture that the normal line of the wide surface faces the horizontal direction. In order to prevent grease from dripping from between the power card and the cooler, a ridge extending in the horizontal direction is provided below the surface of the power card. In general, the outflow of grease from between the power card and the cooling member may be expressed as “the grease comes off”. Such expressions are also used herein.

Japanese Patent Application Laid-Open No. 2014-075537

  Gravity is not the only cause for grease to fall between the power card and the cooling member. The thinner the grease layer, the greater the cooling capacity for the power card. Therefore, a load is applied to the laminate of the power card and the cooling member in the lamination direction, and the grease layer is thinly extended. The grease thickness (gap width between the power card and the cooling member) is preferably 100 microns or less. When the gap width is in the micron order, there is a risk that the grease may come off due to a phenomenon called pumping or bleed out that occurs due to repeated heat generation and cooling (thermal cycle) of the semiconductor element.

  Pumping is a phenomenon in which the gap width between the power card and the cooling member is locally reduced or restored due to thermal deformation of the power card. When the gap width is narrowed, the grease is pushed out from the gap between the power card and the cooling member, and the grease is sucked into the gap when the gap width returns. When the gap width returns, some of the grease breaks away from the grease mass and does not return to its original position, but air enters the area. Bleed-out is a phenomenon in which grease is removed from the gap between the power card and the cooling member due to thermal expansion and contraction of the grease itself. When the expanded grease contracts, some of the grease breaks away from the grease mass and does not return to its original position, and air enters the area. Air has a lower thermal conductivity coefficient than grease. In addition, pumping and bleed-out are particularly prominent in the vicinity of the semiconductor element that is a heat source. Therefore, the air gradually spreads between the power card and the cooling member as the heat cycle accumulates, and the cooling performance for the power card (semiconductor element) decreases.

  By adopting high-viscosity grease, it is possible to suppress the loss of grease due to pumping or bleed-out. This is because grease with high viscosity is difficult to break. On the other hand, when grease with high viscosity is employed, it is necessary to increase the load for narrowing the gap width between the power card and the cooling member to a predetermined value. When the load is increased, the time (manufacturing time) required to narrow the gap width to a predetermined value becomes longer. Further, when the load is increased, a high load is applied to the power card and the cooling member. The present specification provides a technique for suppressing a load applied to a semiconductor device in order to reduce the thickness of a grease layer to a predetermined value while adopting grease having high viscosity between a power card and a cooling member.

  In the semiconductor device disclosed in this specification, a high-viscosity grease is applied to a region where a large amount of heat is received from a semiconductor element that generates heat, and the periphery is surrounded by a low-viscosity grease. More specifically, the first grease is applied to a region between the power card and the cooling member that overlaps the semiconductor element when viewed from the stacking direction, and the second grease is applied so as to surround the first grease. To do. As the second grease, a grease having a lower viscosity than the first grease is employed. By adopting grease having a high viscosity (first grease) in a region where the amount of heat received is large and pumping or bleed-out is noticeable, it becomes difficult to break the grease when it returns to its original position. That is, it becomes difficult to remove the grease. When viewed from the stacking direction, the further away from the heat source (semiconductor element), the smaller the temperature change in the thermal cycle and the smaller the amount of grease movement. Therefore, even if the viscosity of the grease is low, pumping and bleed out hardly occur. And since the high-viscosity grease (first grease) is used only in a part of the area, and the low-viscosity grease (second grease) is used around it, the gap width between the power card and the cooling member is reduced to a predetermined value. The load required for narrowing is not so large.

  When a plurality of semiconductor elements are sealed in the power card, it is not necessary to apply the first grease to a region overlapping each other in the stacking direction. It is also preferable to apply the first grease to a region overlapping in the stacking direction with respect to one (or several) semiconductor elements having a large calorific value among the plurality of semiconductor elements. Details and further improvements of the technology disclosed in this specification will be described in the following “DETAILED DESCRIPTION”.

It is a perspective view of the semiconductor device of an Example. It is the perspective view which looked at the power card from the back. It is sectional drawing of the semiconductor device cut | disconnected by XY plane in the coordinate system of FIG. It is sectional drawing of the semiconductor device cut | disconnected by the XZ plane in the coordinate system of FIG. It is a front view of a power card. It is a reverse view of a power card. It is a front view of the power card in 2nd Example. It is a reverse view of the power card in 2nd Example. It is a front view of the power card in 3rd Example. It is a front view of the power card in 4th Example. It is sectional drawing of the semiconductor device of 4th Example. It is a front view of the power card in 5th Example. It is sectional drawing of the semiconductor device of 5th Example.

  (First Embodiment) A semiconductor device according to an embodiment will be described with reference to the drawings. FIG. 1 is a perspective view of a semiconductor device 2 according to the first embodiment. The semiconductor device 2 is a unit in which a plurality of power cards 10 and a plurality of coolers 3 are stacked. In FIG. 1, reference numeral 10 is given to only one power card, and reference numerals are omitted for the other power cards. Similarly, reference numeral 3 is given to only one cooler, and reference numerals are omitted for the other coolers. In addition, the case 31 for housing the semiconductor device 2 is drawn with imaginary lines so that the entire semiconductor device 2 can be seen. In addition, although grease is apply | coated between the power card 10 and the insulating board 6, and between the insulating board 6 and the cooler 3, illustration of grease is abbreviate | omitted in FIG. 1 and FIG.

  One power card 10 accommodates four semiconductor elements. Specifically, the four semiconductor elements are two transistors Ta and Tb and two diodes Da and Db. The internal structure of the power card 10 will be described in detail later. The semiconductor element is cooled by the refrigerant passing through the cooler 3. The refrigerant is a liquid, typically water.

  The power card 10 and the cooler 3 are both flat plate types, and are laminated so that the flat surfaces having the largest areas face each other among the plurality of side surfaces. The power card 10 and the cooler 3 are alternately stacked, and coolers are located at both ends in the stacking direction of the units. An insulating plate 6 is sandwiched between the power card 10 and the cooler 3. Each power card 10 is opposed to the cooler 3 on both sides of the power card 10 with the insulating plate 6 interposed therebetween.

  The plurality of coolers 3 are connected by connecting pipes 5a and 5b. A refrigerant supply pipe 4a and a refrigerant discharge pipe 4b are connected to the cooler 3 at one end in the stacking direction. The refrigerant supplied through the refrigerant supply pipe 4a is distributed to all the coolers 3 through the connection pipe 5a. The refrigerant absorbs heat from the adjacent power card 10 while passing through each cooler 3. The refrigerant passing through each cooler 3 passes through the connecting pipe 5b and is discharged from the refrigerant discharge pipe 4b.

  When the semiconductor device 2 is accommodated in the case 31, a leaf spring 32 is inserted on one end side in the stacking direction. Due to the leaf spring 32, a load is applied to the laminated unit of the power card 10, the insulating plate 6, and the cooler 3 from both sides in the lamination direction. The load is, for example, 3 [kN]. As will be described later, grease is applied between the insulating plate 6 and the power card 10, but a high load of 3 [kN] stretches the grease layer thinly to improve the heat transfer efficiency from the power card 10 to the cooler 3. Increase. The power card 10 is directly deprived of heat by the insulating plate 6. Therefore, the insulating plate 6 corresponds to a cooling member. In the semiconductor device 2, an insulating plate 6 (cooling member) is in contact with a power card 10 containing semiconductor elements (two transistors Ta and Tb and two diodes Da and Db) with grease interposed therebetween. In this device, a load is applied in the stacking direction so that 10 and the insulating plate 6 are in close contact with each other.

  The power card 10 will be described. In the power card 10, the heat radiating plates 16 a and 16 b are exposed on one flat surface 10 a facing the insulating plate 6. For convenience of explanation, the flat surface 10 a is referred to as the front surface of the power card 10. FIG. 2 shows a view of the power card 10 as seen from the back surface (negative direction of the X axis). Another heat radiating plate 17 is exposed on the flat surface 10b opposite to the flat surface 10a. Another insulating plate 6 is in contact with the flat surface 10b with grease interposed therebetween, and another cooler 3 is in contact with the insulating plate 6 with the grease interposed therebetween. The power card 10 is in contact with the insulating plate 6 on both sides of the power card 10 with grease, and each insulating plate 6 is in contact with the cooler 3 with the grease interposed therebetween. Three electrode terminals 7a, 7b, and 7c extend from the upper surface of the power card 10 (the surface facing the positive direction of the Z-axis in the figure), and from the lower surface (the surface facing the negative direction of the Z-axis direction in the figure). The control terminal 29 is extended.

  From here, the internal structure of the power card 10 will be described with reference to FIGS. 3 and 4 together with FIGS. FIG. 3 is a cross-sectional view of the power card 10 of FIG. 1 cut along a plane parallel to the XY plane of the coordinate system in the drawing and across the transistors Ta and Tb. FIG. 4 is a cross-sectional view of the power card 10 of FIG. 1 cut along a plane parallel to the XZ plane of the coordinate system in the drawing, and is a cross-sectional view cut along a plane crossing the transistor Ta and the diode Da. In other words, FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 3, and FIG. 3 is a cross-sectional view taken along line III-III in FIG.

  The four semiconductor elements (transistors Ta and Tb, diodes Da and Db) are sealed in a resin casing 13. The housing 13 seals the semiconductor element by injection molding. Each semiconductor element is a flat chip, and is arranged so that the flat surface is parallel to the flat surface of the housing 13 (the flat surfaces 10a and 10b of the power card 10). Hereinafter, the flat surfaces 10 a and 10 b of the power card 10 may be referred to as the flat surfaces 10 a and 10 b of the housing 13.

  The collector electrode is exposed on one flat surface of the chip of the transistor Ta (Tb), and the emitter electrode is exposed on the other flat surface. The gate of the transistor Ta (Tb) is provided at the end of one flat surface of the chip. The electrode on one flat surface of the transistor Ta is joined to the back surface of the heat radiating plate 16 a by solder 15. The front surface of the heat radiating plate 16 a is exposed on the surface of the housing 13. The electrode on the other flat surface of the transistor Ta is bonded to the back surface of the heat sink 17 via the solder 15 and the conductive member (spacer 14). The front surface of the heat radiating plate 17 is exposed on the surface of the housing 13. A gate is located at the end of the other flat surface of the transistor Ta, and the gate is connected to the control terminal 29 via a wire. In FIG. 4, the wires are drawn in broken lines. The transistor Tb has a similar structure.

  As well shown in FIG. 4, the heat sink 16a is a part of the electrode terminal 7a. An extending portion extends from the side edge of the heat radiating plate 16a inside the housing. The extending portion passes through the inside of the housing 13 and faces the upper surface of the housing 13 (in the positive Z-axis direction of the coordinate system in the drawing). Surface) to the outside. That is, in the electrode terminal 7a for connecting the electrode of the transistor Ta to another external device, a portion exposed to the flat surface 10a of the housing 13 corresponds to the heat radiating plate 16a. Since the electrode terminal 7a is in contact with the electrode of the transistor Ta, it easily conducts heat inside the transistor Ta. Since part of the electrode terminal 7a is exposed as the heat sink 16a from the housing 13, the heat inside the transistor Ta is well transmitted to the heat sink 16a. On the other hand, since the cooler 3 is made of aluminum (conductive metal), it is necessary to insulate it from the heat sink 16a. Therefore, the semiconductor device 2 has the insulating plate 6 sandwiched between the cooler 3 and the heat radiating plate 16a (power card 10). The insulating plate 6 is made of ceramic that is thin, highly insulating, and has good conductivity. The heat sink 16a (electrode terminal 7a) is made of copper having excellent conductivity and heat conductivity. The spacer 14 is also made of copper having excellent conductivity and heat conductivity.

  The diodes Da and Db are also flat chips, with the anode electrode exposed on one flat surface and the cathode electrode exposed on the other flat surface. The electrode exposed on one flat surface of the diode Da is also connected to the back surface of the heat radiating plate 16a via the solder 15 like the transistor Ta. The electrode on the other surface of the transistor Ta is connected to the back surface of the heat radiating plate 17 (the surface facing the housing) via the solder 15 and the spacer 14. The electrode on the other surface of the diode Da is also connected to the back surface of the heat sink 17 via the solder 15 and the spacer 14. That is, the transistor Ta and the diode Da are connected in parallel (reverse parallel) between the heat sink 16a (that is, the electrode terminal 7a) and the heat sink 17. The heat sink 17 is also a part of the electrode terminal 7c like the heat sink 16a.

  The set of the transistor Tb and the diode Db has the same structure as the set of the transistor Ta and the diode Da. The electrodes on one surface of the transistor Ta and the diode Db are connected to the back surface of the heat sink 16b via the solder 15, and the electrodes on the other surface are connected to the back surface of the heat sink 17 via the solder 15 and the spacer 14. ing. The transistor Ta and the diode Db are also connected in parallel (reverse parallel) inside the housing 13. The heat sink 16b is also a part of the electrode terminal 7b like the heat sink 16a.

  The heat sinks 16a and 16b are exposed on one flat surface 10a of the maximum area of the flat power card 10 (housing 13), and the heat sink 17 has a maximum area of the power card 10 (housing 13). It is exposed on the other flat surface 10b. As well shown in FIGS. 3 and 4, two types of grease (first grease 9 a and second grease 9 b) are applied between the insulating plate 6 and the power card 10. A second grease 9b is applied between the insulating plate 6 and the cooler 3.

  I will explain grease. The first grease 9a and the second grease 9b have different viscosities. The viscosity of the first grease is higher than the viscosity of the second grease. The effect of the difference in viscosity will be described later. FIG. 5 shows a front view of the power card 10, and FIG. 6 shows a back view of the power card 10. 5 is a diagram of the power card 10 viewed from the positive direction of the X axis, and FIG. 6 is a diagram of the power card 10 viewed from the negative direction of the X axis. 5 and 6, the insulating plate 6 is represented by a virtual line. The first grease 9a is applied to a region overlapping the transistor Ta and a region overlapping the transistor Tb when viewed from the stacking direction of the power card 10 and the insulating plate 6 (X-axis direction in the drawing). Since the heat sink 16a (16b) is positioned so as to overlap the transistor Ta (Tb) when viewed from the stacking direction, the region where the first grease 9a is applied is viewed from the stack direction. (16b) also overlaps. Moreover, since the heat sink 17 on the back surface is also positioned so as to overlap with the transistors Ta and Tb when viewed from the stacking direction, the first grease 9a also overlaps with the heat sink 17 when viewed from the stack direction. The second grease 9b is applied so as to surround the first grease 9a when viewed from the stacking direction. When viewed from the stacking direction, the area where the first grease 9a is applied and the area where the second grease 9b is applied are in contact with each other. In other words, there is no air between the area where the first grease 9a is applied and the area where the second grease 9b is applied when viewed from the stacking direction.

  The effect by the difference in viscosity of grease will be described. The greases 9a and 9b are applied to increase the heat transfer coefficient between the power card 10 (heat radiation plates 16a, 16b, and 17) and the insulating plate 6 and the heat transfer coefficient between the insulating plate 6 and the cooler 3. ing. Hereinafter, a description will be given by taking the space between the heat sink 17 and the insulating plate 6 as an example. From the viewpoint of heat transfer efficiency, the grease layer should be as thin as possible. The thickness of the grease layer is preferably 100 microns or less. On the other hand, when the thickness of the grease layer is small, grease missing due to a phenomenon such as pumping or bleed-out occurs as the thermal cycle (repetition of heat generation and cooling) of the transistor Ta (Tb) is accumulated. It is better to use high-viscosity grease in order to suppress the loss of grease. This is because the lump of grease is difficult to break. However, when the viscosity of the grease is high, it is necessary to apply a high load in the stacking direction in order to reduce the thickness of the grease layer to a predetermined value. A high load increases the load applied to the power card 10, the insulating plate 6, and the cooler 3. In addition, it takes a long time to reduce the thickness of the grease to a predetermined value. That is, the manufacturing time of the semiconductor device 2 becomes long. Therefore, in the semiconductor device 2 of the embodiment, the region overlapping the transistors Ta and Tb when viewed from the stacking direction (that is, the region where the amount of heat received from the transistor in each of the heat sinks 16a, 16b, and 17) has a viscosity. The high 1st grease 9a is apply | coated and the 2nd grease 9b whose viscosity is lower than the 1st grease 9a is apply | coated to the circumference | surroundings. The area | region of the 1st grease 9a and the area | region of the 2nd grease 9b are in contact, and air does not enter between both.

  In areas where the influence of pumping or bleed out is large (area where the amount of heat received from the semiconductor element is large), countermeasures against pumping or bleed out are taken with the first grease 9a. Further, since the amount of heat received per unit area of the heat sinks 16a, 16b, 17 decreases as the distance from the transistors Ta, Tb as viewed from the stacking direction, the second grease 9b is applied to such regions. Thus, by using two types of grease having different viscosities, the load required to reduce the thickness of the entire grease layer is suppressed. As shown in FIGS. 5 and 6, in this embodiment, the second grease 9b is applied instead of the first grease 9a at the position overlapping the diodes Da and Db in the stacking direction. This is because the amount of heat generated by the diodes Da and Db is not as great as that of the transistors Ta and Tb, and the second grease 9b having a low viscosity is difficult to cause the grease to escape.

  The viscosity of the first grease 9a is, for example, 800 [Pa · s], and the viscosity of the second grease 9b is, for example, 200 [Pa · s]. In addition, between the insulating board 6 and the cooler 3, the 2nd grease 9b with a low viscosity is apply | coated. This is because the space between the insulating plate 6 and the cooler 3 is not as high as that of the regions facing the transistors Ta and Tb of the radiator plates 16a, 16b, and 17.

  (Second Embodiment) A semiconductor device according to a second embodiment will be described. The semiconductor device of the second embodiment is only different from the first embodiment in the aspect of grease. Therefore, description of the entire semiconductor device is omitted. FIG. 7 shows a front view of the power card 10 in the second embodiment, and FIG. 8 shows a back view of the power card 10. As in FIGS. 5 and 6, the insulating plate 6 is drawn with imaginary lines.

  In the semiconductor device of the second embodiment, the first grease 9a is applied not only to the transistors Ta and Tb sealed in the power card 10, but also to the positions facing the diodes Da and Db. That is, the first grease 9a is applied to the regions overlapping the transistors Ta and Tb and the diodes Da and Db when viewed from the power card 10 and the insulating plate stacking direction. The second grease 9b is applied so as to surround. In this embodiment, the amount of heat generated by the diodes Da and Db is larger than that of the diode of the first embodiment, and there is a risk that grease will be lost. Therefore, in this embodiment, the first grease 9a is applied also to the region overlapping with the diodes Da and Db to prevent the grease from being lost. Further, when viewed from the stacking direction, the centroid of the region obtained by adding all the regions to which the first grease 9a is applied coincides with the centroid of the region to which the second grease 9b is applied. In the case of the present embodiment, the centroids of the first grease region and the second grease region on each surface of the flat surfaces 10 a and 10 b coincide with the rectangular center G of the insulating plate 6. The centroid is a value obtained by dividing the first moment of section by the entire area, and intuitively is the center of the figure. Since the first grease 9a and the second grease 9b have different viscosities, the area of the first grease 9a and the area of the second grease 9b are applied when a load is applied to the laminated body of the power card 10 and the insulating plate 6 in the laminating direction. The magnitude of the reaction force is different. However, since the center of the reaction force coincides with the centroid, the position of the reaction force due to the first grease 9a and the position of the reaction force due to the second grease 9b coincide with the same centroid (position indicated by symbol G in the figure). . Accordingly, when a load is applied to the laminate of the power card 10 and the insulating plate 6, pressure can be applied uniformly to the region of the first grease 9a, and pressure can be applied evenly to the region of the second grease 9b. it can. In other words, by applying a load to the centroid, the parallelism of the casing 13 and the insulating plate 6 can be easily maintained during the load.

  There are various positions of the semiconductor elements sealed in the power card 10. If the centroid of the first grease region and the centroid of the second grease region do not match, a dummy region for applying the first grease may be provided so that the centroids match. The “dummy region” is a region that does not face the semiconductor element, but is a first grease region that is provided to make the centroid of the first grease region coincide with the centroid of the second grease region.

  (Third Embodiment) A semiconductor device according to a third embodiment will be described. The semiconductor device of the third embodiment is different from that of the first embodiment only in terms of grease, and therefore the description of the entire device is omitted. FIG. 9 shows a front view of the power card 10 in the third embodiment. As in FIG. 5, the insulating plate 6 is drawn with phantom lines.

  In the second embodiment described above, two regions of the first grease 9a are formed on the heat radiating plate 16a, one region overlaps the transistor Ta, and the other region overlaps the diode Da. In the third embodiment, one first grease region overlaps both the transistor Ta and the diode Db. In other words, the first grease 9a is applied to the heat radiating plate 16a (16b), and the second grease 9b surrounds the region of the first grease 9a along the outer shape of the heat radiating plate 16a (16b). This aspect is effective for the power card 10 in which the resin casing 13 surrounds the metal heat radiating plate 16a (16b) when viewed from the stacking direction. This is because the resin casing 13 has a lower thermal conductivity than the metal heat sinks 16a and 16b, and is less likely to reach a higher temperature than the heat sink 16a. In the example of FIG. 9, the second grease 9b surrounds the first grease 9a along the inside of the outer shape of the heat sink 16a (16b) when viewed from the stacking direction. In addition, the second grease 9b may surround the first grease 9a along the outside of the outer shape of the heat sink 16a (16b) when viewed from the stacking direction. The outer periphery of the heat dissipation plate 16a (16b) when viewed from the stacking direction may be covered with the first grease 9a or the second grease 9b.

  (Fourth Embodiment) A semiconductor device according to a fourth embodiment will be described. In the semiconductor device of the fourth embodiment, the heat radiating plate protrudes from the housing surface of the power card 110. FIG. 10 is a front view of the power card 110 in the semiconductor device of the fourth embodiment. FIG. 11 is a cross-sectional view of the semiconductor device 2a of the fourth embodiment. The cross section of the power card 110 in FIG. 11 corresponds to the cross section along the line BB in FIG.

  The area where the first grease 9a and the second grease 9b are applied is the same as in the third embodiment. That is, the first grease 9a is applied to a region overlapping the transistor Ta and the diode Da (transistor Tb and diode Db) when viewed from the stacking direction of the power card 110 and the insulating plate 6. In other words, the first grease 9a is applied on the heat sink 26a (26b). The second grease 9b having a viscosity lower than that of the first grease 9a is applied so as to surround the first grease 9a along the outer shape of the heat radiating plate 26a (26b) when viewed from the stacking direction. In the present embodiment, the description of the grease distribution on the side of the heat radiating plate 27 is omitted, but is the same as that of the heat radiating plate 26a.

  As shown in FIG. 11, the heat radiating plates 26 a, 26 b and 27 protrude from the surface of the resin casing 13. Hereinafter, although the heat sink 26a will be described, the same applies to the heat sinks 26b and 27. Symbol W1 indicates the amount of protrusion of the heat radiating plate 26a from the housing surface. Since the heat sink 26a protrudes from the housing surface, the gap width W2 between the heat sink 26a and the insulating plate 6 is smaller than the gap width W3 between the housing surface and the insulating plate 6. The gap width W2 corresponds to the thickness of the grease between the heat radiating plate 26a and the insulating plate 6. Further, the gap width W <b> 3 corresponds to the thickness of the grease between the housing surface and the insulating plate 6. In this embodiment, the region where the gap width is W3 is generally a region where the second grease having a low viscosity is applied. In this embodiment, when the gap width W2 between the heat sink 26a and the insulating plate 6 is narrowed to a predetermined value, the gap width W3 between the housing surface and the insulating plate 6 may be larger than the gap width W2. . Therefore, compared with the case of Example 3, the load required to narrow the gap width W2 to a predetermined value can be reduced. The same applies to the heat radiating plate 27 side.

  The amount of protrusion of the heat sink from the housing (thickness indicated by the symbol W1 in the figure) is preferably about 100 to 300 microns. The thickness of the grease between the heat radiating plate and the insulating plate (thickness indicated by symbol W2 in the figure) is preferably 100 microns or less.

  (Fifth Embodiment) A semiconductor device according to a fifth embodiment will be described. In the semiconductor device of the fifth embodiment, the surface of the heat sink is recessed with respect to the housing surface of the power card 210. FIG. 12 shows a front view of the power card 210 in the semiconductor device of the fifth embodiment. FIG. 13 is a cross-sectional view of the semiconductor device 2b of the fifth embodiment. The cross section of the power card 210 in FIG. 13 corresponds to the cross section along the CC line in FIG.

  The area where the first grease 9a and the second grease 9b are applied is the same as in the third embodiment. That is, the first grease 9a is applied to a region overlapping the transistor Ta and the diode Da (transistor Tb and diode Db) when viewed from the stacking direction of the power card 210 and the insulating plate 6. In other words, the first grease 9a is applied on the heat sink 36a (36b). The second grease 9b having a viscosity lower than that of the first grease 9a is applied so as to surround the first grease 9a along the outer shape of the heat radiating plate 36a (36b) when viewed from the stacking direction. In the present embodiment, explanation of the grease distribution on the side of the heat radiating plate 37 is omitted, but it is the same as that of the heat radiating plate 36a.

  Hereinafter, although the heat sink 36a will be described, the same applies to the heat sinks 36b and 37. As shown in FIG. 13, the surface of the heat sink 36a is recessed with respect to the surface of the housing 13 around the heat sink 36a. Reference sign W <b> 4 indicates the depth of the depression on the surface of the heat dissipation plate 26 a with respect to the surface of the housing 13. The depth W4 of the depression on the surface of the heat sink 26a is preferably about 100 microns. The gap width W5 between the surface of the heat sink 36a and the insulating plate 6 is preferably approximately 200 microns or less.

  Points to be noted regarding the technology described in the embodiments will be described. In the figure, it should be noted that the thickness of the grease layer, the thickness of the heat radiating plate, the protrusion amount of the heat radiating plate, the depth of the dent of the heat radiating plate, etc. are drawn with emphasis to help understanding.

  In the examples, two types of grease having different viscosities were used on both sides of the power card. Two types of grease having different viscosities may be used only on one surface of the power card. In the transistors Ta and Tb, since the collector electrode generates a larger amount of heat than the emitter electrode, it is preferable to use two types of grease having different viscosities on the surface of the power card on the side where the collector electrode faces.

  Protruding the heat sink from the surrounding housing surface is effective when the surface of the heat sink and the surrounding housing surface are flush with each other and a groove surrounding the heat sink is provided on the housing surface. Notably different. When the groove is provided, a thin grease layer continues on the outside of the ring-shaped groove when viewed from the stacking direction. The thermally expanded grease spreads to a thin layer outside the groove, where bleed-out is likely to occur as on the heat sink. If bleedout occurs outside the groove, the amount of grease that returns to the groove upon contraction is reduced. As a result, the effect of pushing back the grease to the center of the heat sink during contraction is reduced. On the other hand, in the semiconductor device of the embodiment, the thick layer continues to the entire edge of the grease layer as viewed from the stacking direction, so that no bleed out occurs in the case of the groove described above.

  As shown in FIGS. 3 and 4, the inside of the cooler 3 is a simple cavity. You may provide the fin which touches the back surface of the side plate which contacts an insulating plate in the internal space of a cooler.

  Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

2, 2a, 2b: Semiconductor device 3: Cooler 6: Insulating plate (cooling member)
7a, 7b, 7c: electrode terminal 9a: first grease 9b: second grease 10a, 10b: flat surface 10, 110, 210: power card 13: housing 14: spacer 15: solder 16a, 16b, 17, 26a, 26b, 27, 36a, 36b, 37: radiator plate 29: control terminal 31: case 32: leaf spring Da, Db: diode (semiconductor element)
Ta, Tb: Transistor (semiconductor element)

Claims (6)

A power card in which a semiconductor element is sealed is in contact with a cooling member and a load is applied in the stacking direction of the power card and the cooling member,
The first grease is applied to a region between the power card and the cooling member and overlapping the semiconductor element when viewed from the stacking direction, and the viscosity is higher than that of the first grease so as to surround the first grease. Low second grease is applied,
A semiconductor device. The power card includes a heat radiating plate having one surface exposed on a surface facing the cooling member of the power card and the other surface electrically connected to the semiconductor element in the casing of the power card. And
The first grease is applied to the heat radiating plate, and the second grease is applied so as to surround the first grease along the outer shape of the heat radiating plate when viewed from the stacking direction. The semiconductor device according to claim 1.   The semiconductor device according to claim 2, wherein the heat radiating plate protrudes from a housing surface of the power card.   The semiconductor device according to claim 2, wherein a surface of the heat radiating plate is recessed with respect to a surface of the casing of the power card.   The cooling member is an insulating plate having one surface facing the power card with the first and second grease interposed therebetween and the other surface being in contact with the cooler with the second grease interposed. 5. The semiconductor device according to claim 1, wherein the semiconductor device is characterized in that:   6. The centroid of the region to which the first grease is applied coincides with the centroid of the region to which the second grease is applied when viewed from the stacking direction. A semiconductor device according to 1.