JP2016027663A - Solid-state imaging apparatus, imaging system using the same, and method of manufacturing solid-state imaging apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state imaging apparatus which has a light shielding film having high light shielding performance, and a method of manufacturing the same.SOLUTION: The solid-state imaging apparatus includes: pixels each including a photoelectric conversion part, a charge holding part, and a plurality of transistors; a first insulating film arranged over the photoelectric conversion part, the charge holding part, and the plurality of transistors; a conductor arranged in an opening of the first insulating film and positioned on a source or a drain of the plurality of transistors; and a light shielding film arranged in the first insulating film and arranged above the charge holding part.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a light shielding film of a solid-state imaging device.

  In an active pixel type solid-state imaging device represented by a CMOS image sensor, a configuration having a global electronic shutter function and a configuration having a focus detection pixel have been proposed.

  The global electronic shutter function is a function that simultaneously performs the start time and the end time of photocharge accumulation of a plurality of pixels arranged in a matrix in all pixels. A solid-state imaging device having a global electronic shutter function includes a photoelectric conversion unit and a charge holding unit that holds photoelectrically converted charges for a certain period of time. In the charge holding unit of the solid-state imaging device having the global electronic shutter function, the charge is held for a period from the end of the accumulation of photocharges to the reading. At this time, if charges generated in other than the photoelectric conversion unit are mixed in the charge holding unit, a noise signal may be generated and the image quality may be deteriorated. Patent Document 1 discloses a configuration in which a pixel includes a photoelectric conversion unit and a charge holding unit, and a light shielding film is provided on the charge holding unit.

  Further, Patent Document 2 describes a light shielding film having a slit provided in a focus detection pixel in a configuration having a focus detection pixel.

JP 2008-004692 A JP 2009-105358 A

  Patent Document 1 describes a light shielding film, but has not been studied in detail. Depending on the configuration of the light shielding film, oblique light may easily enter the charge holding portion, and the charge generated by the oblique light may be mixed into the charge held in the charge holding portion.

  Further, in the solid-state imaging device described in Patent Document 2, the light shielding film having the slit has not been studied in detail, and the same problem can occur.

  Accordingly, an object of the present invention is to provide a solid-state imaging device having a light-shielding film having high light-shielding performance, and a method for manufacturing the same.

  The solid-state imaging device of the present invention includes a photoelectric conversion unit, a charge holding unit that holds charges generated in the photoelectric conversion unit, and a plurality of transistors that output signals based on the charges of the charge holding unit. A first insulating film disposed on top of the photoelectric conversion unit, the charge holding unit, and the plurality of transistors, and the plurality of the plurality of transistors. A solid-state imaging device including a conductor disposed at a source or a drain of the transistor having a light-shielding film disposed on the first insulating film and disposed on the charge holding portion. .

  The solid-state imaging device manufacturing method includes a photoelectric conversion unit, a charge holding unit for holding charges generated in the photoelectric conversion unit, and a plurality of transistors for outputting a signal based on the charge of the charge holding unit. A step of forming a first insulating film that covers the photoelectric conversion unit, the charge holding unit, and the plurality of transistors, and a method for manufacturing the solid-state imaging device. A step of removing a part of the first insulating film, and a step of forming a light-shielding film on a portion from which a part of the first insulating film has been removed.

  According to the configuration of the present invention, it is possible to provide a solid-state imaging device having a light-shielding film having high light-shielding performance and a method for manufacturing the same.

It is a cross-sectional schematic diagram of the solid-state imaging device of 1st Example. It is a cross-sectional schematic diagram which shows the manufacturing method of the solid-state imaging device of 1st Example. It is a cross-sectional schematic diagram of the solid-state imaging device for demonstrating 1st Example. It is a cross-sectional schematic diagram of the solid-state imaging device of 2nd Example. It is a cross-sectional schematic diagram which shows the manufacturing method of the solid-state imaging device of 2nd Example. It is a cross-sectional schematic diagram which shows the manufacturing method of the solid-state imaging device of 3rd Example. It is the cross-sectional schematic diagram and plane schematic diagram of the solid-state imaging device of 4th Example. Example of pixel circuit of solid-state imaging device

  The solid-state imaging device according to the present invention includes a photoelectric conversion unit, a plurality of transistors, an insulating film disposed above them, and an electric conductor disposed at the source or drain of the plurality of transistors. And have. And it has the light shielding film distribute | arranged to the insulating film in which the conductor was distribute | arranged. The light shielding film is, for example, an upper insulating film having a structure to be shielded from light such as an upper part of a charge holding unit of a solid-state imaging device having a global electronic shutter function or a photoelectric conversion unit of a solid-state imaging device having a focus detection pixel. It is arranged in. With such a configuration, the light shielding performance of the light shielding film can be enhanced.

  Here, the direction from the surface of the semiconductor substrate toward the inside of the semiconductor substrate is defined as the downward direction, and the opposite direction is defined as the upward direction. In the following embodiments, the case where the signal charge is an electron will be described as an example.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

Example 1
First, FIG. 8 shows a circuit diagram for four pixels of the solid-state imaging device of the present embodiment. In FIG. 8, the pixels 800 are arranged in 2 rows and 2 columns. The pixel 800 includes a photoelectric conversion unit 801, a charge holding unit 802, a first transfer transistor 804, a second transfer transistor 805, an amplification transistor 806, a selection transistor 807, and a reset transistor 808. And including. Further, the pixel 800 includes a third transfer transistor 809 for an overflow drain (hereinafter, OFD) for discharging unnecessary charges. In the pixel 800, reference numeral 803 denotes a node including a floating diffusion portion (floating diffusion portion, hereinafter referred to as FD portion). The power supply line 810 and the power supply line 811 are wirings for supplying a predetermined voltage. The power supply line 810 is connected to the main electrode region of the OFD transistor 809. The power supply line 811 is connected to the main electrode region of the resetting transistor and the selection transistor. RES, TX1, TX2, SEL, and TX3 are control lines that supply pulses to the gate electrodes of the transistors, and pulses are supplied from a vertical scanning circuit (not shown). RES is a reset transistor 808, TX1 is a first transfer transistor 804, and TX2 is a control line that supplies a pulse to the gate electrode of the second transfer transistor 805. SEL is a selection transistor 807, and TX3 is a control line that supplies a pulse to the gate electrode of the third transfer transistor 809. OUT is a signal line. N and m shown in FIG. 8 are natural numbers, and indicate a certain row n and its adjacent row n + 1, a certain column m and its adjacent column m + 1. A signal output from the signal line OUT is held in a readout circuit (not shown), subjected to processing such as amplification and addition, and the signal is output to the outside of the solid-state imaging device. At this time, a control signal for controlling processing such as signal addition and signal output to the outside can be supplied from a horizontal scanning circuit (not shown). The signal line OUT may be provided with a constant current source that constitutes an amplifying transistor and a source follower circuit. In FIG. 8, a pixel 800 has a configuration including one photoelectric conversion unit 801, and is the minimum repeating unit in the configuration of the solid-state imaging device. Note that the pixel 800 is not limited to this configuration, and may have a configuration in which an amplification transistor is shared by a plurality of pixels.

  The operation of the global shutter in the pixel 800 of FIG. 8 is as follows. After a certain accumulation period has elapsed, the charge generated in the photoelectric conversion unit 801 is transferred to the charge holding unit 802 via the first transfer transistor 804. While the charge holding unit 802 holds the signal charge for a certain accumulation period, the photoelectric conversion unit 801 starts to accumulate the signal charge again. The signal charge in the charge holding portion 802 is transferred to the node 803 including the FD portion via the second transfer transistor 805 and output from the amplification transistor 806 as a signal. Further, the third transfer transistor 809 causes the photoelectric conversion unit 801 to prevent the charge generated in the photoelectric conversion unit 801 from entering the charge holding unit 802 while the charge holding unit 802 holds the signal charge. In some cases, electric charges may be discharged. The resetting transistor 808 sets the node 803 including the FD portion to a predetermined potential before the signal charge is transferred from the charge holding portion 802 (reset operation). By outputting the potential of the node 803 including the FD portion at this time as a noise signal to the signal line OUT via the amplifying transistor 806, a noise signal is obtained by taking a difference from a signal based on a signal charge output later. Can be removed.

  FIG. 1A shows a light-shielding configuration of the charge holding unit in the solid-state imaging device having the charge holding unit capable of such a global shutter operation. FIG. 1A is a schematic cross-sectional view focusing on the photoelectric conversion portion, the charge holding portion, the floating diffusion portion constituting the FD portion, and the light shielding film disposed on the charge holding portion in FIG. The structure above the light shielding film is omitted. A wiring structure, a protective film, a color filter, an in-layer lens, a microlens, and the like can be appropriately disposed above the light shielding film. In FIG. 1A, the same components as those in FIG.

  In FIG. 1A, a semiconductor substrate 101 is, for example, a silicon semiconductor substrate, has a surface 100 of the semiconductor substrate, and has a P-type semiconductor region 102 formed in the semiconductor substrate. The element isolation portion 103 is disposed on the semiconductor substrate 101 and is formed by an STI (Shallow Trench Isolation) method. The photoelectric conversion unit 801 includes an N-type semiconductor region 105 that functions as a charge storage unit, and a P-type semiconductor region 104 disposed thereon. The N-type semiconductor region 106 constitutes a charge holding portion 802, and the N-type semiconductor region 107 constitutes a floating diffusion portion constituting the FD portion 803. The gate electrode 108 constituting the first transfer transistor 804 is disposed on the gate insulating film 109 disposed on the surface 100 of the semiconductor substrate, and the N-type semiconductor region 105 and the N-type semiconductor region 106 are separated from each other. Arranged between. The gate electrode 110 constituting the second transfer transistor 805 is disposed on the gate insulating film 111 disposed on the surface 100 of the semiconductor substrate, and the N-type semiconductor region 106 and the N-type semiconductor region 107 are separated from each other. Arranged between. Here, an insulating film integral with the gate insulating film 111 or a separate insulating film may be provided on the surface 100 other than under the gate electrode 110.

  In FIG. 1A, an insulating film 112 (second insulating film) is disposed so as to cover the photoelectric conversion portion 801, the gate electrode 108, the gate electrode 110, and the like. An insulating film 113 (first insulating film) is disposed on the insulating film 112. The insulating film 113 is a silicon oxide film, for example, and can function as an interlayer insulating film. The insulating film 113 can function as a planarization film that flattens unevenness generated in the gate electrode or the like. The insulating film 112 is a silicon nitride film, for example, and can function as a protective film on the surface of the photoelectric conversion unit 801. The insulating film 112 has a higher refractive index than the insulating film 113, and the insulating film 112 can function as an antireflection film that reduces reflection on the surface of the photoelectric conversion portion 801. The conductive insulating film 112 may be a laminated film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film.

  In FIG. 1A, the conductor 115 disposed in the openings of the insulating film 112 and the insulating film 113 can function as a contact plug. The conductor 115 is made of tungsten, for example. Metal wiring (not shown) is disposed on the conductor 115. The N-type semiconductor region 114 is provided to enable ohmic connection between the conductor 115 serving as a contact plug and the semiconductor region 107, and has an impurity concentration higher than that of the semiconductor region 107. Here, the light shielding film 116 is disposed on the insulating film 113 so as to cover the N-type semiconductor region 106 of the charge holding portion 802. The light shielding film 116 is made of tungsten, for example.

  As described above, the insulating film 113 in which the conductor 115 serving as the contact plug is arranged, that is, the light shielding film 116 is arranged on the surface side of the semiconductor substrate with respect to the metal wiring, so that the N type of the charge holding portion 802 can be obtained. It is possible to shield light in the vicinity of the semiconductor region 106. Accordingly, it is possible to reduce the mixing of light into the charge holding portion and to obtain high light shielding performance.

  The light shielding film 106 extends from above the gate electrode 110 of the second transfer transistor 805 to the upper portion of the photoelectric conversion unit 801 so as to cover the charge holding portion 802 and the gate electrode 108 of the first transfer transistor 804. doing. The same applies to the depth direction of FIG. Thus, by blocking light in a wider area than the charge holding unit, it is possible to suppress light from entering the charge holding unit, and to obtain high light blocking performance.

  Next, the manufacturing method of the solid-state imaging device of the present embodiment will be described with reference to FIG. In FIG. 2, the same components as those in FIG.

  First, in FIG. 2A, a P-type semiconductor region 102, an element isolation portion 103, an N-type semiconductor region 105, a P-type semiconductor region 104, an N-type semiconductor region 106, and an N-type semiconductor are formed on a semiconductor substrate 101. Region 107 is formed. The element isolation part 103 is formed by an STI method, and each semiconductor region can be formed by a photolithography technique and an ion implantation technique. In addition, the gate electrode 108 and the gate electrode 110 are formed from polysilicon by a photolithography technique and an etching technique, and at the same time, a gate insulating film 109 and a gate insulating film 111 are formed. These forming methods can be formed by general semiconductor technology, and detailed forming methods are omitted. The order of formation is also arbitrary.

  Then, as shown in FIG. 2A, an insulating film 201 that is a silicon nitride film is formed by low-pressure CVD (LPCVD) so as to cover the surface 100 of the semiconductor substrate and the gate electrodes 108 and 111. Then, an insulating film 202 of a silicon oxide film is formed so as to cover the insulating film 201. Here, the insulating film 201 has a surface that follows unevenness such as a gate electrode, and the insulating film 202 has a flat surface that fills unevenness such as a gate electrode.

  Next, as shown in FIG. 2B, a photoresist pattern 203 is formed over the insulating film 202. The photoresist pattern 203 is a mask for forming a contact hole in the insulating film 202 and has an opening for the contact hole. Then, the insulating film 202 and the insulating film 201 are etched using the photoresist pattern 203 as a mask, a part of the insulating film 202 and the insulating film 201 is removed, and a contact hole 204 is formed in the insulating film 202 and the insulating film 201. To do. Here, the insulating film 201 can also function as an etching stopper in etching for forming a contact hole.

  After the contact hole 204 is formed, N-type impurities are ion-implanted into the contact hole 204 to form an N-type semiconductor region 114 (FIG. 2C). Then, the photoresist pattern 203 is removed, and a conductor film 204 is formed (FIG. 2C). The conductor film 204 is, for example, a laminated film of titanium nitride and tungsten.

  Etching or CMP is performed on the conductor film 204, whereby the excess conductor film 204 is removed and a conductor 115 is formed in the contact hole (FIG. 2D).

  Next, a photoresist pattern 205 is formed on the conductor 115 and the insulating film 202. The photoresist pattern 205 is a mask for providing a light shielding film on the insulating film 202 and has an opening for the light shielding film. Then, the insulating film 202 is etched using the photoresist pattern 205 as a mask, a part of the insulating film 202 is removed, and a groove 206 for a light shielding film is formed in the insulating film 202. Here, the bottom surface of the trench 206 exists above the gate electrodes 108 and 111.

  Then, the photoresist pattern 205 is removed, and a conductor film 207 is formed (FIG. 2F). The conductor film 207 is, for example, a laminated film of titanium nitride and tungsten. Etching or CMP is performed on the conductor film 207 to remove the excess conductor film 207 and form a light-shielding film 116 in the groove 206 which is a part where the insulating film 113 is partially removed. Here, the insulating film 202 becomes the insulating film 113 (FIG. 2G). By such a method, the light shielding film 116 can be formed on the insulating film 113 on which the contact conductor 115 is disposed.

  FIG. 1B shows a modification of the solid-state imaging device of this embodiment. 1B, the same components as those in FIG. 1A are denoted by the same reference numerals and description thereof is omitted. 1B is different from FIG. 1A in the arrangement of a light shielding film. The light shielding film 106 in FIG. 1A covers the charge holding portion 802 and the gate electrode 108 of the first transfer transistor 804 from above the gate electrode 110 of the second transfer transistor 805, and the photoelectric conversion portion 801. It extends to the top. On the other hand, the light shielding film 117 in FIG. 1B extends from above the gate electrode 110 of the second transfer transistor 805 to the top of the gate electrode 108 of the first transfer transistor 804 so as to cover the charge holding portion 802. Exist. In other words, the light shielding film disposed on the insulating film 113 is disposed at least on the N-type semiconductor region 106 of the charge holding portion 802. With such a configuration, since the light shielding film is disposed in the vicinity of the charge holding portion 802, it is possible to reduce the mixing of light into the charge holding portion.

  Next, the wiring configuration of the solid-state imaging device according to the present embodiment will be described with reference to FIG. FIG. 3 is a schematic cross-sectional view of the solid-state imaging device, and corresponds to FIG. 3, the same components as those in FIG. 1A are denoted by the same reference numerals, and description thereof is omitted.

  3A has a wiring structure over the insulating film 113, the light-shielding film 116, and the conductor 115 in FIG. 1A. The wiring structure is, for example, an insulating film 301, an insulating film 302, a first wiring layer 303, a via layer 304, and a second wiring layer 305. The first wiring layer 303 is provided on the insulating film 301 and includes a wiring 303a and a wiring 303b. The via layer 304 is disposed on the insulating film 301 and includes a via 304a and a via 304b. The second wiring layer 305 is provided on the insulating film 302 and includes a wiring 305a and a wiring 305b. Here, each wiring is a metal wiring made of an alloy containing aluminum as a main component. In addition, the metal wiring may be a wiring made of aluminum, copper, or an alloy containing copper as a main component.

  A wiring 303a, a via 304a, and a wiring 305a are arranged in this order on the light shielding film 116 and are electrically connected to each other. On the conductor 115, a wiring 303b, a via 304b, and a wiring 305b are arranged in this order upward and are electrically connected to each other. Here, although not shown in the circuit of FIG. 8, a voltage can be supplied to the light shielding film 116. For example, ground, power supply voltage, and voltage for driving in accordance with charge transfer operation.

  FIG. 3B shows a modification of FIG. In FIG. 3B, description of the same structure as that in FIG. 3B has a wiring structure over the insulating film 113, the light-shielding film 116, and the conductor 115 in FIG. 1A as in FIG. 3A. The wiring structure is, for example, an insulating film 306, an insulating film 307, a first wiring layer 309, and a via layer 308. The via layer 308 is disposed on the insulating film 306 and includes a via 308a and a via 308b. The first wiring layer 309 is disposed on the insulating film 307 and includes a wiring 309a and a wiring 309b. On the light shielding film 116, vias 308a and wirings 309a are arranged in this order upward and are electrically connected to each other. A via 308b and a wiring 309b are arranged in this order on the conductor 115 and are electrically connected to each other. The conductor 115 and the via 308b have a stack contact structure that is directly connected. Here too, a voltage can be supplied to the light shielding film 116 as in FIG.

  As described above, since the light shielding film 116 is disposed on the insulating film 113 on which the conductor 115 as a contact plug is disposed, light shielding is performed in the vicinity of the N-type semiconductor region 106 of the charge holding portion 802. It becomes possible to do. Accordingly, it is possible to reduce the mixing of light into the charge holding portion and to obtain high light shielding performance.

(Example 2)
The solid-state imaging device according to the present embodiment will be described with reference to FIGS. First, FIG. 4A is a schematic cross-sectional view of a solid-state imaging device corresponding to FIG. 4A, the same components as those in FIG. 1A are denoted by the same reference numerals, and description thereof is omitted.

  In FIG. 4A, a structure different from that in FIG. 1A is arranged in the groove of the insulating film 113, the light shielding film 401 in FIG. 4A is arranged not in the groove of the insulating film 113 but in the opening. The light shielding film 401 is stacked on the N-type semiconductor region 106 of the charge holding portion 802 with the insulating film 112 interposed therebetween, and is disposed so as to fill between the gate electrode 110 and the gate electrode 108. With such a configuration, the light shielding performance of the charge holding unit 802 can be further improved.

  In FIG. 4A, the light-shielding film 401 is arranged from the upper part of the gate electrode 110 to the upper part of the photoelectric conversion portion 801. With such a configuration, it is possible to reduce the incidence of light from the photoelectric conversion portion 801, that is, the gate electrode 108 to the N-type semiconductor region 106 from the N-type semiconductor region 105 side. Further, in the photoelectric conversion unit 801, since the light shielding film 401 is disposed on the surface 100 of the semiconductor substrate via the insulating film 112, it is possible to suppress the incidence of light at the end of the gate electrode 108. It becomes.

  In addition, since the light shielding film 401 is disposed up to the top of the gate electrode 110, the distance from the conductor 115 disposed in the semiconductor region 107 can be increased. With such a configuration, a short circuit between the conductor 115 and the light shielding film 401 can be suppressed.

  Further, the light shielding film 401 has a tapered shape, and the side surface 402 of the light shielding film 401 is inclined with respect to the surface 100 of the semiconductor substrate. Specifically, the side surface 402 of the light shielding film 401 has an angle from a direction perpendicular to the surface 100 of the semiconductor substrate toward the surface of the semiconductor substrate. With such a shape, even if the incident light is reflected on the light receiving surface of the photoelectric conversion unit 801, the reflected light can be incident on the photoelectric conversion unit 801 when the reflected light hits the side surface 402 of the light shielding film 401. Become.

  Next, the manufacturing method of the solid-state imaging device of the present embodiment will be described with reference to FIG. In FIG. 5, the same components as those in FIG. Further, the description of the manufacturing process similar to that of the first embodiment (FIG. 2) is omitted.

  First, in FIG. 5A, the element isolation portion 103, each semiconductor region, and the gate electrode are formed over the semiconductor substrate 101 as in FIG. These forming methods can be formed by general semiconductor technology, and detailed forming methods are omitted. Then, as in FIG. 2A, an insulating film 501 that is a silicon nitride film is formed by low-pressure CVD (LPCVD) so as to cover the surface 100 of the semiconductor substrate and the gate electrodes 108 and 111. Then, an insulating film 502 of a silicon oxide film is formed so as to cover the insulating film 501. Here, the insulating film 501 has a surface that follows unevenness such as a gate electrode, and the insulating film 502 has a flat surface that fills unevenness such as a gate electrode.

  Next, as illustrated in FIG. 5B, a photoresist pattern 503 is formed over the insulating film 502. The photoresist pattern 503 is a mask for forming a contact hole and a light shielding film in the insulating film 502, and has an opening for the contact hole and an opening for the light shielding film. Then, the insulating film 502 is etched using the photoresist pattern 503 as a mask, a part of the insulating film 502 is removed, and a contact hole 504 and an opening 505 for a light shielding film are formed in the insulating film 502. Here, the insulating film 501 can function as an etching stopper in this etching.

  After the contact hole 504 and the opening 505 are formed, the photoresist pattern 503 is removed. Then, a new photoresist pattern 506 is formed. The new photoresist pattern 506 has an opening that exposes the contact hole 504 and covers other regions. Using this photoresist pattern 506 as a mask, a part of the exposed insulating film 501 is removed by etching. Then, N-type impurities are ion-implanted into the contact hole 504 to form an N-type semiconductor region 114 (FIG. 5C).

  Then, after removing the photoresist pattern 506, a conductor film 507 is formed (FIG. 2D). The conductor film 507 is, for example, a laminated film of titanium nitride and tungsten. Etching or CMP is performed on the conductor film 507 to remove the excess conductor film 507. Then, the light shielding film 401 is formed in the opening for the light shielding film, which is a portion where the conductor 115 and a part of the insulating film are removed in the contact hole, and the structure of FIG. 4A is obtained. Here, the insulating film 501 becomes the insulating film 112, and the insulating film 502 becomes the insulating film 113.

  By such a method, the light shielding film 401 can be formed on the insulating film 113 provided with the contact conductor 115. Further, the light shielding film 401 can be formed in the same process as the contact conductor 115. Specifically, the contact hole and opening formation, and the conductor film formation and removal steps can be made the same. These formations may be performed in different processes, but the manufacturing process can be reduced by performing the processes in the same process.

  Next, a modification of FIG. 4A will be described with reference to FIG. In FIG. 4B, description of the same structure as in FIG. 4A is omitted. First, in FIG. 4B, the light-shielding film 403 is disposed from the upper part of the N-type semiconductor region 107 to the upper part of the photoelectric conversion portion 801, and is disposed so as to cover the gate electrode 110 and the gate electrode. With such a configuration, it is possible to further reduce the incidence of light from the N-type semiconductor region 107 side of the gate electrode 110 to the N-type semiconductor region 106.

  Further, in FIGS. 4A and 4B, the inclination of the side surface of the light shielding film is different from each other. The side surface 404 of the light shielding film in FIG. 4B is perpendicular to the surface 100 of the semiconductor substrate, and the side surface 402 of the light shielding film has an inclination in FIG. Such a shape can be arbitrarily selected. It is possible to make different patterns by controlling the photoresist pattern or the etching conditions when forming the opening of the insulating film 113 for the light shielding film.

  In the present embodiment, the wiring structure as in the first embodiment is applicable. 4A can be combined as appropriate, for example, the arrangement of the light shielding film in FIG. 4A is the same as the arrangement of the light shielding film in FIG. 4B.

(Example 3)
The solid-state imaging device of the present embodiment will be described with reference to FIG. First, FIG. 6F is a schematic cross-sectional view of the solid-state imaging device corresponding to FIG. 6F, the same components as those in FIG. 4A are denoted by the same reference numerals, and description thereof is omitted.

  In FIG. 6F, a structure different from that in FIG. 4A is an insulating film 601 (third insulating film). The insulating film 601 is a silicon oxide film, for example, and is disposed in the opening of the insulating film 113 and is disposed between the light shielding film 602 and the insulating film 113. With such a structure, it is possible to improve insulation between the light shielding film 602 and the semiconductor substrate or between the light shielding film 602 and the gate electrode.

  Next, a method for manufacturing the solid-state imaging device according to the present embodiment will be described with reference to FIGS. 2 and 6A to 6E. 6A to 6E, the same components as those in FIG. 6F are denoted by the same reference numerals, and description thereof is omitted. Further, the description of the manufacturing process similar to that of the first embodiment (FIG. 2) is omitted.

  First, FIG. 6A has the same structure as FIG. 6A, the insulating film 112 and the insulating film 202 in FIG. 2D are referred to as an insulating film 603 and an insulating film 604. The structure shown in FIG. 6A is obtained through the steps shown in FIGS. 2A to 2C.

  Next, as shown in FIG. 6B, a photoresist pattern 605 is formed over the insulating film 604. The photoresist pattern 605 is a mask for forming a light shielding film on the insulating film 604 and has an opening for the light shielding film. Then, the insulating film 604 is etched using the photoresist pattern 605 as a mask, and an opening 606 for a light shielding film is formed in the insulating film 604. Here, the insulating film 603 can function as an etching stopper in this etching. After the opening 606 is formed, the photoresist pattern 605 is removed (FIG. 6C).

  Next, as illustrated in FIG. 6D, an insulating film 607 is formed to cover the insulating film 604, the conductor 115, and the insulating film 603 exposed through the opening 606. The insulating film 607 is, for example, a silicon oxide film. The insulating film 607 is formed so as to cover the shape such as the gate electrode and the sidewall of the opening.

  Then, a conductor film 608 serving as a light-shielding film is formed so as to cover the insulating film 607 (FIG. 6D). For example, the conductor film 608 is a laminated film of titanium nitride and tungsten. As in the past, excess conductor film 608 is removed by performing etching or CMP on the conductor film 608. Then, the excess insulating film 607 disposed on the insulating film 604 is also removed so that the upper surface of the conductor 115 is exposed. Then, a light shielding film 602 and an insulating film 601 are formed in the opening for the light shielding film, and the structure of FIG. 6F is obtained. Here, the insulating film 604 becomes the insulating film 113.

  By such a method, the light shielding film 602 can be formed on the insulating film 113 provided with the contact conductor 115. In addition, an insulating film 601 for enhancing the insulating property of the light shielding film 602 can be formed. The manufacturing method of the present embodiment is not limited to this, and the manufacturing method as shown in the second embodiment is also applicable. For example, the contact hole for the conductor 115 and the opening for the light shielding film are formed in the same process. It can also be formed.

Example 4
The solid-state imaging device of the present embodiment will be described with reference to FIG. The solid-state imaging device according to the present embodiment is a solid-state imaging device having imaging pixels and focus detection pixels. Compared to the solid-state imaging devices according to the first to third embodiments, the charge holding unit and the second transfer transistor are not provided. In FIG. 7, the same components as those in FIG.

  FIG. 7A is a schematic cross-sectional view focusing on the photoelectric conversion portion of the pixel 700 for focus detection, the floating diffusion portion constituting the FD portion, and the light shielding film provided for focus detection. In FIG. 7A, a light shielding film 701 having a conductor 115 and a slit 702 is disposed on an insulating film 113 ′ disposed on an upper portion of an N-type semiconductor region 105 constituting the photoelectric conversion portion 801. An insulating film 301 similar to that in FIG. 3 and an insulating film 302 disposed on the insulating film 301 are disposed on the light shielding film 701. The insulating film 301 is provided with the wiring 303b of the first wiring layer 303 and the via 304b of the via layer 304, and the insulating film 302 is provided with the wiring 305b of the second wiring layer 305. FIG. 7B shows the arrangement of the second wiring layer 305, the light shielding film 701, the semiconductor region 105 of the photoelectric conversion portion 801, and the gate electrode 108 of the first transfer transistor 804 in FIG. It shows the relationship.

  Here, the slit 702 of the light-shielding film 701 is offset from the center of gravity of the photoelectric conversion portion 801, and is here arranged offset to the right in FIG. 7A. Focus detection is possible by acquiring data together with a pixel (not shown) provided with a light-shielding film having a slit arranged offset in the left direction in FIG. It becomes.

  Further, the light shielding film 701 is disposed on the insulating film 113 ′ together with the conductor 115 as in the first to third embodiments. With such a configuration, the focus detection light can be further separated in the vicinity of the N-type semiconductor region 105 of the photoelectric conversion unit 801, so that the accuracy of focus detection is improved. In addition, it is possible to reduce mixing of light into the semiconductor region 107 included in the FD portion 803, and high light shielding performance can be obtained.

  Note that the structure having the charge holding portion shown in FIG. 8 can be applied as the focus detection pixel of this embodiment.

  Hereinafter, as an application example of the solid-state imaging device according to each of the above embodiments, an imaging system in which the solid-state imaging device is incorporated will be exemplarily described. The imaging system includes not only a device such as a camera whose main purpose is photographing but also a device (for example, a personal computer or a portable terminal) that is supplementarily provided with a photographing function. For example, the camera includes a solid-state imaging device according to the present invention and a processing unit that processes a signal output from the solid-state imaging device. The processing unit can include, for example, a processor that processes digital data.

  In the description of the present invention, the structure above the light shielding film of the solid-state imaging device is omitted. A wiring structure, a protective film, a color filter, an in-layer lens, a microlens, and the like are appropriately disposed above the light shielding film. Moreover, the form of each Example is an example to the last, can be changed suitably, and each Example can be combined suitably. Furthermore, the configuration of the light shielding film is not limited to a configuration having a global electronic shutter function and a focus detection function, but can be applied to a solid-state imaging device having other functions such as a function of expanding a dynamic range.

101 Semiconductor substrate 102 P-type semiconductor region 105 N-type semiconductor region 106 N-type semiconductor region 107 N-type semiconductor region 108 Gate electrode of first transfer transistor 110 Gate electrode of second transfer transistor 113 Insulating film 115 Conductor constituting contact 116 Light shielding film

Claims (14)

A photoelectric conversion unit;
A charge holding unit for holding charges generated in the photoelectric conversion unit;
A plurality of transistors for outputting a signal based on the charge of the charge holding unit, and a pixel,
A first insulating film disposed on top of the photoelectric conversion unit, the charge holding unit, and the plurality of transistors;
A solid-state imaging device including a conductor disposed in an opening of the first insulating film and disposed at a source or drain of the plurality of transistors;
A solid-state imaging device comprising: a light shielding film disposed on the first insulating film and disposed on the charge holding portion.   The solid-state imaging device according to claim 1, wherein the light shielding film is disposed in a groove of the first insulating film.   The solid-state imaging device according to claim 1, wherein the light shielding film is disposed in an opening of the first insulating film. A second insulating film having a refractive index higher than that of the first insulating film and disposed between the photoelectric conversion unit and the insulating film;
The solid-state imaging device according to claim 3, wherein a bottom surface of the light shielding film is in contact with the second insulating film.   4. The device according to claim 1, further comprising: a second insulating film having a higher refractive index than the first insulating film and disposed between the photoelectric conversion unit and the insulating film. The solid-state imaging device according to item 1. The plurality of transistors include a first transfer transistor for transferring the charge of the photoelectric conversion unit to the charge holding unit, and a second transfer transistor for transferring the charge of the charge holding unit to the floating diffusion unit. A transistor and an amplifying transistor that outputs a signal based on the potential of the floating diffusion portion;
The light shielding film is disposed from an upper part of the photoelectric conversion portion to an upper part of the gate electrode of the second transfer transistor so as to cover the gate electrode of the first transfer transistor. The solid-state imaging device according to any one of 1 to 5.   Between the light shielding film and the first insulating film, between the light shielding film and the gate electrode of the first transfer transistor, and between the light shielding film and the gate electrode of the second transfer transistor. The solid-state imaging device according to claim 6, wherein a third insulating film is disposed therebetween. A solid-state imaging device according to any one of claims 1 to 7,
A processing unit that processes a signal from the solid-state imaging device. A solid-state imaging device having a photoelectric conversion unit, a charge holding unit for holding charges generated in the photoelectric conversion unit, and a plurality of transistors including a transistor for outputting a signal based on the charge of the charge holding unit In the manufacturing method,
Forming a first insulating film that covers the photoelectric conversion unit, the charge holding unit, and the plurality of transistors;
Removing a part of the first insulating film on the charge holding portion;
Forming a light shielding film on a portion from which a part of the first insulating film is removed;
A method for manufacturing a solid-state imaging device.   The step of removing a part of the first insulating film is a step of forming a groove in the first insulating film by removing a part of the first insulating film. Item 10. A method for manufacturing a solid-state imaging device according to Item 9.   The step of removing a part of the first insulating film is a step of forming an opening in the first insulating film by removing a part of the first insulating film. Item 10. A method for manufacturing a solid-state imaging device according to Item 9. Forming a contact hole in the first insulating film;
Further forming a conductor in the contact hole,
12. The method of manufacturing a solid-state imaging device according to claim 11, wherein the step of forming an opening in the first insulating film and the step of forming the contact hole are performed in the same step. Forming a contact hole in the first insulating film;
Further forming a conductor in the contact hole,
The method for manufacturing a solid-state imaging device according to claim 9, wherein the step of forming the light shielding film and the step of forming a conductor in the contact hole are performed in the same step. . Forming a contact hole in the first insulating film;
Further forming a conductor in the contact hole,
A step of forming a contact hole in the first insulating film and a step of forming a conductor in the contact hole are performed, and then a step of removing a part of the first insulating film is performed. The manufacturing method of the solid-state imaging device of any one of Claims 9 thru | or 13.

Images