JP2016017998A - Method for manufacturing semiconductor device and method for forming resist pattern - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique capable of improving peelability of a chemically amplified negative resist.SOLUTION: A method for manufacturing a semiconductor device comprises (i) a first step P110 of bringing an alkaline solution into contact with a first surface of a semiconductor substrate, (ii) a second step P120 of forming a resist pattern on the first surface using a chemically amplified negative resist after the first step, (iii) a third step P130 of forming an electrode on the first surface after the second step, and (iv) a step P140 of removing the resist pattern after the third step.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  Conventionally, a structure in which an electrode is formed on a semiconductor substrate is known as a semiconductor device, and a lithography method using a chemically amplified negative resist is known as an electrode forming method (for example, from Patent Document 1). Patent Document 4).

International Publication No. 2011/102064 JP 2000-294371 A JP 2003-229481 A JP 2013-228664 A

  However, the conventional method has a problem that the peelability of the chemically amplified negative resist is poor. When the peelability of the resist is poor, there are problems that it is necessary to perform the stripping process a plurality of times, and that the stripping process takes a long time. In addition, in the conventional method for manufacturing a semiconductor device, it has been desired to facilitate manufacturing, improve manufacturing accuracy, and improve workability.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms.

(1) According to one form of this invention, the manufacturing method of a semiconductor device which manufactures a semiconductor device provided with an electrode on a semiconductor substrate is provided. In this method of manufacturing a semiconductor device, a first step of bringing an alkaline solution into contact with the first surface of the semiconductor substrate, and after the first step, a chemically amplified negative resist is used to form the first surface. A second step of forming a resist pattern; a third step of forming an electrode on the first surface after the second step; and a step of removing the resist pattern after the third step; Is provided. According to the method for manufacturing a semiconductor device of this aspect, the peelability of the chemically amplified negative resist can be improved.

(2) In the method for manufacturing a semiconductor device according to the above aspect, the alkaline solution may be water-soluble. According to the method for manufacturing a semiconductor device of this aspect, no alkaline solution remains after the resist pattern is formed. For this reason, it is possible to suppress foreign matter from entering the semiconductor device.

(3) In the method for manufacturing a semiconductor device according to the above aspect, the boiling point of the alkaline solution may be equal to or higher than a heat treatment temperature at the time of resist pattern formation. According to the method for manufacturing a semiconductor device of this aspect, since the alkaline solution does not evaporate during the formation of the resist pattern, it is possible to suppress cracks in the resist pattern resulting from the evaporation.

(4) According to another aspect of the present invention, a method for forming a resist pattern is provided. This method of forming a resist pattern includes a step of bringing a semiconductor substrate into contact with an alkaline solution before the step of applying a chemically amplified negative resist. According to the resist pattern forming method of this embodiment, the releasability when removing the resist pattern can be improved.

  The present invention can also be realized in various forms other than the semiconductor device manufacturing method. For example, it is realizable with forms, such as a semiconductor device and a power converter provided with a semiconductor device.

  According to the present invention, the peelability of a chemically amplified negative resist can be improved.

It is sectional drawing which shows typically the structure of the semiconductor device 100 in 1st Embodiment. 5 is a process diagram illustrating a method for manufacturing the semiconductor device 100. It is a mimetic diagram showing semiconductor substrate 10 in the state where resist was applied. It is a schematic diagram which shows the semiconductor substrate 10 of the exposed state. It is a mimetic diagram showing semiconductor substrate 10 after PEB processing. It is a schematic diagram which shows the semiconductor substrate 10 after a post-baking process.

A. This embodiment:
A-1. Configuration of Semiconductor Device FIG. 1 is a cross-sectional view schematically showing a configuration of a semiconductor device 100 in the first embodiment. FIG. 1 shows XYZ axes orthogonal to each other.

  Of the XYZ axes in FIG. 1, the X axis is an axis from the left side of FIG. 1 toward the right side of the page, the + X axis direction is a direction toward the right side of the page, and the −X axis direction is a direction toward the left side of the page. It is. Of the XYZ axes in FIG. 1, the Y axis is an axis from the front of the paper to the back of the paper in FIG. 1, the + Y axis direction is a direction toward the back of the paper, and the −Y axis direction is a direction toward the front of the paper. It is. Among the XYZ axes in FIG. 1, the Z axis is an axis that goes from the bottom of FIG. 1 to the top of the paper, the + Z axis direction is a direction that goes on the paper, and the −Z axis direction is a direction that goes down the paper. It is.

  The semiconductor device 100 is a semiconductor device formed using gallium nitride (GaN). In the present embodiment, the semiconductor device 100 is a field effect transistor (FET). The semiconductor device 100 includes a semiconductor substrate 10 and an electrode layer 60.

  The semiconductor substrate 10 of the semiconductor device 100 is a semiconductor layer having a plate shape extending along the X axis and the Y axis. In the present embodiment, the semiconductor substrate 10 is a semiconductor layer mainly formed from gallium nitride (GaN).

  The electrode layer 60 of the semiconductor device 100 is a layer mainly composed of aluminum (Al). The electrode layer 60 is formed on the semiconductor substrate 10. In the present embodiment, the thickness of the electrode layer 60 is 500 nm.

A-2. FIG. 2 is a process diagram showing a method for manufacturing the semiconductor device 100. When manufacturing the semiconductor device 100, first, the manufacturer prepares the semiconductor substrate 10 in Step P <b> 100, and removes foreign matters or the like attached to the surface of the semiconductor substrate 10 with an organic solvent (such as acetone) or an acid. Wash.

  After performing the substrate cleaning (process P100), the manufacturer brings the alkaline solution into contact with the first surface 15 (the surface in the + X-axis direction) (see FIG. 1) of the semiconductor substrate 10 in the process P110. In the present embodiment, as a method for contacting the alkaline solution, a method is used in which the first surface 15 of the semiconductor substrate 10 is spin-dried after the semiconductor substrate 10 is immersed in the alkaline solution. By this step, the alkali layer 20 is formed on the first surface 15 of the semiconductor substrate 10. The contact method of the alkaline solution is not limited to this method. For example, (i) a method of spraying the alkaline solution onto the first surface 15 of the semiconductor substrate 10 may be used, and (ii) the alkali substitution is performed under reduced pressure. The method of performing (vapor method) may be used.

  In this embodiment, a monoethanolamine (boiling point: about 170 ° C.) solution (manufactured by Wako Pure Chemical Industries, Ltd.) is used as the alkaline solution. The alkaline solution is not particularly limited, and other solutions may be used. When a water-soluble alkaline solution is used, the alkali layer 20 is eluted in a development process described later, and does not remain on the first surface 15 of the semiconductor substrate 10 in the subsequent process. For this reason, it is preferable to use a water-soluble alkaline solution. The monoethanolamine solution is a water-soluble solution.

  Moreover, it is preferable that the boiling point of an alkaline solution shall be more than the heat processing temperature at the time of the resist pattern formation mentioned later. By doing so, since the alkaline solution does not evaporate even in the heat treatment during the formation of the resist pattern, cracks in the resist pattern due to the evaporation of the alkaline solution can be suppressed.

  After bringing the semiconductor substrate 10 into contact with the alkaline solution (process P110), the manufacturer forms a resist pattern on the first surface 15 using a chemically amplified negative resist (process P120). The resist pattern forming process includes a resist coating process (process P121), a pre-baked process (process P123), an exposure process (process P125), and a PEB (Post Exposure Bake) process (process P127). And a development process (process P128) and a post bake process (process P129).

  The manufacturer first applies a chemically amplified negative resist to the first surface 15 in step P121. A negative resist refers to a photoresist whose solubility in a developing solution is reduced by exposure and a photosensitized portion remains. A chemically amplified resist refers to a photoresist that reacts efficiently by chemical reaction even under conditions with a small amount of exposure.

  FIG. 3 is a schematic diagram showing the semiconductor substrate 10 in a state where a resist is applied. As shown in FIG. 3, an alkali layer 20 mainly composed of monoethanolamine is formed on the first surface 15 of the semiconductor substrate 10, and a resist layer 30 is formed on the alkali layer 20. Note that the thickness of each layer in the schematic diagram is different from the actual thickness. For example, the thickness of the alkali layer 20 is about several molecules. In this embodiment, the manufacturer applies the resist to the first surface 15 of the semiconductor substrate 10 by spin coater or spraying. In this embodiment, TLOR-N001 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) is used as the chemically amplified negative resist.

  In step P123, the manufacturer performs a pre-baking process in order to volatilize the organic solvent remaining in the resist. In the present embodiment, the prebaking process is performed at 100 ° C. for 90 seconds.

  Next, in step P125, the manufacturer performs an exposure process using the reduced projection exposure apparatus.

  FIG. 4 is a schematic view showing the semiconductor substrate 10 in an exposed state. The exposed part receives hν that is the energy of light. In the drawing, the exposed part is shown as a photosensitive part 30a, and the unexposed part is shown as a non-photosensitive part 30b. In this embodiment, since a negative resist is used as the resist, the polymerization of the resist is promoted in the exposed portion.

  In step P127, the manufacturer performs a PEB process, which is a process for promoting the polymerization of the resist after exposure. In this embodiment, the PEB process is performed at 110 ° C. for 90 seconds.

  FIG. 5 is a schematic diagram showing the semiconductor substrate 10 after the PEB process. PEB treatment promotes the polymerization of chemically amplified negative resist. In addition, as shown in FIG. 5, the alkali layer 20 of the part exposed in process P125 is neutralized with the acid which generate | occur | produced in the exposure location. For this reason, it is considered that the exposed alkali layer 20 does not remain as a single layer after the PEB treatment.

  After the PEB treatment, in step P128, the manufacturer immerses the exposed semiconductor substrate 10 in a developing solution and then cleans it with ultrapure water to remove the resist and the alkali layer 20 in the non-photosensitive portion 30b. In this embodiment, a trimethylammonium hydroxide aqueous solution (trade name: NMD-3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.)) is used as a developer.

  Thereafter, in step P129, the manufacturer performs a post-baking process in order to remove moisture and the like on the semiconductor substrate 10. In this embodiment, the post-baking process is performed at 100 ° C. for 90 seconds.

  FIG. 6 is a schematic diagram showing the semiconductor substrate 10 after the post-baking process. As shown in FIG. 6, the formation of the resist pattern is completed by the post-baking process.

  After the resist pattern formation (process P120), the manufacturer forms electrodes on the first surface 15 of the semiconductor substrate 10 (process P130). In this embodiment, an electrode is formed by vapor deposition, and aluminum is used as the vapor deposition material.

  After forming the electrode (process P130), the manufacturer removes the resist pattern (process P140). In this embodiment, the resist on the semiconductor substrate 10 and the electrode metal material deposited on the resist can be removed by using a lift-off device that sprays the NMP solution with a jet nozzle. In this embodiment, the lift-off method is used as a method for removing the resist pattern, but the method is not limited to this method. As a method for removing the resist pattern, for example, a method of dipping with a chemical solution may be used.

  Through these steps, the semiconductor device 100 is completed. According to this embodiment, the peelability of the chemically amplified negative resist is improved. The following mechanism can be considered as a mechanism for improving the peelability of the chemically amplified negative resist. In the present embodiment, a step of bringing the semiconductor substrate 10 into contact with an alkaline solution (step P110) is provided before the step of applying the chemically amplified negative resist (step P121). The chemically amplified negative resist is promoted to be polymerized by using an acid (PAG: Photo Acid Generator) generated at an exposed portion as a catalyst, so that the adhesion between the resist and the surface of the semiconductor substrate 10 is improved. In this embodiment, since the alkali layer 20 exists on the surface of the semiconductor substrate 10, the acid as a catalyst is neutralized. As a result, resist polymerization at the interface of the semiconductor substrate 10 is suppressed. For this reason, it is considered that the adhesion between the resist and the surface of the semiconductor substrate 10 is suppressed, and the resist peelability at the time of resist stripping is improved.

  As a result of improving the peelability of the resist, the present invention has a problem that it is necessary to perform a plurality of stripping processes, which are problems when stripping a chemically amplified negative resist, and a problem that the stripping process takes a long time. Can be eliminated.

  In the present embodiment, monoethanolamine (boiling point: about 170), which is an alkaline solution having a boiling point equal to or higher than the heat treatment temperatures (pre-bake treatment temperature and post-bake treatment temperature: 100 ° C., PEB treatment temperature: 110 ° C.) during resist pattern formation. ° C). For this reason, volatilization of monoethanolamine during heat treatment can be suppressed. As a result, it is possible to suppress cracks and the like on the resist pattern due to volatilization of monoethanolamine.

B. Variation:
The present invention is not limited to the above-described embodiments, examples, and modifications, and can be realized with various configurations without departing from the spirit thereof. For example, the technical features in the embodiments, examples, and modifications corresponding to the technical features in each embodiment described in the summary section of the invention are to solve some or all of the above-described problems, or In order to achieve part or all of the above-described effects, replacement or combination can be performed as appropriate. Further, if the technical feature is not described as essential in the present specification, it can be deleted as appropriate.

  In the above-described embodiment, the FET is used as the semiconductor device. However, the present invention is not limited to this. That is, in some steps of the semiconductor device manufacturing method, any semiconductor device manufacturing method may be used as long as the method includes a step of forming a resist pattern.

  In the above-described embodiment, the electrode is formed, but the present invention is not limited to this. After forming the resist pattern, the semiconductor substrate may be etched. That is, the present invention only needs to include a step of bringing the semiconductor substrate into contact with the alkaline solution before the step of applying the chemically amplified negative resist.

  In the above-described embodiment, the vapor deposition method is used as a method for forming the electrode, but a sputtering method may be used.

In the above-described embodiment, the material of the substrate is not limited to gallium nitride (GaN), but may be other semiconductors such as silicon (Si), sapphire (Al ₂ O ₃ ), and silicon carbide (SiC).

  In the above-described embodiment, aluminum (Al) is used as the electrode, but the present invention is not limited to this. As an electrode, other metals, such as gold (Au), silver (Ag), copper (Cu), may be sufficient, for example.

DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate 15 ... 1st surface 20 ... Alkali layer 30 ... Resist layer 30a ... Photosensitive part 30b ... Non-photosensitive part 60 ... Electrode layer 100 ... Semiconductor device

Claims (4)

A semiconductor device manufacturing method for manufacturing a semiconductor device including an electrode on a semiconductor substrate,
A first step of bringing an alkaline solution into contact with the first surface of the semiconductor substrate;
A second step of forming a resist pattern on the first surface using a chemically amplified negative resist after the first step;
A third step of forming an electrode on the first surface after the second step;
And a step of removing the resist pattern after the third step. A method of manufacturing a semiconductor device according to claim 1,
The method for manufacturing a semiconductor device, wherein the alkaline solution is water-soluble. A method of manufacturing a semiconductor device according to claim 1 or 2,
The manufacturing method of a semiconductor device, wherein the boiling point of the alkaline solution is equal to or higher than a heat treatment temperature when forming a resist pattern.   A method for forming a resist pattern, comprising a step of bringing a semiconductor substrate into contact with an alkaline solution before the step of applying a chemically amplified negative resist.

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