CN101251713B - Method for deep-UV lithography making T type gate - Google Patents

Method for deep-UV lithography making T type gate Download PDF

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CN101251713B
CN101251713B CN 200810054737 CN200810054737A CN101251713B CN 101251713 B CN101251713 B CN 101251713B CN 200810054737 CN200810054737 CN 200810054737 CN 200810054737 A CN200810054737 A CN 200810054737A CN 101251713 B CN101251713 B CN 101251713B
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deep
step
gate
exposure
photoresist
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CN 200810054737
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CN101251713A (en
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杨中月
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中国电子科技集团公司第十三研究所
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Abstract

The invention discloses a method for manufacturing a T-shaped grate by utilization of deep-UV lithography, comprising the following steps that: a substrate is cleaned and dried and then coated by chemical amplifying deep-UV photoresist; contraposition, alignment, exposure and development are performed by adoption of a deep-UV exposure machine, and a grate root photoresist window graph is formed initially; the photoresist window graph which is formed by exposure is shrunk by adoption of chemical shrinking solution; electron beam slushing compounds are coated; chemical amplifying deep-UV photoresist is coated; contraposition, alignment, exposure and development are performed by adoption of the deep-UV exposure machine; exposure and development are performed by adoption of deep-UV electron beam slushing compounds, and a grate cap photoresist window graph is formed; grate electrode metals are deposited by adoption of the metal evaporation method; the metals are peeled off and the photoresist is stripped, and then manufacture of the T-shaped grate is finished. The method makes a grate root of the T-shaped grate break through the manufacturing limit of superfine lines of a photoetching plate, saves the manufacturing cost of the photoetching plate and simultaneously can realize large-scale deep-submicron processing of compound semiconductor devices.

Description

深紫外光刻制作“T”型栅的方法 Production of deep UV lithography "T" shaped gate method

技术领域 FIELD

[0001] 本发明属于半导体技术中的微电子加工领域,尤其是涉及一种深紫外光刻制作“T”型栅的方法。 [0001] The present invention belongs to the field of microelectronic semiconductor processing technology, more particularly to a method of making a deep ultraviolet lithography "T" type gates.

背景技术 Background technique

[0002] 在高频、微波领域的器件制作中,栅长越短,工作频率也就越高,由于器件的高频增益除了受栅长影响之外,受栅寄生参量栅电阻Rg和栅电容Cgs的影响也很大。 [0002] In the high-frequency, microwave device fabrication art, the shorter the gate length, the higher the operating frequency, high-frequency gain of the device in addition to the influence by the gate length, the gate by the parasitics of the gate resistance Rg and gate capacitance Cgs is also a great influence. 减小栅长, 可以使栅电容Cgs降低,但要保证栅电阻Rg不能降低,为解决Rg和Cgs的矛盾,采用“T”形栅技术是目前最有效工艺途径。 Reducing the gate length, the gate capacitance Cgs can be reduced, but can not be reduced to ensure that the gate resistance Rg, Rg and Cgs to resolve the conflict, using the "T" shaped gate process technology is the most effective way. 目前有许多不同的叫法,如:“T”形栅、蘑菇形栅、“ Γ ”形栅等,是根据其形状而形象化的叫法。 There are many different names, such as: "T" shaped gate, mushroom-shaped gate, "Γ" shaped gate, is the name for visualization of their shapes. 在半导体器件制作的领域,细线条的加工是技术难点, 也是衡量器件水平的主要指标,同样,在化合物半导体器件制作工艺中,栅的制作是关键的制作工艺,“Τ”型栅的加工工艺更是难点中的难点;目前,在深亚微米化合物半导体器件制作中一般采用电子束光刻和多层胶的方法制作“Τ”型栅,一般,在实际工艺制作中,采用I 线曝光可以将“Τ”型栅的栅长做到0. 35微米,采用电子束光刻可以将栅长做到0. 1微米以下,目前国内外已有此方面的专利以及大量的相关论文,但是,由于受到设备的影响,电子束光刻制作“Τ”型栅的加工效率极低,而采用i线光刻制作的“T”型栅栅长又不能满足器件对栅长日益提高的要求;本发明采用深紫外(DUV)光刻和多层胶的方法,并采用化学缩细的分辨率增强技术,进一步将栅长降低,并增加了工艺的宽容度。 In the field of semiconductor device fabrication, fine-line processing is the technical difficulties, is a key measure of device levels, likewise, the compound semiconductor device fabrication process, forming the gate is critical to the production process, "Τ" shaped gate processing technology more difficult is the difficulty; currently, deep sub-micron semiconductor device fabrication method compounds of general electron beam lithography and the production of the multilayer plastic "Τ" type gate, in general, in the actual production process, the I-line exposure may be employed the "Τ" type gate gate length to achieve 0.35 micron gate length using electron beam lithography can achieve 0.1 microns or less, there are patents in this regard at home and abroad as well as a large number of relevant papers, however, due to the impact device, an electron beam photolithography processing efficiency "Τ" type gate is very low, while the use of the "T" grid length of the i-line photolithography devices can not meet the increasing gate length requirements; this invention using deep ultraviolet (DUV) photolithography and multilayer gum, narrowing and chemical resolution enhancement technique, the gate length is further decreased, and increasing process latitude.

发明内容 SUMMARY

[0003] 本发明需要解决的技术问题是提供一种采用深紫外光刻制作“T”型栅的方法,采用化学缩细的分辨率增强技术,进一步将栅长降低,并增加了工艺的宽容度。 [0003] The present invention is a technical problem to be solved is to provide a deep UV photolithography making use of the "T" grid method, chemical narrowing of resolution enhancement technique, the gate length is further decreased, and increased process tolerance degree.

[0004] 为解决上述问题,本发明所采取的技术方案是:一种深紫外光刻制作“T”型栅的方法,该方法包括下面步骤: [0004] In order to solve the above problems, the present invention is adopted technical solution is: A deep ultraviolet lithography making "T" shaped gate method, the method comprising the steps of:

[0005] 步骤1、清洗衬底并进行干燥, [0005] Step 1, cleaning and drying the substrate,

[0006] 步骤2、在干燥后的衬底上涂敷用于248nm波长的深紫外化学放大光刻胶, DUV Chemistry [0006] Step 2, after drying on the substrate coating for 248nm wavelength amplified photoresists,

[0007] 步骤3、采用深紫外曝光机进行对位套刻、曝光、显影,初步形成栅根的光刻胶窗口图形, [0007] Step 3, using deep ultraviolet exposure machine overlay alignment, exposure, development, resist the initial root window gate pattern is formed,

[0008] 步骤4、采用Clariant公司的RELACS™材料作为化学缩细溶液,对曝光显影开出的光刻胶窗口图形进行缩细处理;所述的缩细处理是将RELACS™材料用旋涂机旋转涂敷在栅根图形上,涂敷完成后在90摄氏度-130摄氏度温度下烘烤产生交联作用,经过溶解作用, 交联的部分形成不能溶解的一层薄膜,从而进一步降低栅长, [0008] Step 4, using the company Clariant RELACS ™ material as a chemical solution, a narrowing of the resist is exposed and developed out of a window graphics narrowing process; the narrowing process is RELACS ™ material using a spin coater spin-coated on the root of the gate pattern, after the completion of baking coating crosslinking effect at 90 -130 degrees Celsius, after dissolution, crosslinked partially insoluble form a film, thereby further reducing the gate length,

[0009] 步骤5、涂敷光刻胶电子束抗蚀剂, [0009] Step 5, photoresist is applied electron beam resist,

[0010] 步骤6、涂敷用于248nm波长的深紫外化学放大光刻胶, [0010] Step 6 coated DUV chemically amplified photoresists for 248nm wavelength,

[0011] 步骤7、采用深紫外曝光机进行对位套刻、曝光、显影,在化学放大光刻胶上光刻出窗口, [0011] Step 7, using deep ultraviolet exposure machine overlay alignment, exposure, development, coating the chemically amplified resist carved window,

3[0012] 步骤8、采用深紫外光对电子束抗蚀剂进行曝光,并显影,形成栅帽的光刻胶窗口图形, 3 [0012] Step 8, using deep ultraviolet electron beam resist is exposed and developed to form a resist pattern of the gate window of the cap,

[0013] 步骤9、采用金属蒸发的方法淀积栅电极的金属, [0013] Step 9, using the metal evaporation depositing a metal gate electrode,

[0014] 步骤10、剥离金属、去胶,完成“T”型栅的制作。 [0014] Step 10, stripped metal, to glue, to complete the production of the gate-type "T".

[0015] 采用上述技术方案所产生的有益效果在于:采用本方法,使“T”型栅的栅长可以突破光刻版最细线条制作的限制,节省光刻版的制作费用,同时可以使化合物半导体器件的深亚微米加工实现规模化。 [0015] With the above technical solutions that produced beneficial effects: According to the present method, so that "T" type gate gate length may break out of the fine line lithographic printing plate production, lithograph saving production costs, while allowing deep submicron compound semiconductor device processing achieve economies of scale.

[0016] 附图说明 [0016] BRIEF DESCRIPTION OF DRAWINGS

[0017] 图1是本发明衬底结构示意图; [0017] FIG. 1 is a schematic view of a substrate structure according to the present invention;

[0018] 图2是本发明涂敷光刻胶的衬底结构示意图; [0018] FIG. 2 is a schematic view of a substrate structure according to the present invention, photoresist is coated;

[0019] 图3是本发明图2光刻示意图; [0019] FIG. 3 is a schematic view of FIG. 2 lithography of the present invention;

[0020] 图4是本发明图2光刻后结构示意图; [0020] Figure 4 is a schematic lithographic structure 2 of the present invention;

[0021] 图5是本发明图4缩细后结构示意图; [0021] FIG. 5 is a schematic view of the invention after narrowing structure 4;

[0022] 图6是本发明图5涂敷抗蚀剂层和光刻胶层后的结构示意图; [0022] FIG. 6 is a schematic structural view of the invention after applying a resist layer 5 and a photoresist layer;

[0023] 图7是本发明图6光刻后的结构示意图; [0023] FIG. 7 is a schematic structural view of the invention after 6 lithography;

[0024] 图8是本发明“T”型栅结构示意图。 [0024] FIG. 8 is a schematic view of a gate-type "T" structure of the present invention.

具体实施方式 Detailed ways

[0025] 下面结合附图对本发明做进一步详细描述: [0025] DRAWINGS The present invention will be described in detail:

[0026] 如图1所示,衬底1采用通用清洗方法,使衬底1干净,无沾污,并在150摄氏度到180摄氏度的干净的环境中烘干衬底1表面的水分。 [0026] As shown in FIG. 1, the substrate 1 using a common washing method, the substrate 1 a clean, contaminant free, water and dried surface of the substrate 1 in a clean environment 150 degrees Celsius to 180 degrees Celsius.

[0027] 如图2所示,在衬底上涂敷用于248纳米波长光刻的化学放大光刻胶2,光刻胶2 分辨率0. 2微米以上,厚度约3000-5000埃,采用UV135光刻胶,在90摄氏度-130摄氏度的温度下,烘烤60秒-90秒。 [0027] 2, the chemical is applied on the substrate for a wavelength of 248 nm lithography 2 amplified photoresists, photoresist resolution of 0.2 microns or more, a thickness of about 3000-5000 angstroms, using UV135 photoresist at a temperature of 90 ° C -130 ° C, baked for 60 seconds to -90 seconds.

[0028] 如图3所示,采用深紫外(波长248nm)曝光机进行对位套刻、曝光,并根据光刻机的分辨率性能和所需的栅长选择合适的光刻版,采用浓度2. 38%的四甲基氢氧化氨(TMAH)溶液显影60秒左右,初步形成栅根的光刻胶窗口图形如图4所示。 [0028] 3, using deep UV (wavelength of 248 nm) exposure apparatus for overlay alignment, exposure, and select the appropriate length depending on the resolution performance of the lithographic photomask and the desired gate machine using concentration window resist pattern developing solution of 2.38% tetramethyl ammonium hydroxide (TMAH) for 60 seconds to form a gate initial root shown in FIG.

[0029] 如图5所示,采用Clariant公司的RELACS™材料,对开出的栅根的光刻胶窗口图形如图4进行缩细处理;将RELACS™材料用旋涂机上旋转涂敷在栅根图形上,涂敷完成后在90摄氏度-130摄氏度温度下烘烤产生交联作用,经过溶解作用,交联的部分形成不能溶解的一层薄膜,从而进一步降低栅长(至少可以将栅长缩小0.1微米)。 [0029] As shown in FIG. 5, using the company Clariant RELACS ™ material, resist pattern outside the gate window root narrowing process in FIG. 4; the RELACS ™ material is spin-coated on a spin coater with the gate root pattern, baking after coating is completed to produce cross-linking at 90 -130 degrees Celsius, after dissolution, crosslinked partially insoluble form a film, thereby further reducing the gate length (gate length may be at least narrow 0.1 micron).

[0030] 如图6所示,涂敷电子束光刻胶PMMA胶8,厚度由栅金属的厚度要求决定,在温度130-200摄氏度环境下烘烤20-30分钟,再涂敷用于248纳米波长光刻的化学放大光刻胶5,分辨率0. 15微米以上,厚度3000-5000埃,前烘条件根据光刻胶的类型确定,采用UV135, 在温度90摄氏度-130摄氏度的环境下烘烤60秒-90秒。 [0030] shown in Figure 6, the electron beam resist PMMA coating rubber 8, a thickness of the gate metal thickness required depends on, baked at 130-200 ° C environment for 20-30 minutes, then applied for 248 chemical amplification resist nm lithography 5, the resolution of 0.15 m or more, a thickness of 3000-5000 angstroms, prebaked type determination condition according photoresist using UV135, at a temperature of 90 ° C -130 ° C environment baked for 60 seconds -90 seconds.

[0031] 如图7所示,采用深紫外(波长248nm)曝光机进行对位套刻、曝光,采用浓度2. 38%的四甲基氢氧化氨溶液显影60秒,采用波长220纳米-248纳米的深紫外光源大面积曝光;甲苯显影,再用氧等离子体去除残存的底膜,形成“T”型栅的光刻胶剖面如图形7。 [0031] 7 using deep UV (wavelength of 248 nm) exposure apparatus for overlay alignment, exposure, using a concentration of 2.38% tetramethyl ammonium hydroxide solution for 60 seconds, using a wavelength of 220 nm -248 deep UV light source a large area of ​​exposure nm; toluene developing, and then removing the base film residual oxygen plasma to form a "T" cross section of the resist pattern 7 as a gate type.

[0032] 采用金属蒸发的方法淀积栅电极的金属,采用通用的剥离技术进行金属剥离,并去掉残留的光刻胶得到如图8所示的“T”型栅7。 [0032] The metal deposition method of evaporating a metal gate electrode, using a common technique metal peeled peeled off, and the remaining photoresist is removed as shown in Figure 8 to give a "T" shaped gate 7.

Claims (1)

  1. 一种深紫外光刻制作“T”型栅的方法,其特征在于:该方法包括下面步骤:步骤1、清洗衬底并进行干燥,步骤2、在干燥后的衬底上涂敷用于248nm波长的深紫外化学放大光刻胶,步骤3、采用深紫外曝光机进行对位套刻、曝光、显影,初步形成栅根的光刻胶窗口图形,步骤4、采用Clariant公司的RELACSTM材料作为化学缩细溶液,对曝光显影开出的光刻胶窗口图形进行缩细处理;所述的缩细处理是将RELACSTM材料用旋涂机旋转涂敷在栅根图形上,涂敷完成后在90摄氏度-130摄氏度温度下烘烤产生交联作用,经过溶解作用,交联的部分形成不能溶解的一层薄膜,从而进一步降低栅长,步骤5、涂敷光刻胶电子束抗蚀剂,步骤6、涂敷用于248nm波长的深紫外化学放大光刻胶,步骤7、采用深紫外曝光机进行对位套刻、曝光、显影,在化学放大光刻胶上光刻出窗口,步骤8、 A dark ultraviolet lithography manufacturing method of the "T" gate, wherein: the method comprising the following steps: Step 1, the substrate was washed and dried, step 2, on the substrate after drying the coating for 248nm DUV wavelengths chemically amplified photoresists, step 3, using deep ultraviolet exposure machine overlay alignment, exposure, development, resist the initial root window gate pattern is formed, step 4, using the company Clariant as a chemical material RELACSTM a narrowing solution, exposure and development of the photoresist out of the window graphics narrowing process; the narrowing process is a spin-coated material after RELACSTM with a spin coater on the gate root pattern coated at 90 degrees C to complete generating cross-linking baking, after dissolution, crosslinked partially insoluble form a film at a temperature of -130 ° C to further reduce the gate length, the step 5, a photoresist is applied electron beam resist, step 6 coated DUV chemically amplified photoresists for 248nm wavelength, step 7, using deep ultraviolet exposure machine overlay alignment, exposure, development, coating the chemically amplified resist carved window, step 8, 采用深紫外光对电子束抗蚀剂进行曝光,并显影,形成栅帽的光刻胶窗口图形,步骤9、采用金属蒸发的方法淀积栅电极的金属,步骤10、剥离金属、去胶,完成“T”型栅的制作。 Using deep ultraviolet light electron beam resist is exposed and developed to form a resist pattern of the gate window cap, step 9, the metal deposition method of evaporating a metal gate electrode 10, a metal stripping step of stripping, complete the production of shaped gate of "T".
CN 200810054737 2008-04-07 2008-04-07 Method for deep-UV lithography making T type gate CN101251713B (en)

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CN102738698B (en) * 2012-06-27 2013-10-30 浙江大学 Production method of deep submicron etched groove based on ultraviolet lithography process
CN104037214A (en) * 2014-06-26 2014-09-10 中国电子科技集团公司第十三研究所 Grid-control semiconductor device for improving short channel effect
CN104701154A (en) * 2015-03-11 2015-06-10 北京工业大学 Preparation method for sub-half-micron T-shaped gate via chemical shrinkage method
CN104900503B (en) * 2015-04-28 2018-05-01 厦门市三安集成电路有限公司 t type gate a high ion mobility transistor fabrication method
CN105511233B (en) * 2015-12-28 2017-09-05 中国电子科技集团公司第十三研究所 Two electron beam exposure method Preparation of the t-gate
CN108807162A (en) * 2018-05-28 2018-11-13 苏州汉骅半导体有限公司 T-shaped grid preparation method

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CN1661779A (en) 2004-01-29 2005-08-31 罗姆及海斯电子材料有限公司 T-gate formation
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CN1337600A (en) 2001-09-13 2002-02-27 信息产业部电子第十三研究所 Phase shifting mask etching process of producing T-shaped grid through one photo-etching step
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