JP2016015375A - Light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emitting element connected to a substrate having (AlGaIn)O(0≤x≤1,0≤y≤1,0≤z≤1, x+y+z=1) crystal as a mother crystal, and having an n-side electrode with high optical reflectance.SOLUTION: In one embodiment, a light emitting element 1 which has an n-type semiconductor substrate 10 containing (AlGaIn)Ocrystal as a mother crystal and an n-side electrode 15 connected to the n-type semiconductor substrate 10, and in which the n-side electrode 15 has a laminated structure including a Ti layer 15a contacting with the n-type semiconductor substrate 10 and an Ag layer 15b containing Ag on the Ti layer 15a as a main component, is provided.

Description

  The present invention relates to a light emitting element.

Conventionally, _Ga 2 _{O 3} LED elements formed on a substrate is known (e.g., see Patent Document 1).

In the LED element of Patent Document 1, a Ti / Au electrode having a laminated structure in which a Ti film and an Au film are laminated is used as an n-side electrode connected to a Ga ₂ O ₃ substrate. Since Ti makes ohmic contact with Ga ₂ O ₃ with low resistance, the contact resistance between the Ti / Au electrode and the Ga ₂ O ₃ substrate can be lowered.

Japanese Patent No. 5078039

On the other hand, since Ti does not have a high light reflectivity, in the LED element of Patent Document 1, the Ti / Au electrode absorbs light that travels in the Ga ₂ O ₃ substrate and travels toward the Ti / Au electrode. This is a cause of lowering the light extraction efficiency.

One object of the present invention is to provide a substrate having an (Al _x Ga _y In _z ) ₂ O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) crystal as a mother crystal. It is providing the light emitting element which has an n side electrode with a high light reflectance connected to.

  In order to achieve the above object, one embodiment of the present invention provides the following light-emitting elements [1] to [8].

[1] An n-type semiconductor substrate having (Al _x Ga _y In _z ) ₂ O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) crystal as a mother crystal, an n-side electrode connected to an n-type semiconductor substrate, wherein the n-side electrode includes a Ti layer in contact with the n-type semiconductor substrate and an Ag layer mainly composed of Ag on the Ti layer. A light-emitting element having a stacked structure.

[2] The light emitting device according to [1], wherein the thickness of the Ti layer is 4.5 nm or less.

[3] The light emitting device according to [2], wherein the thickness of the Ti layer is 2 nm or less.

[4] The light emitting device according to any one of [1] to [3], wherein the thickness of the Ti layer is 0.5 nm or more.

[5] The light emitting device according to any one of [1] to [4], wherein the Ag concentration of the Ag layer is 95% or more.

[6] The light emitting device according to any one of [1] to [5], wherein the n-type semiconductor substrate is made of a Ga ₂ O ₃ crystal.

[7] A pad electrode having a laminated structure including a barrier metal and a pad layer mainly composed of Au is formed on the n-side electrode, and the barrier metal is interposed between the n-side electrode and the pad layer. The light emitting device according to any one of [1] to [6], wherein the light emitting device is located at a position where the reaction between Ag contained in the Ag layer and Au contained in the pad layer is prevented.

[8] The light emitting device according to any one of [1] to [7], wherein the n-side electrode is a through electrode.

According to the present invention, (Al _x Ga _y In _z ) ₂ O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) is connected to a substrate having a crystal as a mother crystal. In addition, a light-emitting element having an n-side electrode with high light reflectance can be provided.

FIG. 1A is a vertical cross-sectional view of the light emitting device according to the first embodiment. FIG. 1B is an enlarged cross-sectional view of the n-type electrode and the pad electrode of the light emitting element. FIG. 2 is a graph showing the relationship between the thickness of the Ti layer of the n-side electrode and the contact resistance between the n-side electrode and the n-type semiconductor substrate. FIG. 3 is a graph showing the relationship between the thickness of the Ti layer of the n-side electrode and the reflectance of light incident from the Ti layer side of the n-side electrode. FIG. 4 is a vertical cross-sectional view of the light emitting device according to the second embodiment. FIG. 5 is a vertical sectional view of the light emitting device according to the third embodiment.

[First Embodiment]
(Structure of light emitting element)
FIG. 1A is a vertical cross-sectional view of the light-emitting element 1 according to the first embodiment.

  The light-emitting element 1 includes an n-type semiconductor substrate 10, an n-type semiconductor layer 12 formed on one surface of the n-type semiconductor substrate 10 via a dielectric layer 11, and an n-type semiconductor substrate 10 of the n-type semiconductor layer 12. A p-type semiconductor layer 14 formed on the opposite side of the n-type semiconductor layer, a light-emitting layer 13 sandwiched between the n-type semiconductor layer 12 and the p-type semiconductor layer 14, and a surface of the n-type semiconductor substrate 10 opposite to the n-type semiconductor layer 12 Connected to the n-side electrode 15 connected above, the pad electrode 16 on the surface of the n-side electrode 15 opposite to the n-type semiconductor substrate 10, and the surface of the p-type semiconductor layer 14 opposite to the light emitting layer 13. And the pad electrode 18 on the surface of the p-side electrode 17 opposite to the p-type semiconductor layer 14.

Further, the dielectric layer 11, n-type semiconductor layer 12, the side surface of the formed laminate a light emitting layer 13, p-type semiconductor layer 14 is covered with an insulating film 19 made of an insulating material such as SiO _2.

  FIG. 1B is an enlarged cross-sectional view of the n-type electrode 15 and the pad electrode 16 of the light-emitting element 1.

  The n-side electrode 15 includes a Ti layer 15a that is in contact with the n-type semiconductor substrate 10 so that the n-side electrode 15 is in ohmic contact with the n-type semiconductor substrate 10, and an Ag layer that reflects light transmitted through the Ti layer 15a. 15b. An arrow in FIG. 1B schematically represents a path of light emitted from the light emitting layer 13 and reflected by the n-side electrode 15.

The Ti layer 15a is made of Ti. Ti is in ohmic contact with an n-type (Al _x Ga _y In _z ) ₂ O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) crystal with low resistance, It has the property of low light reflectance.

  The Ag layer 15b is made of a material containing Ag as a main component, that is, Ag or an Ag alloy. The Ag concentration of the Ag layer 15b is preferably 95% or more in order to increase the reflectance.

  The thickness of the Ti layer 15a is preferably 4.5 nm or less in order to suppress the light emitted from the light emitting layer 13 from being absorbed by the Ti layer 15a and suppress the decrease in the reflectivity of the n-side electrode 15. The following is more preferable. Further, in order to bring the n-side electrode 15 into contact with the n-type semiconductor substrate 10 with low resistance, the thickness is preferably 0.5 nm or more.

  The thickness of the Ag layer 15b may be a thickness that can reflect the light emitted from the light emitting layer 13 without transmitting it, and is, for example, 270 nm.

  The pad electrode 16 has a laminated structure including an adhesion layer 16a, a barrier metal 16b, and a pad layer 16c. The pad layer 16c is a low resistance layer to which an external electrode is connected by wire bonding or the like, and is made of Au. The barrier metal 16b prevents diffusion of Ag contained in the Ag layer 15b from the Ag layer 15b to the pad layer 16c, and prevents reaction between Ag contained in the Ag layer 15b and Au contained in the pad electrode 16. The adhesion layer 16 a is a layer for closely attaching the pad electrode 16 to the n-side electrode 15.

  The adhesion layer 16a is made of, for example, a Ni film having a thickness of 10 nm. The barrier metal 16b has, for example, a stacked structure including a Ti film having a thickness of 50 nm and a Pt film having a thickness of 20 nm. The pad layer 16c is made of, for example, an Au film having a thickness of 4000 nm.

  The p-side electrode 17 is an electrode that is in ohmic contact with the p-type semiconductor layer 14. For example, an Ag alloy film with a thickness of 270 nm, an Ag concentration of 99%, a Ni film with a thickness of 10 nm, and an Au film with a thickness of 10 nm It has the laminated structure which laminated | stacked.

  The pad electrode 18 has a laminated structure in which, for example, a Ti film having a thickness of 100 nm, a Pt film having a thickness of 50 nm, and an Au film having a thickness of 500 nm are laminated.

The n-type semiconductor substrate 10 has (Al _x Ga _y In _z ) ₂ O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) crystal as a mother crystal, and Si N-type dopants such as

The higher the n-type dopant concentration of the n-type semiconductor substrate 10 is, the lower the electrical resistance is, but there is a problem that light absorption increases. Therefore, the concentration of the n-type dopant in the n-type semiconductor substrate 10 is preferably 1 × 10 ¹⁹ / cm ⁻³ or less and more preferably 5 × 10 ¹⁸ / cm ⁻³ or less in order to suppress light absorption. preferable. Moreover, in order to ensure electroconductivity, it is preferable that it is 5 * 10 < ¹⁷ > / cm < ^-3 > or more.

  The n-type semiconductor substrate 10 preferably has irregularities on the surface on which the n-side electrode 15 is formed. By forming the irregularities, the light extraction efficiency of the light emitting element 1 is improved.

The n-type semiconductor layer 12 has an Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) crystal as a mother crystal, and is an n-type such as Si Contains a dopant. The n-type semiconductor layer 12 has a single-layer structure composed of an n-type clad layer or a multilayer structure including an n-type clad layer, for example, a single-layer structure composed of an n-type clad layer having a thickness of 5 μm.

The light emitting layer 13 includes, for example, five undoped (In _x Ga _1-x ) N (0 ≦ x ≦ 1) crystal films having a thickness of 2 nm and five undoped layers (In _y Ga _1-y ) having a thickness of 6 nm. N (0 ≦ y ≦ 1, y ≦ x) has a multiple quantum well structure in which crystal layers are alternately stacked one by one. The emission wavelength of the light emitting layer 13 is, for example, 450 nm.

The p-type semiconductor layer 14 has an Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) crystal as a mother crystal, and is a p-type such as Mg. Contains a dopant. The p-type semiconductor layer 14 has a single-layer structure composed of a p-type cladding layer or a multilayer structure including the p-type cladding layer. For example, a p-type cladding layer having a thickness of 50 nm in contact with the light-emitting layer 13, and p It has a multilayer structure consisting of a p-type contact layer having a thickness of 10 nm in contact with the side electrode 17.

The dielectric layer 11, a SiN layer and HfO ₂ mainly composed of SiN of HfO ₂ layer mainly composed, a dielectric layer a difference in refractive index is 0.15 or less of the n-type semiconductor substrate 10 is there. For example, when the refractive index of the n-type semiconductor substrate 10 is 1.9, the refractive index of the dielectric layer 11 is 1.75 or more and 2.05 or less.

  Dielectric layer 11 is formed on n-type semiconductor substrate 10 so as to partially cover the surface of n-type semiconductor substrate 10. The pattern shape of the dielectric layer 11 is not limited and is, for example, a mesa pattern, a recess pattern, or a line and space pattern.

  When the refractive index of the dielectric layer 11 is closer to the refractive index of the n-type semiconductor substrate 10, the total reflection at the interface between the n-type semiconductor substrate 10 and the dielectric layer 11 is suppressed, and the emitted light is efficiently extracted. Can do. When the dielectric layer 11 is a SiN layer, elements other than Si and N such as O may be included.

  The refractive index of the dielectric layer 11 is adjusted by controlling the formation conditions such as the film formation temperature of the dielectric layer 11, and the difference between the refractive index of the dielectric layer 11 and the refractive index of the n-type semiconductor substrate 10 is further increased. Can be small.

Incidentally, for example, the case of forming the SiO ₂ layer a difference in refractive index is large between the n-type semiconductor substrate 10 instead of the dielectric layer 11, the reflectivity of the interface between the SiO ₂ layer and the n-type semiconductor substrate 10 is large, n The light transmittance between the type semiconductor substrate 10 and the n-type semiconductor layer 12 is lowered. The refractive index of the SiO ₂ layer is approximately 1.4 to 1.55, and the difference from the refractive index of the n-type semiconductor substrate 10 is 0.35 or more.

  Since the n-type semiconductor layer 12 is formed by epitaxial crystal growth using the surface of the n-type semiconductor substrate 10 as a base, the dielectric layer 11 does not completely cover the surface of the n-type semiconductor substrate 10. The n-type semiconductor layer 12 contacts the dielectric layer 11 and a portion of the surface of the n-type semiconductor substrate 10 that is not covered by the dielectric layer 11.

  The nitride semiconductor crystal constituting the n-type semiconductor layer 12 grows from a region not covered by the dielectric layer 11 on the upper surface of the n-type semiconductor substrate 10 and does not grow from the dielectric layer 11. Thus, the nitride semiconductor crystal grows selectively and further grows in the lateral direction, thereby covering the dielectric layer 11. At this time, the dislocation density in the n-type semiconductor layer 12 is reduced, and the crystal quality is improved. Such a crystal growth method using selective lateral growth is called ELO (Epitaxial Lateral Overgrowth).

  In the light emitting element 1, light is easily scattered between the n-type semiconductor layer 12 and the dielectric layer 11 because the dielectric layer 11 is patterned, thereby suppressing multiple total reflection in the n-type semiconductor layer and the like. Thus, loss can be suppressed. Further, between the dielectric layer 11 and the n-type semiconductor substrate 10, light is easily transmitted because the difference in refractive index between the dielectric layer 11 and the n-type semiconductor substrate 10 is small. For this reason, the light extraction efficiency between the n-type semiconductor layer 12 and the n-type semiconductor substrate 10 in the light-emitting element 1 is high.

  The light-emitting element 1 is, for example, an LED (Light Emitting Diode) that extracts light from the n-type semiconductor substrate 10 side, and is mounted on a can-type stem using AuSn eutectic bonding or the like.

  The light emitting element 1 may be a laser diode. In the case of a laser diode, the refractive index difference between the light emitting layer 13 and the n-type semiconductor layer 12 and the light emitting layer 13 and the p-type semiconductor layer 14 is such that light is repeatedly reflected and amplified in the light emitting layer 13. The light emitting layer 13 has a structure in which the side surface is a cleavage plane.

(Manufacturing method of light emitting element)
Below, an example of the manufacturing method of the light emitting element of this Embodiment is demonstrated.

  First, organic cleaning and SPM (Sulfuric acid / hydrogen peroxide mixture) cleaning are performed on the n-type semiconductor substrate 10 that has been subjected to CMP (Chemical Mechanical Polishing).

  Next, the dielectric layer 11 is formed on the n-type semiconductor substrate 10. Specifically, a SiN film having a thickness of about 1 μm formed on the n-type semiconductor substrate 10 at a growth temperature of 300 to 350 ° C. by a plasma CVD (Chemical Vapor Deposition) method or the like is processed by photolithography and dry etching. Thus, the dielectric layer 11 is formed.

  Next, the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14 are sequentially epitaxially grown on the n-type semiconductor substrate 10 by MOCVD or the like. Here, the n-type semiconductor layer 12 is formed at a growth temperature of 1000 to 1100 ° C., for example. The light emitting layer 13 is formed at a growth temperature of 700 to 800 ° C., for example. The p-type semiconductor layer 14 is formed at a growth temperature of 900 to 1050 ° C., for example.

  Next, the n-side electrode 15 and the p-side electrode 17 are formed. Specifically, the n-side electrode 15 and the p-side electrode 17 are each subjected to heat treatment under conditions of 500 ° C. and 5 minutes in a nitrogen atmosphere after forming each of the above laminated structures by photolithography and vapor deposition, for example. Is obtained. Before forming the n-side electrode 15, it is preferable to form irregularities on the surface of the n-type semiconductor substrate 10 where the n-side electrode 15 is formed by photolithography and dry etching. Thereafter, the pad electrode 16 is formed on the n-side electrode 15.

  Next, after mesa processing is performed on the laminated body composed of the dielectric layer 11, the n-type semiconductor layer 12, the light emitting layer 13, and the p-type semiconductor layer 14 by photolithography and dry etching, the side surface of the laminated body is removed. An insulating film 19 is formed by sputtering or the like so as to cover it. The insulating film 19 on the p-side electrode 17 is selectively removed by photolithography and etching. Thereafter, the pad electrode 18 is formed on the p-side electrode 17.

  Next, the n-type semiconductor substrate 10 in a wafer state is divided by dicing to obtain a light emitting device 1 that is made into chips. The planar shape of the light-emitting element 1 formed into a chip is, for example, a square having a length of 1 mm.

(Evaluation of contact resistance between n-side electrode and n-type semiconductor substrate)
FIG. 2 is a graph showing the relationship between the thickness of the Ti layer 15 a of the n-side electrode 15 and the contact resistance between the n-side electrode 15 and the n-type semiconductor substrate 10. Here, in this evaluation, a Ga ₂ O ₃ substrate was used as the n-type semiconductor substrate 10, and an Ag alloy having an Ag concentration of 99% and a Pd concentration of 1% was used as the Ag layer 15 b of the n-side electrode 15.

The plot mark の in FIG. 2 is a measured value when the carrier concentration of the n-type semiconductor substrate 10 is 3.0 × 10 ¹⁸ / cm ³ . The plot mark ◯ is a measured value when the carrier concentration of the n-type semiconductor substrate 10 is 7.0 × 10 ¹⁸ / cm ³ . The plot mark □ is a measured value when the carrier concentration of the n-type semiconductor substrate 10 is 1.3 × 10 ¹⁹ / cm ³ .

Also, the three dotted lines in FIG. 2 represent the contact resistance between a conventional Ti / Au electrode having a laminated structure in which a 50 nm thick Ti film and a 500 nm thick Au film are laminated and the n-type semiconductor substrate 10. These three dotted lines indicate the case where the carrier concentration of the n-type semiconductor substrate 10 is 3.0 × 10 ¹⁸ / cm ³ , 7.0 × 10 ¹⁸ / cm ³ , and 1.3 × 10 ¹⁹ / cm ³ , respectively. Represents the measured value.

  FIG. 2 shows that when the thickness of the Ti layer 15a is at least 0.5 nm or more, the contact resistance with the n-type semiconductor substrate 10 becomes sufficiently small (the contact resistance of the conventional Ti / Au electrode). Is small enough if not.) When the thickness of the Ti layer 15a is 0, that is, when the Ti layer 15a is not provided, the n-side electrode 15 and the n-type semiconductor substrate 10 are not in ohmic contact, and current does not flow easily.

From the result of this evaluation, it was found that when the n-side electrode 15 is connected to the Ga ₂ O ₃ substrate, the thickness of the Ti layer 15a is preferably 0.5 nm or more.

In addition, since the Ga ₂ O ₃ crystal and the (Al _x Ga _y In _z ) ₂ O ₃ crystal have substantially the same characteristics, when the n-side electrode 15 is connected to the n-type semiconductor substrate 10, the Ti layer 15 a It can be said that the thickness is preferably 0.5 nm or more.

(Evaluation of light reflectance of n-side electrode)
FIG. 3 is a graph showing the relationship between the thickness of the Ti layer 15 a of the n-side electrode 15 and the reflectance of light incident from the Ti layer 15 a side of the n-side electrode 15. The vertical axis in FIG. 3 represents the relative reflectance with reference to the reflectance (100%) of an Ag mirror with an Ag concentration of 100%. Here, in this evaluation, an Ag alloy having an Ag concentration of 99% and a Pd concentration of 1% was used as the Ag layer 15b of the n-side electrode 15.

  The plot mark ◆ in FIG. 3 is a measured value of the n-side electrode 15 that has not been annealed after film formation, and the plot mark □ is a measured value of the n-side electrode 15 that has been annealed after film formation. FIG. 3 shows that the reflectance of the n-side electrode 15 hardly changes before and after the annealing process.

  The dotted line in FIG. 3 shows the relative reflectance (53.5%) of a conventional Ti / Au electrode having a laminated structure in which a Ti film having a thickness of 50 nm and an Au film having a thickness of 500 nm are laminated. According to FIG. 3, the reflectance is higher than that of the conventional Ti / Au electrode when the thickness of the Ti layer 15a of the n-side electrode 15 is about 4.5 nm or less. And relative reflectance becomes larger than 80% when it is about 2.0 nm or less.

  Table 1 below shows the numerical values at each measurement point shown in FIG.

  From the result of this evaluation, it was found that the thickness of the Ti layer 15a of the n-side electrode 15 is preferably 4.5 nm or less, and more preferably 2.0 nm or less.

[Second Embodiment]
The second embodiment is a mode of a light emitting element having a structure different from that of the light emitting element 1 of the first embodiment. The description of the same points as those of the first embodiment, such as the constituent members of the light emitting element, will be omitted or simplified.

(Structure of light emitting element)
FIG. 4 is a vertical cross-sectional view of the light-emitting element 2 according to the second embodiment.

  The light-emitting element 2 includes an n-type semiconductor substrate 10, an n-type semiconductor layer 12 formed on one surface of the n-type semiconductor substrate 10 via a dielectric layer 11, and an n-type semiconductor substrate 10 of the n-type semiconductor layer 12. The p-type semiconductor layer 14 formed on the opposite side, the n-type semiconductor layer 12 and the light-emitting layer 13 sandwiched between the p-type semiconductor layers 14 and the n-type semiconductor layer 12 of the n-type semiconductor substrate 10 are formed. N-side electrode 15 connected on the side surface, pad electrode 16 on the side of n-side electrode 15 opposite to n-type semiconductor substrate 10, and surface of p-type semiconductor layer 14 opposite to light-emitting layer 13 The upper p-side electrode 17 and the pad electrode 18 on the surface opposite to the p-type semiconductor layer 14 of the p-side electrode 17 are provided.

Further, the dielectric layer 11, n-type semiconductor layer 12, the side surface of the formed laminate a light emitting layer 13, p-type semiconductor layer 14 is covered with an insulating film 19 made of an insulating material such as SiO _2.

  The light-emitting element 2 is a horizontal light-emitting element, and is the first embodiment in that the n-side electrode 15 is connected to the surface of the n-type semiconductor substrate 10 on the side where the n-type semiconductor layer 12 is formed. It differs from the light emitting element 1 which concerns on.

  Since the n-side electrode 15 of the light-emitting element 2 has the same stacked structure as the n-side electrode 15 of the light-emitting element 1 according to the first embodiment, the n-side electrode 15 is emitted from the light-emitting layer 13 and passes through the n-type semiconductor substrate 10. Light traveling toward the side electrode 15 can be efficiently reflected. For this reason, the light emitting element 2 has high light extraction efficiency similarly to the light emitting element 1 which concerns on 1st Embodiment.

[Third Embodiment]
The third embodiment is a mode of a light emitting element having a structure different from that of the light emitting element 1 of the first embodiment. The description of the same points as those of the first embodiment, such as the constituent members of the light emitting element, will be omitted or simplified.

(Structure of light emitting element)
FIG. 5 is a vertical sectional view of the light-emitting element 3 according to the third embodiment.

  The light-emitting element 3 includes an n-type semiconductor substrate 10, an n-type semiconductor layer 12 formed on one surface of the n-type semiconductor substrate 10 via a dielectric layer 11, and an n-type semiconductor substrate 10 of the n-type semiconductor layer 12. On the opposite side of the p-type semiconductor layer 14, the light-emitting layer 13 sandwiched between the n-type semiconductor layer 12 and the p-type semiconductor layer 14, and the surface of the p-type semiconductor layer 14 opposite to the light-emitting layer 13. The formed p-side electrode 22, the dielectric layer 11, the n-type semiconductor layer 12, the light emitting layer 13, the p-type semiconductor layer 14, the n-side electrode 20 that penetrates the p-side electrode 22, and the p-side electrode 22 p The pad on the surface opposite to the p-type semiconductor layer 14 of the pad electrode 21 and the p-side electrode 22 formed on the surface opposite to the p-type semiconductor layer 14 via the insulating film 19 and connected to the n-side electrode 20 And an electrode 23.

Further, the dielectric layer 11, n-type semiconductor layer 12, the side surface of the formed laminate a light emitting layer 13, p-type semiconductor layer 14 is covered with an insulating film 19 made of an insulating material such as SiO _2. This laminated body is not in direct contact with the n-side electrode 20 and the pad electrode 21 due to the insulating film 19.

  The n-side electrode 20 includes a Ti layer 20a in contact with the n-type semiconductor substrate 10 for ohmic contact with the n-type semiconductor substrate 10, and an Ag layer for reflecting light transmitted through the Ti layer 20a. And a through electrode having a laminated structure including 20b. As shown in FIG. 5, the light emitting element 3 preferably has a plurality of n-side electrodes 20 for current dispersion.

  The Ti layer 20a and the Ag layer 20b are made of the same material as that of the Ti layer 15a and the Ag layer 15b of the n-side electrode 15 according to the first embodiment, respectively.

  In addition, the thickness of the Ti layer 20a is preferably 4.5 nm or less, and more preferably 2 nm or less, like the Ti layer 15a of the n-side electrode 15 according to the first embodiment. Moreover, in order to make the n-side electrode 20 contact the n-type semiconductor substrate 10 with low resistance, it is preferably 0.5 nm or more.

  Similar to the pad electrode 16 according to the first embodiment, the pad electrode 21 has a laminated structure including an adhesion layer 21a, a barrier metal 21b, and a pad layer 21c. The adhesion layer 21a, the barrier metal 21b, and the pad layer 21c are made of the same material as the adhesion layer 16a, the barrier metal 16b, and the pad layer 16c according to the first embodiment, respectively, and have the same thickness.

  The p-side electrode 22 is an electrode that is in ohmic contact with the p-type semiconductor layer 14. For example, an Ag alloy film with a thickness of 270 nm, an Ag concentration of 99%, a Ni film with a thickness of 10 nm, and an Au film with a thickness of 10 nm It has the laminated structure which laminated | stacked.

  The pad electrode 23 has, for example, a stacked structure in which a Ti film having a thickness of 100 nm, a Pt film having a thickness of 50 nm, and an Au film having a thickness of 500 nm are stacked.

  The light emitting element 3 is a horizontal light emitting element, and is different from the light emitting element 1 according to the first embodiment in that the n-side electrode 20 is mainly a through electrode.

  Since the n-side electrode 20 of the light-emitting element 3 has the same stacked structure as the n-side electrode 15 of the light-emitting element 1 according to the first embodiment, the n-side electrode 20 is emitted from the light-emitting layer 13 and passes through the n-type semiconductor substrate 10. Light traveling toward the side electrode 20 can be efficiently reflected. For this reason, the light emitting element 3 has high light extraction efficiency similarly to the light emitting element 1 which concerns on 1st Embodiment.

(Effect of embodiment)
According to the first to third embodiments, since the n-side electrode can efficiently reflect the light emitted from the light emitting layer, the light extraction efficiency of the light emitting element due to the light absorption of the n side electrode. Can be suppressed.

  Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the invention.

  Moreover, the said embodiment does not limit the invention which concerns on a claim. It should be noted that not all combinations of features described in the embodiments and examples are necessarily essential to the means for solving the problems of the invention.

DESCRIPTION OF SYMBOLS 1, 2, 3 ... Light emitting element, 10 ... N type semiconductor substrate 10, 12 ... N type semiconductor layer, 13 ... Light emitting layer, 14 ... P type semiconductor layer, 15, 20 ... N side electrode, 15a, 20a ... Ti layer 15b, 20b ... Ag layer, 16, 21 ... pad electrode, 16b, 21b ... barrier metal, 16c, 21c ... pad layer

Claims (8)

An n-type semiconductor substrate having a (Al _x Ga _y In _z ) ₂ O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) crystal as a mother crystal;
An n-side electrode connected to the n-type semiconductor substrate;
Have
The n-side electrode has a laminated structure including a Ti layer in contact with the n-type semiconductor substrate and an Ag layer mainly composed of Ag on the Ti layer.
Light emitting element. The thickness of the Ti layer is 4.5 nm or less,
The light emitting device according to claim 1. The thickness of the Ti layer is 2 nm or less,
The light emitting device according to claim 2. The thickness of the Ti layer is 0.5 nm or more,
The light emitting element of any one of Claims 1-3. The Ag concentration of the Ag layer is 95% or more,
The light emitting element of any one of Claims 1-4. The n-type semiconductor substrate is made of Ga ₂ O ₃ crystal;
The light emitting element of any one of Claims 1-5. A pad electrode having a laminated structure including a barrier metal and a pad layer mainly composed of Au is formed on the n-side electrode,
The barrier metal is located between the n-side electrode and the pad layer, and prevents reaction between Ag contained in the Ag layer and Au contained in the pad layer;
The light emitting element of any one of Claims 1-6. The n-side electrode is a through electrode;
The light emitting element of any one of Claims 1-7.

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