JP2009081468A - Ga2O3-BASED SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD OF Ga2O3-BASED SEMICONDUCTOR ELEMENT - Google Patents

Ga2O3-BASED SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD OF Ga2O3-BASED SEMICONDUCTOR ELEMENT Download PDF

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JP2009081468A
JP2009081468A JP2009008686A JP2009008686A JP2009081468A JP 2009081468 A JP2009081468 A JP 2009081468A JP 2009008686 A JP2009008686 A JP 2009008686A JP 2009008686 A JP2009008686 A JP 2009008686A JP 2009081468 A JP2009081468 A JP 2009081468A
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voltage characteristic
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JP5078039B2 (en
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Noboru Ichinose
昇 一ノ瀬
Seishi Shimamura
清史 島村
Kazuo Aoki
和夫 青木
Villora Encarnacion Antonia Garcia
ビジョラ エンカルナシオン アントニア ガルシア
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Waseda University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12032Schottky diode

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a Ga<SB>2</SB>O<SB>3</SB>-based compound semiconductor which uses a Ga<SB>2</SB>O<SB>3</SB>-based compound as a semiconductor, has electrodes that allow to obtain ohmic characteristics suitable for the semiconductor, and eliminates heat treatment to obtain ohmic characteristics. <P>SOLUTION: An n-type electrode 20 composed of at least a Ti layer is formed on the lower face of an n-type β-Ga<SB>2</SB>O<SB>3</SB>substrate 2 by a PLD method. The n-type electrode 20 has ohmic characteristics at 25°C. The n-type electrode 20 may be two layers composed of a Ti layer and an Au layer, three layers composed of a Ti layer, an Al layer and an Au layer, or four layers composed of a Ti layer, an Al layer, an Ni layer and an Au layer. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、LED(発光ダイオード)、LD(レーザダイオード)等に使用されるGa系半導体素子に関し、特に、Ga系化合物を半導体として用い、これに適合したオーミック特性が得られる電極を有するとともに、オーミック特性を得るための熱処理を不要とすることが可能なGa系化合物半導体に関する。 The present invention relates to a Ga 2 O 3 -based semiconductor element used for LED (light emitting diode), LD (laser diode), etc., and in particular, a Ga 2 O 3 -based compound is used as a semiconductor, and ohmic characteristics suitable for this are obtained. The present invention relates to a Ga 2 O 3 -based compound semiconductor that has an electrode that can be used and that does not require heat treatment for obtaining ohmic characteristics.

従来、窒化物半導体、特に、窒化ガリウム(GaN)化合物半導体発光素子は、LED、LD等の発光デバイスに使用されている(例えば、特許文献1参照。)。   Conventionally, nitride semiconductors, in particular, gallium nitride (GaN) compound semiconductor light-emitting elements have been used in light-emitting devices such as LEDs and LDs (see, for example, Patent Document 1).

特許文献1には、サファイア基板、バッファ層、n型窒化ガリウム系化合物半導体層、n型クラッド層、n型活性層、p型クラッド層、p型コンタクト層が積層されたGaN系青色発光素子が記載されている。この従来のGaN系青色発光素子は、発光波長370nmで発光する。   Patent Document 1 discloses a GaN-based blue light emitting device in which a sapphire substrate, a buffer layer, an n-type gallium nitride compound semiconductor layer, an n-type cladding layer, an n-type active layer, a p-type cladding layer, and a p-type contact layer are stacked. Are listed. This conventional GaN-based blue light emitting device emits light at an emission wavelength of 370 nm.

特許第2778405号公報(図1)Japanese Patent No. 2778405 (FIG. 1)

しかし、従来のGaN系青色発光素子では、バンドギャップの関係でさらに短波長の紫外領域で発光する発光素子を得るのが困難である。そこで、近年、バンドギャップがより大きく、紫外領域で発光する可能性がある物質としてGaが期待されている。 However, in the conventional GaN-based blue light-emitting element, it is difficult to obtain a light-emitting element that emits light in the ultraviolet region of a shorter wavelength because of the band gap. Therefore, in recent years, Ga 2 O 3 is expected as a substance having a larger band gap and capable of emitting light in the ultraviolet region.

従って、本発明の第1の目的は、Ga系化合物を半導体として用い、これに適合したオーミック特性が得られる電極を有するGa系半導体素子を提供する。 Accordingly, a first object of the present invention, using a Ga 2 O 3 system compound as a semiconductor, ohmic characteristics adapted to provide a Ga 2 O 3 based semiconductor device having an electrode to be obtained.

また、本発明の第2の目的は、オーミック特性を得るための熱処理を不要とすることが可能なGa系半導体素子を提供する。 In addition, a second object of the present invention is to provide a Ga 2 O 3 based semiconductor element that can eliminate the need for heat treatment for obtaining ohmic characteristics.

第1の発明は、上記の第1の目的を達成するため、n型導電性を有するβ−Ga化合物半導体からなるn型層と、前記n型層上に形成されたTi層を有する電極とを備え、前記電極は、前記n型層にオーミック接続しているGa系半導体素子を提供する。 In order to achieve the first object, the first invention comprises an n-type layer made of a β-Ga 2 O 3 compound semiconductor having n-type conductivity, and a Ti layer formed on the n-type layer. The electrode provides a Ga 2 O 3 based semiconductor element that is in ohmic contact with the n-type layer.

第2の発明は、上記の第2の目的を達成するため、n型導電性を有するβ−Ga化合物半導体からなるn型層を準備する工程と、前記n型層上にTi層を形成する工程と、前記Ti層上に、Au層又はAl層を形成する工程と、前記Ti層と、前記Au層又は前記Al層とが形成された前記n型層に熱処理を施す工程とを備えるGa系半導体素子の製造方法を提供する。 In order to achieve the above second object, the second invention provides a step of preparing an n-type layer made of a β-Ga 2 O 3 compound semiconductor having n-type conductivity, and a Ti layer on the n-type layer. Forming an Au layer or an Al layer on the Ti layer, applying a heat treatment to the n-type layer on which the Ti layer and the Au layer or the Al layer are formed, and method for producing a Ga 2 O 3 based semiconductor device comprising providing.

第1の発明のGa系半導体素子によれば、Ga化合物半導体の結晶性が良いため、Ga化合物半導体からなるn型層と電極であるTi層との接触抵抗が小さくなるので、Ga系化合物半導体に適合したオーミック特性が得られる電極を有することができる。 According to Ga 2 O 3 based semiconductor device of the first aspect of the invention, Ga 2 O 3 compound semiconductor for good crystallinity, the contact resistance between the Ga 2 O 3 compound n-type layer made of a semiconductor and an electrode Ti layer Therefore, it is possible to have an electrode that can obtain ohmic characteristics suitable for a Ga 2 O 3 -based compound semiconductor.

第2の発明のGa系半導体素子によれば、Ga化合物半導体の結晶性が良いため、Ga系化合物半導体からなるn型層と電極であるTi層との接触抵抗が小さくなるので、オーミック特性を得るための熱処理を不要とすることが可能となる。 According to Ga 2 O 3 based semiconductor device of the second aspect of the invention, contact between the Ga 2 O 3 for compound crystal of the semiconductor can be, Ti layer is an n-type layer and an electrode made of Ga 2 O 3 system compound semiconductor Since the resistance is reduced, it is possible to dispense with heat treatment for obtaining ohmic characteristics.

本発明の第1の実施の形態に係る発光素子を示す断面図である。It is sectional drawing which shows the light emitting element which concerns on the 1st Embodiment of this invention. 本発明の第2の実施の形態に係る発光素子を示す断面図である。It is sectional drawing which shows the light emitting element which concerns on the 2nd Embodiment of this invention. 本発明の第3の実施の形態に係る発光素子を示す断面図である。It is sectional drawing which shows the light emitting element which concerns on the 3rd Embodiment of this invention. 本発明の第4の実施の形態に係る発光素子を示す断面図である。It is sectional drawing which shows the light emitting element which concerns on the 4th Embodiment of this invention. 実施例1の電流電圧特性図である。2 is a current-voltage characteristic diagram of Example 1. FIG. 実施例2における25℃での電流電圧特性図である。6 is a current-voltage characteristic diagram at 25 ° C. in Example 2. FIG. 実施例2における300℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 300 degreeC in Example 2. FIG. 実施例2における600℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 600 degreeC in Example 2. FIG. 実施例2における700℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 700 degreeC in Example 2. FIG. 実施例3における25℃での電流電圧特性図である。6 is a current-voltage characteristic diagram at 25 ° C. in Example 3. FIG. 実施例3における800℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining at 800 degreeC in Example 3 for 5 minutes. 実施例4における25℃における電流電圧特性図である。It is a current-voltage characteristic figure in 25 degreeC in Example 4. 実施例4における700℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining at 700 degreeC in Example 4 for 5 minutes. 実施例4における800℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 800 degreeC in Example 4. 実施例5における25℃での電流電圧特性図である。10 is a current-voltage characteristic diagram at 25 ° C. in Example 5. FIG. 実施例5における400℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 400 degreeC in Example 5. FIG. 実施例5における800℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 800 degreeC in Example 5. FIG. 比較例1における25℃での電流電圧特性図である。6 is a current-voltage characteristic diagram at 25 ° C. in Comparative Example 1. FIG. 比較例1における100℃で10分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 10 minutes at 100 degreeC in the comparative example 1. 比較例1における200℃で10分間保持した後電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 10 minutes at 200 degreeC in the comparative example 1. 比較例2における25℃での電流電圧特性図である。6 is a current-voltage characteristic diagram at 25 ° C. in Comparative Example 2. FIG. 比較例2における100℃で10分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 10 minutes at 100 degreeC in the comparative example 2. 比較例3における25℃での電流電圧特性図である。10 is a current-voltage characteristic diagram at 25 ° C. in Comparative Example 3. FIG. 比較例3における100℃で30秒間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining at 100 degreeC in Comparative Example 3 for 30 second. 比較例3における100℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 100 degreeC in the comparative example 3. 比較例3における200℃で30秒間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 30 second at 200 degreeC in the comparative example 3. 比較例3における200℃で5分間保持した後の電流電圧特性図である。It is a current-voltage characteristic figure after hold | maintaining for 5 minutes at 200 degreeC in the comparative example 3.

[第1の実施の形態]
図1は、本発明の第1の実施の形態に係る発光素子を示す。この発光素子1は、β−Ga化合物半導体からなるn型β−Ga基板2に、β−AlGaO化合物半導体からなるn型導電性を示すn型β−AlGaOクラッド層4、β−Gaからなる活性層5、p型導電性を示すp型β−AlGaOクラッド層6、およびβ−Ga化合物半導体からなるp型導電性を示すp型β−Gaコンタクト層7を順次積層したものである。
[First Embodiment]
FIG. 1 shows a light emitting device according to a first embodiment of the present invention. The light emitting element 1, β-Ga 2 O 3 compound to the n-type β-Ga 2 O 3 substrate 2 made of semiconductor, β-AlGaO 3 Compound n-type an n-type conductivity comprising a semiconductor β-AlGaO 3 cladding layer 4, active layer 5 made of β-Ga 2 O 3 , p-type β-AlGaO 3 cladding layer 6 showing p-type conductivity, and p-type β showing p-type conductivity made of a β-Ga 2 O 3 compound semiconductor in which sequentially laminated the -ga 2 O 3 contact layer 7.

また、この発光素子1は、p型β−Gaコンタクト層7に形成される透明電極8と、透明電極8の一部に形成され、Ptからなる薄膜により形成され、ワイヤ11が接合部10によって接続されるパッド電極9と、n型β−Ga基板2の下方に形成されるn側電極20とを備える。 Further, the light-emitting device 1 includes a transparent electrode 8 formed in the p-type β-Ga 2 O 3 contact layer 7 is formed on part of the transparent electrode 8 is formed by a thin film made of Pt, the wire 11 is bonded The pad electrode 9 connected by the part 10 and the n-side electrode 20 formed below the n-type β-Ga 2 O 3 substrate 2 are provided.

n側電極20は、例えば、Tiからなる薄膜が形成され、接着剤31を介して図示していないプリントパターンが形成されたプリント基板30と接続される。   The n-side electrode 20 is connected to a printed circuit board 30 on which a thin film made of Ti, for example, is formed and a print pattern (not shown) is formed via an adhesive 31.

また、この発光素子1は、接着剤31あるいは金属ペーストを介してプリント基板30に搭載され、プリント基板30のプリント配線に接続される。   The light emitting element 1 is mounted on the printed circuit board 30 via an adhesive 31 or a metal paste, and is connected to the printed wiring of the printed circuit board 30.

この発光素子1を構成する各層4〜7は、金属ターゲットにレーザ光を照射し、例えば、希薄酸素雰囲気下、基板から遊離した金属の膜を基板上に成長させるPLD(Pulsed Laser Deposition)法により形成される。   Each of the layers 4 to 7 constituting the light emitting element 1 is irradiated with laser light on a metal target, for example, by a PLD (Pulsed Laser Deposition) method in which a metal film released from the substrate is grown on the substrate in a dilute oxygen atmosphere. It is formed.

第1の実施の形態によれば、n側電極20は、n型β−Ga基板2と好ましいオーミック特性を有している。そのため、接触抵抗を小さくすることができるので、電極部分における電流ロスや、ジュール熱の発生等による電極の劣化、化合物半導体レーザやLEDの特性劣化を防ぐことができるという優れた発光特性が得られる。 According to the first embodiment, the n-side electrode 20 has preferable ohmic characteristics with the n-type β-Ga 2 O 3 substrate 2. Therefore, since the contact resistance can be reduced, it is possible to obtain excellent light emission characteristics that can prevent current loss in the electrode portion, electrode deterioration due to generation of Joule heat, and compound semiconductor laser and LED characteristics. .

[第2の実施の形態]
図2は、本発明の第2の実施の形態に係る発光素子を示す図である。この発光素子1は、第1の実施の形態に係る発光素子1とは、n側電極20のみが相違する。この発光素子1のn側電極20は、n型β−Ga基板4の下面に、Ti層21を形成し、その下方にAu層22を形成したものである。Au層22の代わりにPt層であってもよい。
[Second Embodiment]
FIG. 2 is a diagram showing a light emitting device according to the second embodiment of the present invention. This light emitting element 1 is different from the light emitting element 1 according to the first embodiment only in the n-side electrode 20. The n-side electrode 20 of the light-emitting element 1 is obtained by forming a Ti layer 21 on the lower surface of the n-type β-Ga 2 O 3 substrate 4 and forming an Au layer 22 below the Ti layer 21. A Pt layer may be used instead of the Au layer 22.

第2の実施の形態によれば、n側電極20は、n型β−Ga基板2と好ましいオーミック特性を有している。そのため、n側電極20とn型β−Ga基板2との接触抵抗を小さくすることができるので、第1の実施の形態と同様に優れた発光特性が得られる。 According to the second embodiment, the n-side electrode 20 has preferable ohmic characteristics with the n-type β-Ga 2 O 3 substrate 2. Therefore, the contact resistance between the n-side electrode 20 and the n-type β-Ga 2 O 3 substrate 2 can be reduced, and excellent light emission characteristics can be obtained as in the first embodiment.

[第3の実施の形態]
図3は、本発明の第3の実施の形態に係る発光素子の要部を示す。この発光素子1は、第1の実施の形態に係る発光素子1とは、n側電極20のみが相違する。この発光素子1のn側電極20は、n型β−Ga基板2の下面にTi層21、Al層23およびAu層22を順次積層したものである。
[Third Embodiment]
FIG. 3 shows a main part of a light emitting device according to the third embodiment of the present invention. This light emitting element 1 is different from the light emitting element 1 according to the first embodiment only in the n-side electrode 20. The n-side electrode 20 of the light emitting element 1 is obtained by sequentially laminating a Ti layer 21, an Al layer 23, and an Au layer 22 on the lower surface of the n-type β-Ga 2 O 3 substrate 2.

第3の実施の形態によれば、n側電極20は、n型β−Ga基板2と好ましいオーミック特性を有している。そのため、第1の実施の形態と同様に優れた発光特性が得られる。 According to the third embodiment, the n-side electrode 20 has preferable ohmic characteristics with the n-type β-Ga 2 O 3 substrate 2. Therefore, excellent light emission characteristics can be obtained as in the first embodiment.

[第4の実施の形態]
図4は、本発明の第4の実施の形態に係る発光素子の要部を示す。この発光素子1は、第1の実施の形態に係る発光素子1とは、n側電極20のみが相違する。この発光素子1のn側電極20は、n型β−Ga基板2の下面にTi層21、Al層23、Ni層24およびAu層22を順次積層したものである。
[Fourth Embodiment]
FIG. 4 shows a main part of a light emitting device according to the fourth embodiment of the present invention. This light emitting element 1 is different from the light emitting element 1 according to the first embodiment only in the n-side electrode 20. The n-side electrode 20 of the light emitting element 1 is obtained by sequentially laminating a Ti layer 21, an Al layer 23, a Ni layer 24, and an Au layer 22 on the lower surface of the n-type β-Ga 2 O 3 substrate 2.

第4の実施の形態によれば、n側電極20は、n型β−Ga基板2と好ましいオーミック特性を有している。そのため、第1の実施の形態と同様に優れた発光特性が得られる。 According to the fourth embodiment, the n-side electrode 20 has preferable ohmic characteristics with the n-type β-Ga 2 O 3 substrate 2. Therefore, excellent light emission characteristics can be obtained as in the first embodiment.

以下、本発明の実施例について説明する。   Examples of the present invention will be described below.

図5は、本発明の実施例1の電流電圧特性図である。   FIG. 5 is a current-voltage characteristic diagram of Example 1 of the present invention.

実施例1は、本発明の第1の実施の形態の相当し、99.99%のGaのドーパントを添加していない基板上に形成されたTi層によりn電極を形成したものである。基板上にTi層を形成する前にエッチングを行い、基板表面を清浄にした。Ti層は、150Åの膜厚であり、PLD法により、出力100mWでTiターゲットに7.5分間レーザを照射することにより形成し、25℃のときの電流電圧特性を測定した。 Example 1 corresponds to the first embodiment of the present invention, in which an n electrode is formed by a Ti layer formed on a substrate to which no 99.99% Ga 2 O 3 dopant is added. is there. Etching was performed before the Ti layer was formed on the substrate to clean the substrate surface. The Ti layer had a thickness of 150 mm and was formed by irradiating a Ti target with a laser for 7.5 minutes at an output of 100 mW by the PLD method, and the current-voltage characteristics at 25 ° C. were measured.

実施例1によれば、25℃においてオーミック特性を示すため、電極部分における電流ロスや、ジュール熱の発生等による電極の劣化、化合物半導体レーザやLEDの特性劣化を防ぐことができるという優れた発光特性が得られる。   According to Example 1, since it exhibits ohmic characteristics at 25 ° C., excellent light emission that can prevent current loss in the electrode part, electrode deterioration due to generation of Joule heat, and compound semiconductor laser and LED characteristics deterioration. Characteristics are obtained.

図6は、本発明の実施例2における25℃の電流電圧特性図、図7は実施例2における300℃で5分間保持した後の電流電圧特性図、図8は実施例2における600℃で5分間保持した後の電流電圧特性図、図9は実施例2における700℃で5分間保持した後の電流電圧特性図である。   6 is a current-voltage characteristic diagram at 25 ° C. in Example 2 of the present invention, FIG. 7 is a current-voltage characteristic diagram after holding at 300 ° C. for 5 minutes in Example 2, and FIG. 8 is 600 ° C. in Example 2. FIG. 9 is a current-voltage characteristic diagram after holding for 5 minutes at 700 ° C. in Example 2, and FIG. 9 is a current-voltage characteristic diagram after holding for 5 minutes.

実施例2は、第2の実施の形態に相当し、99.99%のGaのドーパントを添加していない基板にTi層およびAu層を積層してn電極を形成したものである。実施例1と同様にエッチングを行い、基板表面を清浄にした。Ti層は150Åの膜厚およびAu層は500Åの膜厚であり、PLD法により、出力100mWでTiターゲットに7.5分間およびAuターゲットに25分間レーザをそれぞれ照射することによりそれぞれ形成する。200ml/minでNを流しながら電極を保持し、その保持後の電流電圧特性を測定した。 Example 2 corresponds to the second embodiment, in which an n-electrode is formed by laminating a Ti layer and an Au layer on a substrate not added with a 99.99% Ga 2 O 3 dopant. . Etching was performed in the same manner as in Example 1 to clean the substrate surface. The Ti layer has a thickness of 150 mm and the Au layer has a thickness of 500 mm, and is formed by irradiating the Ti target with laser for 7.5 minutes and the Au target with laser for 25 minutes, respectively, with an output of 100 mW. The electrode was held while flowing N 2 at 200 ml / min, and the current-voltage characteristics after the holding were measured.

実施例2によると、25℃〜600℃で保持した後の電流電圧特性は、オーミック特性を示す。しかし、700℃で5分間の保持後は、ショットキー特性を示した。   According to Example 2, the current-voltage characteristic after hold | maintaining at 25 to 600 degreeC shows ohmic characteristics. However, after holding at 700 ° C. for 5 minutes, Schottky characteristics were exhibited.

また、この実施例2によれば、Ti層およびAu層を形成するだけでオーミック特性を示す。また、電極は、25〜少なくとも600℃の範囲においてオーミック特性を示すため、常温から耐熱性を要求される温度までの広い使用条件において使用することができる。   Further, according to Example 2, ohmic characteristics are exhibited only by forming a Ti layer and an Au layer. Moreover, since an electrode shows ohmic characteristics in the range of 25 to at least 600 ° C., it can be used under a wide range of usage conditions from room temperature to a temperature requiring heat resistance.

図10は、本発明の実施例3における25℃での電流電圧特性図、図11は実施例3における800℃で5分間保持した後の電流電圧特性図である。   FIG. 10 is a current-voltage characteristic diagram at 25 ° C. in Example 3 of the present invention, and FIG. 11 is a current-voltage characteristic diagram after holding at 800 ° C. for 5 minutes in Example 3.

実施例3は、第2の実施の形態に相当し、99.99%のGaのドーパントを添加していない基板に形成されたTi層およびAl層によりn電極を形成したものである。実施例1と同様にエッチングを行い、基板表面を清浄にした。Ti層は150Åの膜厚およびAl層は1000Åの膜厚であり、PLD法により、出力100mWでTiターゲットに7.5分間およびAlターゲットに50分間レーザをそれぞれ照射することによりそれぞれ形成する。200ml/minでNを流しながら保持し、その保持した後の電流電圧特性を測定した。 Example 3 corresponds to the second embodiment, in which an n-electrode is formed by a Ti layer and an Al layer formed on a substrate to which 99.99% Ga 2 O 3 dopant is not added. . Etching was performed in the same manner as in Example 1 to clean the substrate surface. The Ti layer has a thickness of 150 mm and the Al layer has a thickness of 1000 mm, and is formed by irradiating the Ti target with a laser for 7.5 minutes and the Al target with a laser for 50 minutes, respectively, at an output of 100 mW by the PLD method. Held under a stream of N 2 at 200 ml / min, to measure the current-voltage characteristics after its retention.

実施例3によれば、25〜700℃では良好なオーミック特性を示し、800℃で保持した後は、電流が流れにくくなっているが、オーミック特性を示している。   According to Example 3, good ohmic characteristics are exhibited at 25 to 700 ° C., and current is less likely to flow after being held at 800 ° C., but ohmic characteristics are exhibited.

また、この実施例3によれば、Ti層およびAl層を形成するだけでオーミック特性を示す。   Further, according to Example 3, ohmic characteristics are exhibited only by forming a Ti layer and an Al layer.

図12は、本発明の実施例4における25℃での電流電圧特性図、図13は実施例4における700℃で5分間保持した後の電流電圧特性図、図14は実施例4における800℃で5分間の保持した後の電流電圧特性図である。   12 is a current-voltage characteristic diagram at 25 ° C. in Example 4 of the present invention, FIG. 13 is a current-voltage characteristic diagram after holding at 700 ° C. for 5 minutes in Example 4, and FIG. 14 is 800 ° C. in Example 4. It is a current-voltage characteristic figure after hold | maintaining for 5 minutes.

実施例4は、第3の実施の形態に相当し、99.99%のGaのドーパントを添加していない基板に形成されたTi層、Al層およびAu層によりn電極を形成したものである。実施例1と同様にエッチングを行い、基板表面を清浄にした。Ti層は150Åの膜厚、Al層は1000Åの膜厚およびAu層は500Åの膜厚であり、PLD法により、出力100mWでTiターゲットに7.5分間、Alターゲットに50分間およびAuターゲットに25分間レーザをそれぞれ照射することによりそれぞれ形成する。200ml/minでNを流しながら保持し、その保持した後の電流電圧特性を測定した。 Example 4 corresponds to the third embodiment, and an n electrode was formed by a Ti layer, an Al layer, and an Au layer formed on a substrate to which no 99.99% Ga 2 O 3 dopant was added. Is. Etching was performed in the same manner as in Example 1 to clean the substrate surface. The Ti layer has a thickness of 150 mm, the Al layer has a thickness of 1000 mm, and the Au layer has a thickness of 500 mm. By the PLD method, the output is 100 mW, the Ti target is 7.5 minutes, the Al target is 50 minutes, and the Au target is Each is formed by irradiating with a laser for 25 minutes. The N 2 was held while flowing at 200 ml / min, and the current-voltage characteristics after the holding were measured.

実施例4によれば、25〜700℃ではオーミック特性を示すが、800℃以上で保持した後は、ショットキー特性を示す。また、電極は、Ti層、Al層およびAu層を形成するだけでオーミック特性を示す。   According to Example 4, ohmic characteristics are exhibited at 25 to 700 ° C., but after holding at 800 ° C. or higher, Schottky characteristics are exhibited. Moreover, an electrode shows ohmic characteristics only by forming a Ti layer, an Al layer, and an Au layer.

図15は、本発明の実施例5における25℃での電流電圧特性図、図16は実施例5における400℃で5分間保持した後の電流電圧特性図、図17は実施例5における800℃で5分間保持した後の電流電圧特性図である。   15 is a current-voltage characteristic diagram at 25 ° C. in Example 5 of the present invention, FIG. 16 is a current-voltage characteristic diagram after holding at 400 ° C. for 5 minutes in Example 5, and FIG. 17 is 800 ° C. in Example 5. It is a current-voltage characteristic figure after hold | maintaining for 5 minutes.

実施例5は、第4の実施の形態に相当し、99.99%のGaのドーパントを添加していない基板に形成されたTi層、Al層、Ni層、およびAu層によりn電極を形成したものである。実施例1と同様にエッチングを行い、基板表面を清浄にした。Ti層は150Åの膜厚、Al層は1000Åの膜厚、Ni層は400Åの膜厚およびAu層は500Åの膜厚であり、PLD法により、出力100mWでTiターゲットに7.5分間、Alターゲットに50分間、Niターゲットに40分間およびAuターゲットに25分間レーザをそれぞれ照射することによりそれぞれ形成する。200ml/minでNを流しながら保持し、その保持した後の電流電圧特性を測定した。 Example 5 corresponds to the fourth embodiment. The Ti layer, the Al layer, the Ni layer, and the Au layer formed on the substrate to which the 99.99% Ga 2 O 3 dopant was not added were used. An electrode is formed. Etching was performed in the same manner as in Example 1 to clean the substrate surface. The Ti layer has a thickness of 150 mm, the Al layer has a thickness of 1000 mm, the Ni layer has a thickness of 400 mm, and the Au layer has a thickness of 500 mm. The target is formed by irradiating the target with a laser for 50 minutes, the Ni target for 40 minutes, and the Au target for 25 minutes, respectively. Held under a stream of N 2 at 200 ml / min, to measure the current-voltage characteristics after its retention.

実施例5によれば、25℃および400℃で保持した後ではオーミック特性を示すが、800℃で保持した後は、ショットキー特性を示す。また、Ti層、Al層、Ni層、およびAu層を形成するだけでオーミック特性を示す。また、熱処理を行った場合には、25〜少なくとも400℃の範囲においてオーミック特性を示すため、常温から耐熱性を要求される温度までの広い使用条件において使用することができる。
(比較例1)
According to Example 5, ohmic characteristics are exhibited after being held at 25 ° C. and 400 ° C., but Schottky characteristics are exhibited after being held at 800 ° C. Moreover, ohmic characteristics are exhibited only by forming a Ti layer, an Al layer, a Ni layer, and an Au layer. Further, when heat treatment is performed, it exhibits ohmic characteristics in the range of 25 to at least 400 ° C., and therefore can be used under a wide range of usage conditions from room temperature to a temperature requiring heat resistance.
(Comparative Example 1)

図18は、比較例1における25℃での電流電圧特性図、図19は比較例1における100℃で10分間保持した後の電流電圧特性図、図20は比較例1における200℃で10分間保持した後の電流電圧特性図である。   18 is a current-voltage characteristic diagram at 25 ° C. in Comparative Example 1, FIG. 19 is a current-voltage characteristic diagram after holding at 100 ° C. for 10 minutes in Comparative Example 1, and FIG. It is a current-voltage characteristic figure after hold | maintaining.

比較例1は、99.99%のGaのドーパントを添加していない基板に、Ti層の代わりにAu層によりn電極を形成したものである。基板上にAu層を形成する前にエッチングを行い、基板表面を清浄にした。Au層は、PLD法により、出力100mWでAuターゲットに25分間レーザを照射することにより形成する。Hの5%雰囲気下、200ml/minでArを流しながら熱処理し、そ保持した後の電流電圧特性を測定した。 In Comparative Example 1, an n-electrode is formed by using an Au layer instead of a Ti layer on a substrate to which 99.99% Ga 2 O 3 dopant is not added. Etching was performed before the Au layer was formed on the substrate to clean the substrate surface. The Au layer is formed by irradiating the Au target with laser at an output of 100 mW for 25 minutes by the PLD method. In a 5% H 2 atmosphere, heat treatment was performed while flowing Ar at 200 ml / min, and the current-voltage characteristics after the heat treatment were measured.

比較例1によれば、Ga基板にTi層の代わりにAu層を設けた場合は、ショッ
トキー特性を示し、オーミック特性を示していない。
(比較例2)
According to Comparative Example 1, when an Au layer is provided on the Ga 2 O 3 substrate instead of the Ti layer, Schottky characteristics are exhibited and ohmic characteristics are not exhibited.
(Comparative Example 2)

図21は、比較例2における25℃での電流電圧特性図、図22は比較例2における100℃で10分間保持した後の電流電圧特性図である。   FIG. 21 is a current-voltage characteristic diagram at 25 ° C. in Comparative Example 2, and FIG. 22 is a current-voltage characteristic diagram after holding at 100 ° C. for 10 minutes in Comparative Example 2.

比較例2は、99.99%のGaのドーパントを添加していない基板に、Ti層の代わりにPt層によりn電極を形成したものである。比較例1と同様にエッチングを行い、基板表面を清浄にした。Pt層は、PLD法により、出力100mWでPtターゲットにレーザを照射することにより形成する。Hの5%雰囲気下、200ml/minでArを流しながら熱処理し、そ保持した後の電流電圧特性を測定した。 In Comparative Example 2, an n-electrode is formed by a Pt layer instead of a Ti layer on a substrate to which 99.99% Ga 2 O 3 dopant is not added. Etching was performed in the same manner as in Comparative Example 1 to clean the substrate surface. The Pt layer is formed by irradiating a Pt target with a laser at an output of 100 mW by the PLD method. In a 5% H 2 atmosphere, heat treatment was performed while flowing Ar at 200 ml / min, and the current-voltage characteristics after the heat treatment were measured.

比較例2によると、Ga基板にTi層の代わりにAu層を設けた場合は、ショットキー特性を示し、オーミック特性を示していない。
(比較例3)
According to Comparative Example 2, when an Au layer is provided on the Ga 2 O 3 substrate instead of the Ti layer, Schottky characteristics are exhibited and ohmic characteristics are not exhibited.
(Comparative Example 3)

図23は、比較例3における25℃での電流電圧特性図を示し、図24は比較例3における100℃で30秒間保持した後の電流電圧特性図、図25は比較例3における100℃で5分間保持した後の電流電圧特性図、図26は比較例3における200℃で30秒間保持した後の電流電圧特性図、図27は比較例3における200℃で5分間保持した後の電流電圧特性図である。   23 shows a current-voltage characteristic diagram at 25 ° C. in Comparative Example 3, FIG. 24 shows a current-voltage characteristic diagram after holding at 100 ° C. for 30 seconds in Comparative Example 3, and FIG. FIG. 26 is a current-voltage characteristic diagram after being held at 200 ° C. for 30 seconds in Comparative Example 3, and FIG. 27 is a current-voltage characteristic diagram after being held at 200 ° C. for 5 minutes in Comparative Example 3. FIG.

比較例3は、99.99%のGaのドーパントを添加していない基板にTi層およびAu層の代わりにNi層およびAu層を積層してn電極を形成したものである。比較例1と同様にエッチングを行い、基板表面を清浄にした。Ni層は400Åの膜厚およびAu層は500Åの膜厚であり、PLD法により、まずNi層を形成して、次に出力100mWでAuターゲットに25分間レーザを照射することにより形成する。200ml/minでN2を流しながら保持し、その保持した後の電流電圧特性を測定した。 In Comparative Example 3, an n-electrode was formed by laminating a Ni layer and an Au layer instead of a Ti layer and an Au layer on a substrate to which no 99.99% Ga 2 O 3 dopant was added. Etching was performed in the same manner as in Comparative Example 1 to clean the substrate surface. The Ni layer has a thickness of 400 mm and the Au layer has a thickness of 500 mm. The Ni layer is first formed by the PLD method, and then the Au target is irradiated with a laser for 25 minutes at an output of 100 mW. The current and voltage characteristics after the N2 was held while flowing N2 at 200 ml / min were measured.

比較例3によれば、Ti層およびAu層の代わりにNi層およびAu層を設けた場合は、ショットキー特性を示し、オーミック特性を示していない。   According to Comparative Example 3, when the Ni layer and the Au layer are provided instead of the Ti layer and the Au layer, the Schottky characteristics are shown and the ohmic characteristics are not shown.

なお、本発明は、上記各実施の形態、上記各実施例に限定されず、その要旨を変更しない範囲内で種々変更してもよい。基板上の電極を形成する金属膜は、上記PLD法のほかに、真空蒸着法、スパッタリング法、イオンプレーティング法等により形成してもよい。また、雰囲気ガスは、上記アルゴンおよび窒素以外に、ヘリウム等の不活性ガス、水素等の還元性ガスを用いてもよい。雰囲気ガスの圧力は10−2Torrないし大気圧の範囲であればよい。また、Ga系化合物半導体は、絶縁基板上に形成されたn型コンタクト層にn側電極を形成してもよい。また、本発明は、オーミック特性を得るための熱処理を施していないが、必要に応じて熱処理を行なってもよい。Au層22の代わりに、Pt層等の酸化膜防止層であってもよい。また、Ga系半導体素子として、上記発光素子の他に、ダイオードや太陽電池等に適用できる。 In addition, this invention is not limited to said each embodiment and said each Example, You may change variously within the range which does not change the summary. The metal film for forming the electrode on the substrate may be formed by a vacuum deposition method, a sputtering method, an ion plating method or the like in addition to the PLD method. In addition to the above argon and nitrogen, an inert gas such as helium or a reducing gas such as hydrogen may be used as the atmospheric gas. The pressure of the atmospheric gas may be in the range of 10-2 Torr to atmospheric pressure. In the Ga 2 O 3 -based compound semiconductor, an n-side electrode may be formed on an n-type contact layer formed on an insulating substrate. In the present invention, heat treatment for obtaining ohmic characteristics is not performed, but heat treatment may be performed as necessary. Instead of the Au layer 22, an oxide film preventing layer such as a Pt layer may be used. Further, as the Ga 2 O 3 based semiconductor device, in addition to the light emitting device can be applied to the diode and solar cells.

1 発光素子
2 基板
4 n型β−AlGaOクラッド層
5 活性層
6 p型β−AlGaOクラッド層
7 p型β−Gaコンタクト層
8 透明電極
9 パッド電極
10,12 接合部
11,13 ワイヤ
20 n側電極
21 Ti層
22 Au層
23 Al層
24 Ni層
30 プリント基板
31 接着剤
40 出射光
41 発光光
1 the light emitting element 2 substrate 4 n-type β-AlGaO 3 cladding layer 5 active layer 6 p-type β-AlGaO 3 cladding layer 7 p-type β-Ga 2 O 3 contact layer 8 transparent electrode 9 pad electrode 10, 12 junction 11, 13 Wire 20 N-side electrode 21 Ti layer 22 Au layer 23 Al layer 24 Ni layer 30 Printed circuit board 31 Adhesive 40 Emission light 41 Emission light

Claims (7)

n型導電性を有するβ−Ga化合物半導体からなるn型層と、
前記n型層上に形成されたTi層を有する電極と
を備え、
前記電極は、前記n型層にオーミック接続しているGa系半導体素子。
an n-type layer made of a β-Ga 2 O 3 compound semiconductor having n-type conductivity,
An electrode having a Ti layer formed on the n-type layer,
The electrode is a Ga 2 O 3 based semiconductor element that is in ohmic contact with the n-type layer.
前記電極は、前記Ti層上に形成されるAu層を更に有する請求項1に記載のGa系半導体素子。 The Ga 2 O 3 based semiconductor device according to claim 1, wherein the electrode further includes an Au layer formed on the Ti layer. 前記電極は、前記Ti層上に形成されるAl層を更に有する請求項1に記載のGa系半導体素子。 The Ga 2 O 3 based semiconductor device according to claim 1, wherein the electrode further includes an Al layer formed on the Ti layer. 前記電極は、前記Al層上に形成されるAu層を更に有する請求項3に記載のGa系半導体素子。 The Ga 2 O 3 based semiconductor device according to claim 3, wherein the electrode further includes an Au layer formed on the Al layer. 前記電極は、前記Al層上に形成されるNi層と、前記Ni層上に形成されるAu層とを更に有する請求項3に記載のGa系半導体素子。 The Ga 2 O 3 based semiconductor device according to claim 3, wherein the electrode further includes a Ni layer formed on the Al layer and an Au layer formed on the Ni layer. n型導電性を有するβ−Ga化合物半導体からなるn型層を準備する工程と、
前記n型層上にTi層を形成する工程と、
前記Ti層上に、Au層又はAl層を形成する工程と
を備えるGa系半導体素子の製造方法。
preparing an n-type layer made of a β-Ga 2 O 3 compound semiconductor having n-type conductivity;
Forming a Ti layer on the n-type layer;
On the Ti layer, the manufacturing method of the Ga 2 O 3 system semiconductor element and forming a Au layer or an Al layer.
前記Ti層と、前記Au層又は前記Al層とが形成された前記n型層に熱処理を施す工程を更に備える請求項6に記載のGa系半導体素子の製造方法。 Wherein a Ti layer, the Au layer, or a manufacturing method of the Ga 2 O 3 based semiconductor device according to claim 6 which process further comprises a heat treatment to said n-type layer and the Al layer was formed.
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