JP2015523742A5 - - Google Patents

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Publication number
JP2015523742A5
JP2015523742A5 JP2015525599A JP2015525599A JP2015523742A5 JP 2015523742 A5 JP2015523742 A5 JP 2015523742A5 JP 2015525599 A JP2015525599 A JP 2015525599A JP 2015525599 A JP2015525599 A JP 2015525599A JP 2015523742 A5 JP2015523742 A5 JP 2015523742A5
Authority
JP
Japan
Prior art keywords
microelectronic
opening
dielectric
terminal
front surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015525599A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015523742A (ja
Filing date
Publication date
Priority claimed from US13/741,890 external-priority patent/US9013033B2/en
Application filed filed Critical
Priority claimed from PCT/US2013/053240 external-priority patent/WO2014022675A1/en
Publication of JP2015523742A publication Critical patent/JP2015523742A/ja
Publication of JP2015523742A5 publication Critical patent/JP2015523742A5/ja
Pending legal-status Critical Current

Links

JP2015525599A 2012-08-02 2013-08-01 ２以上のダイにおける複数ダイ・フェースダウン・スタッキング Pending JP2015523742A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201213565613A 2012-08-02 2012-08-02
US13/565,613 2012-08-02
US13/741,890 2013-01-15
US13/741,890 US9013033B2 (en) 2011-04-21 2013-01-15 Multiple die face-down stacking for two or more die
PCT/US2013/053240 WO2014022675A1 (en) 2012-08-02 2013-08-01 Multiple die face-down stacking for two or more die

Publications (2)

Publication Number Publication Date
JP2015523742A JP2015523742A (ja) 2015-08-13
JP2015523742A5 true JP2015523742A5 (zh) 2016-09-15

Family

ID=50028532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015525599A Pending JP2015523742A (ja) 2012-08-02 2013-08-01 ２以上のダイにおける複数ダイ・フェースダウン・スタッキング

Country Status (5)

Country Link
EP (1) EP2880685A1 (zh)
JP (1) JP2015523742A (zh)
KR (1) KR20150040998A (zh)
CN (1) CN104718619A (zh)
WO (1) WO2014022675A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114040579B (zh) * 2021-11-08 2023-12-22 艾科微电子(深圳)有限公司 电子器件及其制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02174255A (ja) 1988-12-27 1990-07-05 Mitsubishi Electric Corp 半導体集積回路装置
US5679977A (en) 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5861666A (en) 1995-08-30 1999-01-19 Tessera, Inc. Stacked chip assembly
JP2004063767A (ja) * 2002-07-29 2004-02-26 Renesas Technology Corp 半導体装置
US7462936B2 (en) 2003-10-06 2008-12-09 Tessera, Inc. Formation of circuitry with modification of feature height
US7061121B2 (en) * 2003-11-12 2006-06-13 Tessera, Inc. Stacked microelectronic assemblies with central contacts
JP4579258B2 (ja) * 2007-01-18 2010-11-10 力成科技股▲分▼有限公司 Ｂｇａ型パッケージ
JP2008277660A (ja) * 2007-05-02 2008-11-13 Powertech Technology Inc Ｌｇａ半導体実装構造
KR101479461B1 (ko) * 2008-10-14 2015-01-06 삼성전자주식회사 적층 패키지 및 이의 제조 방법
US8553420B2 (en) * 2010-10-19 2013-10-08 Tessera, Inc. Enhanced stacked microelectronic assemblies with central contacts and improved thermal characteristics
KR101061531B1 (ko) * 2010-12-17 2011-09-01 테세라 리써치 엘엘씨 중앙 콘택을 구비하며 접지 또는 배전을 개선한 적층형 마이크로전자 조립체

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