JP2015222520A5 - - Google Patents

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Publication number
JP2015222520A5
JP2015222520A5 JP2014106919A JP2014106919A JP2015222520A5 JP 2015222520 A5 JP2015222520 A5 JP 2015222520A5 JP 2014106919 A JP2014106919 A JP 2014106919A JP 2014106919 A JP2014106919 A JP 2014106919A JP 2015222520 A5 JP2015222520 A5 JP 2015222520A5
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JP
Japan
Prior art keywords
calculation
units
output data
arithmetic
calculation units
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JP2014106919A
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English (en)
Japanese (ja)
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JP6600128B2 (ja
JP2015222520A (ja
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Priority to JP2014106919A priority Critical patent/JP6600128B2/ja
Priority claimed from JP2014106919A external-priority patent/JP6600128B2/ja
Priority to GB1506268.0A priority patent/GB2526917B/en
Priority to DE102015208989.4A priority patent/DE102015208989B4/de
Priority to CN201510260992.6A priority patent/CN105093979B/zh
Publication of JP2015222520A publication Critical patent/JP2015222520A/ja
Publication of JP2015222520A5 publication Critical patent/JP2015222520A5/ja
Application granted granted Critical
Publication of JP6600128B2 publication Critical patent/JP6600128B2/ja
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JP2014106919A 2014-05-23 2014-05-23 演算処理装置 Active JP6600128B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2014106919A JP6600128B2 (ja) 2014-05-23 2014-05-23 演算処理装置
GB1506268.0A GB2526917B (en) 2014-05-23 2015-04-14 Fail-safe processing apparatus
DE102015208989.4A DE102015208989B4 (de) 2014-05-23 2015-05-15 Ausfallsichere Verarbeitungsvorrichtung
CN201510260992.6A CN105093979B (zh) 2014-05-23 2015-05-21 故障安全运算处理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014106919A JP6600128B2 (ja) 2014-05-23 2014-05-23 演算処理装置

Publications (3)

Publication Number Publication Date
JP2015222520A JP2015222520A (ja) 2015-12-10
JP2015222520A5 true JP2015222520A5 (enExample) 2016-10-06
JP6600128B2 JP6600128B2 (ja) 2019-10-30

Family

ID=53333722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014106919A Active JP6600128B2 (ja) 2014-05-23 2014-05-23 演算処理装置

Country Status (4)

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JP (1) JP6600128B2 (enExample)
CN (1) CN105093979B (enExample)
DE (1) DE102015208989B4 (enExample)
GB (1) GB2526917B (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110890884B (zh) * 2018-09-10 2024-06-21 台湾积体电路制造股份有限公司 故障安全电路、集成电路器件及控制电路的节点的方法
DE102019101615A1 (de) 2018-09-10 2020-03-12 Taiwan Semiconductor Manufacturing Co., Ltd. Ausfallsichere Schaltung, Layout, Vorrichtung und Verfahren

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04149743A (ja) * 1990-10-15 1992-05-22 Mitsubishi Electric Corp データ処理装置の駆動方式
JPH06298105A (ja) * 1993-04-15 1994-10-25 Nippondenso Co Ltd 後輪操舵装置の制御システム
JP2001183490A (ja) * 1999-12-22 2001-07-06 Hitachi Ltd 炉心流量制御システム
JP2002116921A (ja) 2000-10-06 2002-04-19 Matsushita Electric Ind Co Ltd 中央演算装置の補助装置
US7516358B2 (en) 2005-12-20 2009-04-07 Hewlett-Packard Development Company, L.P. Tuning core voltages of processors
US8143851B2 (en) * 2008-02-15 2012-03-27 Apple Inc. Power source having a parallel cell topology
WO2010038096A1 (en) 2008-09-30 2010-04-08 Freescale Semiconductor, Inc. Method and apparatus for handling an output mismatch
WO2011068177A1 (ja) * 2009-12-02 2011-06-09 日本電気株式会社 二重化計算システム及び二重化計算方法
JP2011198205A (ja) * 2010-03-23 2011-10-06 Railway Technical Research Institute 二重系制御システム
CN101996110B (zh) * 2010-11-17 2012-12-19 中国航空工业集团公司第六三一研究所 基于模块化结构的三余度容错计算机平台

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