JP2015176955A - Insulator layer having conductivity and method for manufacturing the same, and nitride semiconductor element and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide: an insulator layer having conductivity; a method for manufacturing the insulator layer; a nitride semiconductor element for which it is not necessary to peel a substrate and etch a buffer layer or the like; and a method for manufacturing the nitride semiconductor element.SOLUTION: In an insulator layer having conductivity, a plurality of fine penetrating holes are formed along a lamination direction of an insulator layer formed by laminating a plurality of layers so that conductivity is made to appear, and, in at least a part of the plurality of penetrating holes, the upper surfaces of penetrating holes are covered with a conductor layer formed on an upper surface of the insulator layer having conductivity, while peripheral wall surfaces of the penetrating holes are not covered.

Description

  The present invention relates to a conductive insulator layer and a manufacturing method thereof, and a nitride semiconductor device and a manufacturing method thereof.

Conventionally, as a light emitting diode (LED: Light Emitting Diode) having a nitride semiconductor layer laminated with a light emitting layer sandwiched therebetween, that is, a current injection type light emitting element using a nitride semiconductor, a so-called p-type electrode and n-type electrode are used. A horizontal light emitting diode in which an electrode is disposed from the upper surface side of the substrate and a vertical light emitting diode in which a p-type electrode is disposed from the upper surface side of the substrate and an n-type electrode is disposed from the lower surface side of the substrate are known. .

Here, FIG. 1 shows an example of the structure of a horizontal light-emitting diode. The horizontal light-emitting diode 100 shown in FIG. 1 includes a horizontal light-emitting diode configured to output light in the deep ultraviolet wavelength region, That is, it is a horizontal type deep ultraviolet light emitting diode.

The lateral light emitting diode 100 is used as a buffer layer on a substrate 102 made of silicon or sapphire using a metal organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxy (MBE) method. An AlN buffer layer 104 is crystal-grown, an AlN layer 106 is grown as a nitride semiconductor layer having a different composition epitaxially on the AlN buffer layer 104, and an n-AlGaN as an n-type nitride semiconductor layer is further grown on the AlN layer 106. The layer 108 is crystal-grown, and further, an AlGaN MQW (multiple quantum well) layer 110 is grown as a light emitting layer on the n-AlGaN layer 108, and the AlGaN MQW layer 110 is further grown. The p-AlGaN layer 112 is grown as a p-type nitride semiconductor layer having a different composition, and the p-GaN layer 114 is further grown on the p-AlGaN layer 112 to have a multilayer structure. .

The n-type electrode 116 is formed on the n-AlGaN layer 108, while the p-type electrode 118 is formed on the p-GaN layer 114.

Such a horizontal light emitting diode 100 has the structure described above, and emits light when a current flows through the n-type electrode 116 and the p-type electrode 118, and has a deep ultraviolet wavelength region from the upper surface side of the p-GaN layer 114. Light L1 is output.

When the n-type electrode 116 is formed, since the substrate 102 is an insulating substrate, a crystal in which each layer is formed on the sapphire substrate 102 up to the p-GaN layer 114 by crystal growth is partially viewed from above. The n-type electrode 116 is formed on the n-AlGaN layer 108 partially exposed on the surface by etching until the n-AlGaN layer 108 which is the n-type nitride semiconductor layer is exposed.

Further, in the crystal growth when manufacturing the lateral light emitting diode 100, the above description is made in order to relax the crystal lattice mismatch between the substrate 102 and the nitride semiconductor layer and to grow a high-quality nitride semiconductor layer. As described above, the AlN buffer layer 104 is provided as a buffer layer on the substrate 102, and the p-GaN layer 114 is grown as a bonding layer on the p-AlGaN layer 112 in order to obtain a high-quality p-junction. Formed.

However, in the lateral light emitting diode as described above, since it is necessary to partially etch the crystal in order to form the n-type electrode, its manufacturing process is difficult to epitaxially grow and is complicated and complicated. .

  For this reason, it has been pointed out that the manufacturing cost has increased and the resulting lateral light emitting diode is expensive.

Further, since the n-type electrode and the p-type electrode are arranged side by side, the problem that the area of the crystal is increased has been pointed out.

In recent years, in view of the problems in the lateral light emitting diode described above, a vertical light emitting diode in which a p-type electrode is disposed from the upper surface side of the substrate and an n-type electrode is disposed from the lower surface side of the substrate has been proposed. .

Here, FIG. 2 shows an example of the structure of the vertical light emitting diode, and the vertical light emitting diode 200 shown in FIG. 2 is configured to output light in the deep ultraviolet wavelength region.

In the vertical light emitting diode 200 shown in FIG. 2, the same or corresponding configuration as the configuration of the horizontal light emitting diode 100 shown in FIG. 1 is given the same reference numerals as those used in FIG. The detailed configuration and description of the operation are omitted.

That is, the vertical light emitting diode 200 is a crystal in which each layer is formed on the sapphire substrate 202 by crystal growth up to the p-GaN layer 214 which is a junction layer made of a p-type nitride semiconductor layer as in the case of the horizontal light emitting diode 100. The sapphire substrate 202 that is an insulator is peeled off using a technique such as laser peeling, and the AlN buffer layer 204 and the AlN layer 206 are etched to expose the n-AlGaN layer 208 that is an n-type nitride semiconductor layer. Thus, an n-type electrode 216 is formed in a stripe shape on the exposed surface of the n-AlGaN layer 208.

That is, the LED structure is configured such that the n-type electrode 216 is formed on the n-AlGaN layer 208 as the n-type nitride semiconductor layer from the lower surface side of the sapphire substrate 202.

The p-type electrode 218 has the same configuration as that of the lateral light emitting diode 100 described above.

Such a vertical light-emitting diode 200 has the structure described above, and emits light by passing a current through the n-type electrode 216 and the p-type electrode 218, and light L2 is output from the lower surface side of the n-AlGaN layer 208. Is done.

In the conventional vertical light emitting diode 200 described above, it is necessary to peel off the insulating substrate using a technique such as laser peeling, or to etch the buffer layer, etc., and this peeling or etching damages the nitride semiconductor layer. It has been pointed out that the quality of the light emitting diode deteriorates due to the occurrence of defects and the generation of defects.

In addition, as a substrate of the above-described conventional horizontal light emitting diode and vertical light emitting diode, those made of silicon (Si) in addition to sapphire are known. Since the substrate made of silicon is cheaper than the sapphire substrate, there is no problem that the manufacturing cost increases, but there is a problem that the substrate is easily warped or cracked in the manufacturing stage.

However, since the silicon substrate is conductive, vertical light emitting diodes that use a silicon substrate as an n-type electrode instead of attaching an n-type electrode have been developed. The light output from such a vertical light-emitting diode is It was limited to light in the visible region.

In addition, until now, in AlN and AlGaN used in ultraviolet light emitting diodes and deep ultraviolet light emitting diodes, the AlN layer is hardly doped with silicon and remains an insulator, but the AlGaN layer is conductive by doping silicon. It was known to have.

Therefore, the development of a new technology that allows current to flow through the AlN buffer layer and the AlN layer without using a horizontal light emitting diode that requires crystal processing or a vertical light emitting diode that requires separation of the insulator portion has been developed. It was desired.

  Note that the prior art that the applicant of the present application knows at the time of filing a patent application is not an invention related to a known literature invention, so there is no prior art document information to be described.

  The present invention has been made in view of the above-described various problems and demands of the prior art, and an object of the present invention is to peel off a conductive insulator layer, a manufacturing method thereof, and a substrate. It is another object of the present invention to provide a nitride semiconductor device that does not require etching of the buffer layer and the like, and a method for manufacturing the same.

In order to achieve the above-described object, the present invention is to make conductivity appear by forming a minute through hole in an insulator layer, and thus, for example, a light emitting device without using an n-type electrode. Can be configured.

That is, according to the present invention, for example, conductivity (for example, resistivity is 0) doped with high concentration (for example, 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ ) of an n-type impurity as a substrate. .00001Ω to 100Ω) (in this specification, a substrate having conductivity doped with such an n-type impurity at a high concentration is referred to as “n ⁺ substrate”). The AlN layer, which is an insulating layer formed on the n ⁺ substrate, can be made conductive, so that the n ⁺ substrate can be substituted for the n-type electrode, so that the substrate is peeled off or the buffer layer is etched. There is no need to do.

  Therefore, there is no risk of generating defects in the n-type nitride semiconductor layer due to peeling of the substrate or etching of the buffer layer, etc., and the element manufacturing process becomes extremely simple, and the manufacturing cost can be reduced.

In addition, according to the present invention, for example, a plurality of minute through holes are formed in the nitride semiconductor layer stacked on the buffer layer formed on the n ⁺ substrate, so that the strain generated during crystal growth due to the through holes. And the nitride semiconductor layer stacked on the nitride semiconductor layer is prevented from cracking.

  That is, according to the present invention, a plurality of minute through holes are formed along the above-described lamination direction of an insulating layer formed by laminating a plurality of layers so as to reveal conductivity.

  Further, in the present invention described above, in the above-described invention, at least a part of the plurality of through holes is covered with an upper surface of the through hole by a conductor layer formed on an upper surface of the conductive insulating layer, In addition, the peripheral wall surface of the through hole is not covered.

  Further, in the present invention described above, in the above-described invention, at least a part of the plurality of through holes is covered with an upper surface of the through hole by a conductor layer formed on an upper surface of the conductive insulating layer, And the surrounding wall surface of a through-hole is covered.

  Further, in the present invention described above, in the above-described invention, at least a part of the plurality of through holes is covered with an upper surface of the through hole by a conductor layer formed on an upper surface of the conductive insulating layer, And the inside of a through-hole is filled up.

  Further, according to the present invention, in the above-described invention, the insulating layer having conductivity is formed of any one of AlN, BN, and SiC.

  According to the present invention, in the above-described invention, the conductor layer is formed of any material of AlGaN, AlBN, or diamond.

  Further, according to the present invention, a plurality of minute through holes are formed in the upper part of the protrusions along the stacking direction by crystallizing and stacking an insulator layer on a substrate having a plurality of protrusions made of a metal material An insulator layer having conductivity is manufactured.

  Further, the present invention is the above-described invention, wherein the conductive layer is formed by crystal growth of a conductive material on the upper surface of the insulator layer, and at least some of the plurality of minute through holes are The upper surface of the through hole is covered with the conductor layer, and the peripheral wall surface of the through hole is not covered.

  Further, the present invention is the above-described invention, wherein the conductive layer is formed by crystal growth of a conductive material on the upper surface of the insulator layer, and at least some of the plurality of minute through holes are The upper surface of the through hole is covered with the conductor layer, and the peripheral wall surface of the through hole is covered.

  Further, the present invention is the above-described invention, wherein the conductive layer is formed by crystal growth of a conductive material on the upper surface of the insulator layer, and at least some of the plurality of minute through holes are The upper surface of the through hole is covered with the conductor layer, and the inside of the through hole is filled.

  Further, according to the present invention, in the above-described invention, the insulating layer having conductivity is formed of any one of AlN, BN, and SiC.

  Further, according to the present invention, in the above-described invention, the insulating layer having conductivity is formed of any material of AlGaN, AlBN, or diamond.

The present invention also provides a nitride semiconductor device that has a nitride semiconductor layer stacked on a substrate with a light emitting layer sandwiched therebetween and outputs deep ultraviolet light, and is doped with an n-type impurity at a high concentration. The substrate, which is an n ⁺ substrate having a conductivity of 100Ω or less, a particle-shaped protrusion made of a metal material disposed on the substrate, and a hole formed along the layer stacking direction on the protrusion. An n-type nitride semiconductor layer having a plurality of minute through holes and having conductivity, a nitride semiconductor layer laminated on the n-type nitride semiconductor layer with a light emitting layer interposed therebetween, and the nitride semiconductor The p-type electrode is disposed on the layer, and has conductivity throughout the device.

  According to the present invention, in the above-described invention, the n-type nitride semiconductor layer is formed of any one of AlN, BN, and SiC.

  According to the present invention, in the above-described invention, the nitride semiconductor layer is made of any material of AlGaN, AlBN, or diamond.

The present invention also relates to a method for manufacturing a nitride semiconductor device that outputs a deep ultraviolet light by forming a nitride semiconductor layer to be laminated on a substrate with a light emitting layer sandwiched between the substrate and the n-type impurity is doped at a high concentration. Forming the n ⁺ substrate having a conductivity of 100Ω or less, forming a plurality of protrusions made of a metal material formed on the substrate, and forming an n-type nitride on the substrate having the protrusions By growing a crystal of a physical semiconductor, an n-type nitride semiconductor layer having a plurality of minute through-holes drilled along the layer stacking direction on the protrusion and having conductivity is formed, A nitride semiconductor layer is formed on the n-type nitride semiconductor layer so as to sandwich a light emitting layer, and a p-type electrode disposed on the nitride semiconductor layer is formed. Nitrogen with conductivity It is obtained so as to produce an object semiconductor device.

  According to the present invention, in the above-described invention, the n-type nitride semiconductor layer is formed of any one of AlN, BN, and SiC.

  According to the present invention, in the above-described invention, the nitride semiconductor layer is made of any material of AlGaN, AlBN, or diamond.

  Since the present invention is configured as described above, a conductive insulator layer and a manufacturing method thereof, and a nitride semiconductor element that does not require peeling of a substrate or etching of a buffer layer or the like and a manufacturing method thereof It is possible to provide an excellent effect.

FIG. 1 is an explanatory diagram showing an example of a cross-sectional structure of a conventional horizontal light emitting diode that outputs light in the deep ultraviolet wavelength region. FIG. 2 is an explanatory diagram showing an example of a cross-sectional structure of a conventional vertical light emitting diode that outputs light in the deep ultraviolet wavelength region. FIG. 3 is a configuration explanatory view showing an example of a cross-sectional structure of a vertical deep ultraviolet light emitting diode using a nitride semiconductor device according to an example of an embodiment of the present invention that outputs light in the deep ultraviolet wavelength region. 4A is a schematic cross-sectional perspective view of the main part of the deep ultraviolet light-emitting diode shown in FIG. 3, and FIG. 4B is an optical microscope observing the surface of the n-AlN layer of the deep ultraviolet light-emitting diode. It is an optical micrograph. FIG. 5A is a schematic cross-sectional perspective view of the main part of the deep ultraviolet light emitting diode shown in FIG. 3, and FIG. 5B is an optical microscope observing the surface of the n-AlGaN layer of the deep ultraviolet light emitting diode. It is an optical micrograph. FIG. 6 is an electron micrograph obtained by observing a cross section of a deep ultraviolet light emitting diode according to an example of the embodiment of the present invention with an electron microscope. FIG. 7 (a) is an optical micrograph when the surface of the n-AlN layer is observed with an optical microscope when the crystal growth of the TMA gas flow rate is 4SCCM, and FIG. 7 (b) is a TMA gas flow rate of 6SCCM. FIG. 7C is an optical micrograph when the surface of the n-AlN layer is observed with an optical microscope when the crystal is grown, and FIG. 7C is an optical microscope showing the surface of the n-AlN layer when the TMA gas flow rate is 7 SCCM. FIG. 7 (d) is an optical micrograph when the surface of the n-AlN layer is observed with an optical microscope when the TMA gas flow rate is 8SCCM for crystal growth. FIG. 8 is a characteristic diagram showing the relationship between the flow rate of TMA gas during crystal growth and the total area of via holes formed. FIG. 9 is a schematic configuration explanatory diagram showing an apparatus configuration when measuring conductivity of a sample which is a part of a deep ultraviolet light emitting diode using a nitride semiconductor device according to an example of the embodiment of the present invention. . FIG. 10 is a characteristic diagram showing the relationship between the total area of the via holes and the resistance generated in the sample. FIG. 11 is a characteristic diagram showing a reverse voltage current characteristic of a deep ultraviolet light emitting diode using a nitride semiconductor device according to an example of the embodiment of the present invention. FIG. 12 is a characteristic diagram showing current-voltage characteristics of a deep ultraviolet light emitting diode using a nitride semiconductor device according to an example of the embodiment of the present invention. FIGS. 13A, 13B, and 13C are schematic explanatory views schematically showing the internal state of the via hole.

  Hereinafter, an example of an embodiment of a conductive insulator layer and a method for manufacturing the same, and a nitride semiconductor device and a method for manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

In the following description, a deep ultraviolet light-emitting diode will be described as an example of a nitride semiconductor element using a conductive insulator layer.

  Here, FIG. 3 shows an example of the structure of a deep ultraviolet light-emitting diode using a conductive insulator layer according to an example of the embodiment of the present invention.

Note that the deep ultraviolet light emitting diode 10 shown in FIG. 3 is a vertical light emitting diode, which is a deep ultraviolet light emitting diode configured to output light in the deep ultraviolet wavelength region.

The deep ultraviolet light emitting diode 10 is an n ⁺ substrate, for example, having conductivity (for example, resistance) doped with an n-type impurity at a high concentration (for example, 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ ). Si substrate having a rate of 0.00001Ω to 100Ω (in this specification, a Si substrate having conductivity doped with an n-type impurity at a high concentration is referred to as an “n ⁺ -Si substrate”. .) 12, a plurality of micro-sized projections 14 (buffer layer) made of Al formed on the upper surface side of the n ⁺ -Si substrate 12, and an n-AlN layer 16 formed on the upper side of the plurality of projections 14. An n-AlGaN layer 18 formed above the n-AlN layer 16, an AlGaN MQW layer 20 formed above the n-AlGaN layer 18, and an upper side of the AlGaN MQW layer 20. P-AlGaN layer 22, p-GaN layer 24 formed above p-AlGaN layer 22, and p-type electrode 26 formed above p-GaN layer 24. The

When the n-AlN layer 16 and the n-AlGaN layer 18 are stacked on the n ⁺ -Si substrate 12 having the protrusions 14, a plurality of naturally formed via holes ( Spontaneous Via Hole: hereinafter simply referred to as “via hole”) 28 is formed. The via hole 28 is a hole having a length of, for example, 1 to 2 μm, and is formed through the n-AlN layer 16 and the n-AlGaN layer 18.

The deep ultraviolet light emitting diode 10 is a vertical deep ultraviolet light emitting diode that emits deep ultraviolet light L3 from the upper surface side.

Hereinafter, the configuration of the deep ultraviolet light emitting diode 10 will be described in more detail.

First, as described above, the n ⁺ -Si substrate 12 is used as the substrate, and the thickness of the n ⁺ -Si substrate 12 is preferably 100 μm to 5000 μm, for example.

Next, a protrusion 14 made of Al as shown in FIG. 4A is disposed on the surface of the n ⁺ -Si substrate 12.

Such protrusions 14 are formed by introducing trimethylaluminum (TMA) gas onto the surface of the n ⁺ -Si substrate 12 using metal organic chemical vapor deposition (MOCVD).

  Specifically, the TMA gas flow rate was set to 4 to 10 SCCM and introduced for 60 to 200 seconds.

Further, the temperature in the MOCVD apparatus at that time was set to 700 to 1000 ° C.

Here, FIG. 4A shows a plurality of protrusions 14 formed on the surface of the n ⁺ -Si substrate 12. As shown in the drawing, the protrusions 14 are randomly arranged in different sizes and shapes.

  Further, the size of the particles of the protrusions 14 can be controlled by changing the flow rate of TMA gas, that is, the flow rate of aluminum. The size and number of the protrusions 14 affect the formation of via holes 28 described later, which will be described in detail later.

Such protrusions 14 serve as a buffer layer of the deep ultraviolet light emitting diode 10.

Next, the n-AlN layer 16 is formed above the protrusions 14 on the surface of the n ⁺ -Si substrate 12.

The n-AlN layer 16 also grows n-AlN crystals by introducing TMA gas, tetraethylsilane (TESi) gas, and ammonia (NH ₃ ) gas onto the protrusions 14 by MOCVD.

Here, the flow rate of each gas was set to 11 to 50 SCCM for TMA gas, 20 to 100 SCCM for TESi gas, 500 to 5000 slm for NH ₃ gas, and introduced for 1000 to 6000 seconds.

Moreover, the temperature in the MOCVD apparatus at that time was set to 800 ° C. to 1200 ° C.

  Next, the n-AlGaN layer 18 is formed on the n-AlN layer 16 formed by the above method.

The n-AlGaN layer 18 is crystal-grown by MOCVD using TMA gas, TESi gas, NH ₃ gas, and trimethyl gallium (TMG) gas.

The flow rates of each gas were 11 to 50 SCCM for TMA gas, 20 to 100 SCCM for TESi gas, 500 to 5000 slm for NH ₃ gas, and 10 to 50 SCCM for TMG gas, and were introduced for 1500 to 5000 seconds.

Moreover, the temperature in the MOCVD apparatus at that time was set to 800 ° C. to 1200 ° C.

  Next, the AlGaN MQW layer 20 is formed on the n-AlGaN layer 18 formed by the above method.

  The AlGaN MQW layer 20 is crystal-grown by MOCVD using TMA gas, NH3 gas, and TMG gas.

The flow rate of each gas was 5 to 500 SCCM for TMA gas, 1000 to 10000 slm for NH ₃ gas, and 10 to 500 SCCM for TMG gas, and was introduced for 20 to 200 seconds.

Moreover, the temperature in the MOCVD apparatus at that time was 1100 ° C. to 1200 ° C.

  Next, the p-AlGaN layer 22 is formed on the AlGaN MQW layer 20 formed by the above method.

The p-AlGaN layer 22 is crystal-grown by MOCVD using TMA gas, NH ₃ gas, TMG gas, and Cp ₂ Mg gas.

The flow rate of each gas was 5 to 500 SCCM for TMA gas, 1000 to 10000 slm for NH ₃ gas, 10 to 500 SCCM for TMG gas, and 10 to 500 SCCM for Cp ₂ Mg gas, and was introduced for 30 seconds to 300 seconds.

Moreover, the temperature in the MOCVD apparatus at that time was set to 1000 ° C. to 1100 ° C.

Next, the p-GaN layer 24 is formed on the p-AlGaN layer 22 formed by the above method.
The p-GaN layer 24 is crystal-grown by MOCVD using NH ₃ gas, TMG gas, and Cp ₂ Mg gas.

The flow rates of each gas were 1000 to 10000 slm for NH ₃ gas, 10 to 500 SCCM for TMG gas, and 10 to 500 SCCM for Cp ₂ Mg gas, and were introduced for 30 seconds to 300 seconds.

Moreover, the temperature in the MOCVD apparatus at that time was set to 900 to 1000 ° C.

  The p-type electrode 26 is formed on the p-GaN layer 24.

Here, in the deep ultraviolet light-emitting diode 10, in order to extract light from the upper side of the n ⁺ -Si substrate 12, the p-GaN layer 24 is striped after the multilayer structure is formed as described above. The p-type electrode 26 is formed on the stripe-shaped p-GaN layer 24.

^Further, the n + -Si substrate 12, to take the lead wire on the lower ^surface, applying a direct metal foil 30 on the lower side surface of the n + -Si substrate 12. As such a metal foil 30, for example, a foil made of a conductive material, a silver paste, or the like can be used.

The deep ultraviolet light emitting diode 10 according to the present embodiment is formed by the above-described method. In such a formation stage, a via hole 28 is formed above the protrusion 14 formed on the surface of the n ⁺ -Si substrate 12. The

More specifically, after the deep ultraviolet light emitting diode 10 forms the protrusions 14, the n-AlN layer 16 and the n-AlGaN layer 18 are crystal-grown. During the crystal growth, the n-AlN layer 16 and the n-AlGaN layer 10 are grown. A via hole 28 is formed inside the layer 18. Such via holes 28 are naturally formed during the crystal growth process.

Here, FIG. 4A shows a schematic cross-sectional perspective view of an essential part showing the n ⁺ -Si substrate 12, the protrusion 14, and the n-AlN layer 16 of the deep ultraviolet light emitting diode 10.

In FIG. 4A, a gap is provided between the n ⁺ -Si substrate 12 and the n-AlN layer 16 for easy understanding, but there is actually no gap and n ⁺ - The Si substrate 12 and the n-AlN layer 16 are formed in close contact.

  In the crystal growth process of the n-AlN layer 16, a plurality of via holes 28 are formed on the protrusions 14.

FIG. 4B shows an optical micrograph of the n-AlN layer 16 observed.

FIG. 5A shows a schematic cross-sectional perspective view of the main part showing the n ⁺ -Si substrate 12, the protrusion 14, the n-AlN layer 16, and the n-AlGaN layer 18 of the deep ultraviolet light emitting diode 10. ing.

Further, in FIG. 5A, a gap is provided between the n ⁺ -Si substrate 12 and the n-AlN layer 16 for easy understanding, but there is actually no gap and n ^{The +} -Si substrate 12 and the n-AlN layer 16 are formed in close contact with each other.

  As illustrated in FIG. 5A, the via hole 28 formed in the n-AlN layer 16 is also continuously formed in the n-AlGaN layer 18.

  Further, as shown in FIGS. 3 and 5A, such via holes 28 converge in the n-AlGaN layer 18 to become holes having a length of, for example, about 1 to 2 μm.

Here, although an electron micrograph of the via hole 28 is shown in FIG. 6, it can be seen that the via hole 28 penetrates from the n-AlN layer 16 to the n-AlGaN layer 18.

FIG. 5B shows an optical micrograph of the n-AlGaN layer 18 observed. Since the surface of the n-AlGaN layer 18 does not reach the via hole 28, it is a smooth surface without a hole.

Next, the relationship between the flow rate of TMA gas that flows in the MOCVD apparatus when the protrusion 14 included in the deep ultraviolet light-emitting diode 10 and the size of the protrusion 14 will be described with reference to FIG.

FIG. 7A shows an optical micrograph of the surface of the n-AlN layer 16 when the flow rate of TMA gas flowing in the MOCVD apparatus when the n-AlN layer 16 is formed is 4 SCCM, and FIG. ) Shows an optical micrograph of the surface of the n-AlN layer 16 when the flow rate of TMA gas flowing in the MOCVD apparatus when the n-AlN layer 16 is formed is 6 SCCM, and FIG. FIG. 7D shows an optical micrograph of the surface of the n-AlN layer 16 when the flow rate of TMA gas flowing in the MOCVD apparatus during the formation of the AlN layer 16 is 7 SCCM, and FIG. 7D shows the n-AlN layer 16. 2 shows an optical micrograph when the flow rate of TMA gas flowing in the MOCVD apparatus during the formation of is 8 SCCM.

  In the case of FIG. 7A, the TMA gas flow rate is 4 SCCM. Under this condition, the via hole 28 formed in the n-AlN layer 16 had a maximum of 35 via holes having a diameter of 0.2 μm or less in the area 1.

  In the case of FIG. 7B, the TMA gas flow rate is 6 SCCM. Under this condition, the via hole 28 formed in the n-AlN layer 16 had a maximum of 28 via holes having a diameter of 0.3 μm or less in the area 2.

  In the case of FIG. 7C, the TMA gas flow rate was set to 7 SCCM. Under these conditions, the via hole 28 formed in the n-AlN layer 16 had a maximum of eight via holes having a diameter of 0.7 μm or less in the area 3.

In the case of FIG. 7D, the TMA gas flow rate is 8 SCCM. Under this condition, the via hole 28 formed in the n-AlN layer 16 had a maximum of 11 via holes having a diameter of 1 μm or less in the area 4.

Thus, as the flow rate during the formation of the n-AlN layer 16 increases, the diameter of the via hole 28 formed in the n-AlN layer 16 increases (see FIG. 8).

In the above configuration, the deep ultraviolet light emitting diode 10 can be used to emit deep ultraviolet light using the n ⁺ -Si substrate 12 instead of the n-type electrode.

Here, the conductivity of the n ⁺ -Si substrate 12 of the deep ultraviolet light emitting diode 10 according to the present embodiment will be described below.

To measure the conductivity of n ⁺ -Si substrate ^12, n + -Si substrate 12, with the positive electrode and the negative electrode element in a state of stacking projections 14, n-AlN layer 16, n-AlGaN layer 18 The conductivity was measured (see FIG. 9).

More specifically, a resistance value generated when a current was passed through the sample was measured. From the measurement, the resistance generated in the element was related to the total area of the via hole 28.

  FIG. 10 is a characteristic diagram showing the relationship between the total area of the via hole 28 and the resistance.

  The experimental results shown in FIG. 10 indicate that the smaller the total area of the via hole 28, the larger the resistance, and the larger the total area of the via hole 28, the smaller the resistance. That is, since the generated resistance varies depending on the diameter of the via hole 28, it can be understood that the element shown in FIG.

That is, the result is that the resistance generated is small when the flow rate of the TMA gas when forming the via hole 28 is large.

Next, the characteristics of the deep ultraviolet light emitting diode according to the present invention containing a conductive sample will be described with reference to FIGS. 11 and 12.

FIG. 11 is a characteristic diagram showing reverse current voltage characteristics of the deep ultraviolet light emitting diode according to the present invention. Looking at such reverse current voltage characteristics, a breakdown current is observed.

  FIG. 12 is a characteristic diagram showing current-voltage characteristics of the deep ultraviolet light emitting diode according to the present invention.

From these results, it can be confirmed that the deep ultraviolet light emitting diode according to the present invention has conductivity from the p-type electrode 26 to the n ⁺ -Si substrate 12.

Here, the inside of the via hole 28 will be considered with reference to FIGS. 13A, 13B, and 13C. FIGS. 13A, 13B, and 13C are schematic explanatory views schematically showing the internal state of the via hole 28. FIG.

  As for the state of the via hole 28, the upper surface of the via hole 28 shown in FIG. 13A is covered with n-AlGaN and the peripheral wall surface 28a is not covered with n-AlGaN (state 1). The via hole 28 shown in FIG. 13B is covered with n-AlGaN and the peripheral wall surface 28a is covered with n-AlGaN (state 2), and the via hole 28 shown in FIG. 13C. It is considered that there are three states (the state 3) in which the upper surface is covered with n-AlGaN and the inside is filled with n-AlGaN.

  In the state 1 described above, current is considered to flow due to the conductivity of n-AlGaN and the conductivity due to dangling bonds (unbonded hands) on the peripheral wall surface 28a of the via hole 28.

  Moreover, it is thought that the thing of the state 2 has also acquired electroconductivity by the dangling bond from the part covered with n-AlGaN.

In the state 3, the current is considered to flow through the conductive n-AlGaN.

These three states may be only a single state, may be any two states, or may be a mixture of three states.

As described above, since an n ⁺ -Si substrate having conductivity can be used as an n-type electrode, a vertical deep ultraviolet light-emitting diode can be used without performing a peeling process or a process of attaching an n-type electrode. You will be able to get

  Therefore, no defect is generated in the element by the peeling process, and the cost can be reduced by reducing the number of processes.

In addition, since the n ⁺ -Si substrate replaces the n-type electrode, the device can be downsized.

  Each embodiment described above can be modified as shown in the following (1) to (6).

(1) In the above-described embodiment, an example is described using the n ⁺ -Si substrate as n ⁺ substrate, the substrate which can be used as an n ⁺ substrate in the present invention is limited to n ⁺ -Si substrate Not n-type, but has conductivity (eg, resistivity is 0.00001Ω to 100Ω) doped with n-type impurities at a high concentration (eg, 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ ) Substrates made of various materials such as sapphire or AlN can be used.

  (2) In the above-described embodiment, the example in which AlN is used as the insulator in which the via hole 28 is formed has been described. However, the present invention is not limited to this, and examples of the insulator include BN and SiC. Etc. can be used. Moreover, although the example using AlGaN as a conductor was demonstrated, it is not restricted to this, As a conductor, AlBN, a diamond, etc. can be used.

  Moreover, as a combination of such an insulator and a conductor, it is more preferable to combine BN and AlBN, or to combine SiC and diamond.

  (3) In the above-described embodiment, the via hole is formed by forming the protrusion on the substrate and crystal-growing the AlN layer and the AlGaN layer. However, the present invention is not limited to this. Even if an AlGaN layer is crystal-grown by MOCVD method after drilling a minute through-hole so as to reach the substrate with respect to the AlN layer grown on the crystal, the same effect as the via hole in the deep ultraviolet light emitting diode according to the present invention Is expected.

(4) In the above-described embodiment, the n ⁺ -Si substrate is used as the substrate of the deep ultraviolet light emitting diode. However, the present invention is not limited to this, and a sapphire substrate may be used.

Further, in the case of forming a via hole using a sapphire substrate, a through hole reaching n-AlN is formed in the sapphire substrate, and a conductive material such as aluminum is poured into the through hole to make the via hole conductive. In such a case, an effect equivalent to that of the via hole formed on the n ⁺ -Si substrate is expected.

  (5) In the above-described embodiment, a deep ultraviolet light emitting diode is used as an example of using a nitride semiconductor element. However, the present invention is not limited to this, and other examples include, for example, a high voltage transistor. Can be used.

  (6) You may make it combine suitably embodiment mentioned above and other embodiment shown to said (1) thru | or (5).

  The present invention can be used in various applications as a semiconductor element.

10, 200 Vertical light emitting diode 12 n ⁺ -Si substrate 14 Protrusion (buffer layer)
16 n-AlN layer 18 n-AlGaN layer 20 AlGaN MQW layer 22 p-AlGaN layer 24 p-GaN layer 26 p-type electrode 28 via hole 30 metal foil
DESCRIPTION OF SYMBOLS 100 Horizontal light emitting diode 102 Substrate 104 AlN buffer layer 106 AlN layer 108 n-AlGaN layer 110 AlGaN MQW layer 112 p-AlGaN layer 114 p-GaN layer 116 n-type electrode 118 p-type electrode 202 Substrate 204 AlN buffer layer 206 AlN layer 208 n-AlGaN layer 210 AlGaN MQW layer 212 p-AlGaN layer 214 p-GaN layer 216 n-type electrode 218 p-type electrode

Claims (18)

An insulating layer having conductivity, wherein a plurality of minute through-holes are formed along the stacking direction of the insulating layer formed by stacking a plurality of layers to reveal conductivity. The conductive insulator layer according to claim 1,
At least a part of the plurality of through holes is covered with an upper surface of the through hole by a conductor layer formed on an upper surface of the conductive insulating layer, and a peripheral wall surface of the through hole is covered. A conductive insulator layer characterized by having no conductivity. The conductive insulator layer according to claim 1,
At least a part of the plurality of through holes is covered with an upper surface of the through hole by a conductor layer formed on an upper surface of the conductive insulating layer, and a peripheral wall surface of the through hole is covered. A conductive insulator layer characterized by comprising: The conductive insulator layer according to claim 1,
At least a part of the plurality of through holes is covered with an upper surface of the through hole by a conductor layer formed on the upper surface of the conductive insulating layer, and the inside of the through hole is filled. A conductive insulator layer characterized by the above. 5. The conductive insulator layer according to claim 1, wherein the conductive insulator layer is made of any one of AlN, BN, and SiC. A conductive insulator layer characterized by the above. The conductive insulator layer according to any one of claims 1, 2, 3, 4, or 5, wherein the conductor layer is formed of any one of AlGaN, AlBN, and diamond. An insulating layer having electrical conductivity. Conductive insulator in which a plurality of minute through holes are formed in the upper portion of the protrusion along the stacking direction by crystallizing and laminating an insulator layer on a substrate having a plurality of protrusions made of a metal material. A method for producing a conductive insulator layer, characterized by producing a layer. In the manufacturing method of the insulator layer which has conductivity according to claim 7,
A conductive layer is formed by crystal growth of a conductive material on the upper surface of the insulator layer;
At least a part of the plurality of minute through holes is covered with the conductor layer and the upper surface of the through hole is covered, and the peripheral wall surface of the through hole is not covered. A method for producing a body layer. In the manufacturing method of the insulator layer which has conductivity according to claim 8,
A conductive layer is formed by crystal growth of a conductive material on the upper surface of the insulator layer;
At least a part of the plurality of minute through holes is covered with the conductor layer and the upper surface of the through hole is covered, and the peripheral wall surface of the through hole is covered. A method for producing a body layer. In the manufacturing method of the insulator layer which has conductivity according to claim 8,
A conductive layer is formed by crystal growth of a conductive material on the upper surface of the insulator layer;
At least some of the plurality of minute through holes are covered with the upper surface of the through holes by the conductor layer, and the insides of the through holes are filled. Layer manufacturing method. 11. The method for manufacturing an insulator layer having conductivity according to claim 7, wherein the insulator layer having conductivity is made of any one of AlN, BN, and SiC. A method for producing a conductive insulator layer, characterized by being formed. In the manufacturing method of the insulator layer which has conductivity according to any one of claims 7, 8, 9, 10 or 11,
The method for producing a conductive insulator layer, wherein the conductive insulator layer is made of any one of AlGaN, AlBN, and diamond. A nitride semiconductor element that has a nitride semiconductor layer laminated so as to sandwich a light emitting layer on a substrate and outputs deep ultraviolet light,
the substrate being an n ⁺ substrate doped with a high concentration of n-type impurities and having a conductivity of 100Ω or less;
Particulate protrusions made of a metal material disposed on the substrate;
An n-type nitride semiconductor layer having a plurality of minute through holes perforated along the stacking direction of the layers at the top of the protrusion and having conductivity;
A nitride semiconductor layer laminated on the n-type nitride semiconductor layer so as to sandwich a light emitting layer; and
A p-type electrode disposed on the nitride semiconductor layer, and
A nitride semiconductor device characterized by having conductivity throughout the device. The nitride semiconductor device according to claim 13, wherein
The n-type nitride semiconductor layer is formed of any one of AlN, BN, and SiC. The nitride semiconductor device according to any one of claims 13 and 14,
The nitride semiconductor layer is formed of any material of AlGaN, AlBN, or diamond. A method of manufacturing a nitride semiconductor element that forms a nitride semiconductor layer to be laminated so as to sandwich a light emitting layer on a substrate and outputs deep ultraviolet light,
forming the substrate which is an n ⁺ substrate doped with an n-type impurity at a high concentration and having a conductivity of 100Ω or less;
Forming a plurality of protrusions made of a metal material formed on the substrate;
The n-type nitride semiconductor is crystal-grown on the substrate having the protrusions, so that a plurality of minute through-holes formed along the layer stacking direction are provided on the protrusions and have conductivity. forming an n-type nitride semiconductor layer;
Forming a nitride semiconductor layer laminated on the n-type nitride semiconductor layer so as to sandwich a light emitting layer;
Forming a p-type electrode disposed on the nitride semiconductor layer; and
A method for manufacturing a nitride semiconductor device, comprising manufacturing a nitride semiconductor device having conductivity over the entire device. The method for manufacturing a nitride semiconductor device according to claim 16,
The method of manufacturing a nitride semiconductor device, wherein the n-type nitride semiconductor layer is formed of any one of AlN, BN, and SiC. In the manufacturing method of the nitride semiconductor device according to any one of claims 16 and 17,
The method for manufacturing a nitride semiconductor device, wherein the nitride semiconductor layer is formed of any one of AlGaN, AlBN, and diamond.