WO2012090254A1 - Electrode for ohmic contact with n-type group iii nitride semiconductor and method for manufacturing same - Google Patents

Abstract

In the present invention, good ohmic joining is formed with an n-type group III nitride semiconductor. As is shown in FIG. 1 (c), a p-side electrode (14) is formed on (the upper surface of) a p-type GaN layer (13). As is shown in FIG. 1 (d), a copper block (32) is joined to the entire upper surface via cap metal (31). Thereafter, a lift-off layer (21) is removed (lift-off process) by a chemical treatment. Next, anisotropic wet etching is carried out (surface etching process) on the laminated structure of an n-type GaN layer (11) and the p-type GaN layer (12) exposed by this surface. As is shown in FIG. 1 (f), the surface shape of the N polarity surface following this etching is a textured shape constituted of a group of <10-1-1> surfaces. Next, as is shown in FIG. 1 (g), Ti/Ni/Au is formed (electrode forming process) for the n-side electrode (electrode) (12) on the lower surface of the n-type GaN layer (11) in this state.

Description

Electrode for ohmic contact with n-type group III nitride semiconductor layer and manufacturing method thereof

The present invention relates to an electrode used for a group III nitride semiconductor formed by epitaxial growth and a manufacturing method thereof.

Group III nitride semiconductors typified by GaN are widely used as materials for light-emitting elements and power elements such as blue and green LEDs (light-emitting diodes) and LDs (laser diodes) because of their wide band gaps. Yes. In silicon, which is a representative semiconductor material, a large-diameter wafer obtained by cutting out a large-diameter bulk crystal is generally used. On the other hand, in such a compound semiconductor, it is very difficult to obtain a bulk crystal having a large diameter (for example, 4 inches diameter or more). For this reason, when manufacturing a semiconductor device using such a compound semiconductor, a wafer obtained by heteroepitaxially growing the compound semiconductor on a substrate made of a different material is generally used. Further, a pn junction and a heterojunction constituting the LED and LD can be obtained by further epitaxial growth thereon.

For example, sapphire is known as a material for an epitaxial growth substrate on which a GaN single crystal can be grown. With sapphire, it is relatively easy to obtain a large-diameter bulk single crystal, and GaN can be heteroepitaxially grown on a substrate made of the single crystal by appropriately selecting the plane orientation. Thereby, a wafer on which a large-diameter GaN single crystal is formed can be obtained.

Here, a pn junction is formed by forming a p-type GaN layer and an n-type GaN layer on a sapphire substrate. In general, obtaining a good p-type GaN layer means obtaining an n-type GaN layer. It is difficult compared to For this reason, normally in this configuration, a thick n-type GaN layer is formed on a sapphire substrate, and a thin p-type GaN layer is sequentially formed on the n-type GaN layer by epitaxial growth. In this configuration, since the sapphire serving as the substrate is insulative, electrical contact to the p-type GaN layer and the n-type GaN layer is often taken from the upper side (the side opposite to the substrate). Since sapphire is transparent, light emission can be extracted from the lower side in the light emitting element (flip chip structure).

FIG. 5 shows a simplified manufacturing process of the light-emitting element having this configuration. In this manufacturing method, first, an n-type GaN layer 92 and a p-type GaN layer 93 are sequentially formed on a sapphire substrate 91 as shown in FIG. In practice, a buffer layer is often formed between the n-type GaN layer 92 and the sapphire substrate 91 in order to improve the crystallinity of the n-type GaN layer 92, but the description thereof is omitted here. ing. Thereafter, as shown in FIG. 5 (b), the surface is partially etched to form a region where the n-type GaN layer 92 is exposed, and an n-side electrode 94 is formed in this region. A p-side electrode 95 is formed on the surface of the GaN layer 93.

The material configuration of the electrode in such a configuration is described in Patent Document 1, for example. Here, a structure in which Cr or a Cr alloy is formed by sputtering as a layer in contact with the n-type GaN layer 92 in the n-side electrode 94 and an Au layer is formed thereon via Ti is formed on the n-type GaN layer 92. On the other hand, it has been described that it has good ohmic contact characteristics.

In the configuration of FIG. 5, light emission is extracted from the lower side, but the region where the n-type GaN layer 92 is exposed on the upper right side in FIG. 5B does not contribute to the light emission at all. For this reason, as a form having higher luminous efficiency, a configuration in which the sapphire substrate serving as the growth substrate is removed and an n-side electrode is formed on the back side of the n-type GaN layer is also used. FIG. 6 shows a simplified manufacturing method of the light emitting element having this configuration.

In this manufacturing method, first, as shown in FIG. 6A, an n-type GaN layer 92 and a p-type GaN layer 93 are sequentially formed on a sapphire substrate 91 via a lift-off layer 96. Thereafter, as shown in FIG. 6B, the lift-off layer 96 is removed by chemical treatment (chemical lift-off) or laser light irradiation (laser lift-off). As a result, the sapphire substrate 91 and the n-type GaN layer 92 are separated, and the lower surface of the n-type GaN layer 92 is exposed. Thereby, as shown in FIG. 6C, the n-side electrode 94 can be formed on a part of the lower surface of the n-type GaN layer 92, and the p-side electrode 95 can be formed on the upper surface of the p-type GaN layer 93. . In this configuration, since a substantial light emitting area can be taken as compared with the configuration of FIG. 5, high luminous efficiency can be obtained. Further, since it is not necessary to extract light from the upper surface side of the p-type GaN layer 93, the area of the p-side electrode 95 that is not transparent to the light is increased, and the p-side electrode is formed over a wide range of the surface of the p-type GaN layer 93. 95 can also be formed. Since the resistivity of the p-type GaN layer 93 is generally higher than that of the n-type GaN layer 92, widening the area of the p-side electrode 95 is effective in reducing the resistance of the electrode portion. In addition, if a material having a high reflectance with respect to the emission wavelength is used as the p-type ohmic electrode in contact with the p-type GaN layer, light from the light-emitting layer is reflected to the opposing surface side, and higher luminous efficiency can be obtained.

JP 2005-197670 A

However, GaN, which is a compound semiconductor, is composed of two types of elements, unlike group IV semiconductors such as silicon. For this reason, in the crystal structure, there is a crystal plane having directionality or polarity. For example, the {0001} plane of GaN having a wurtzite structure is a so-called polar plane, and is a (0001) Ga polar plane composed only of Ga atoms and (000-1) N ( Nitrogen) polar surfaces are formed in different orientations. In a GaN single crystal, if the upper surface is this (0001) Ga polar surface (hereinafter also referred to as Ga polar surface or Ga-Polar), the lower surface parallel to the upper surface Is necessarily a (000-1) N polar face (hereinafter also referred to as a nitrogen polar face or N-Polar). Since the constituent elements of the two types of surfaces are completely different, their properties are also greatly different. Therefore, for example, in the configuration shown in FIGS. 5 and 6, when the upper surface of the n-type GaN layer 92 is a Ga polar surface, the lower surface is a nitrogen polar surface. In this case, when the n-type electrode is formed on the upper surface of the n-type GaN layer and when it is formed on the lower surface, the chemical reactivity, electrical characteristics, and the like are different.

Actually, when an n-type GaN layer is heteroepitaxially grown on a sapphire substrate, a sapphire substrate having a (0001) plane orientation in the c-axis direction is often used. In addition, although the crystal structure of sapphire is rhombohedral, it is generally expressed in a hexagonal system. In this case, generally, the upper surface of the n-type GaN layer 92 in FIGS. 5 and 6 is a (0001) Ga polar surface, and the lower surface is a (000-1) N polar surface.

On the other hand, for the n-side electrodes described in Patent Documents 1 and 2, the upper surface (sapphire substrate) of the n-type GaN layer 92 formed on the sapphire substrate 91 as shown in FIG. The effectiveness was shown only for the surface opposite to 91: Ga polar surface). When the inventor examined this point, the lower surface (nitrogen polar surface) of the n-type GaN layer 92 as shown in FIG. 6 was used for the n-type layer described in Patent Document 1. It was confirmed that the electrode is not ohmic.

For this reason, it has been difficult to obtain an electrode having good characteristics on the surface on the epitaxial growth substrate side of the n-type group III nitride semiconductor layer formed on the epitaxial growth substrate. That is, in an actual semiconductor device, there is a case where a good ohmic junction cannot be obtained with respect to the n-type group III nitride semiconductor.

The present invention has been made in view of such problems, and an object thereof is to provide an invention that solves the above problems.

In order to solve the above problems, the present invention has the following configurations.
The electrode of the present invention includes titanium (Ti), nickel (Ni), and gold (Ti) laminated sequentially on the surface of the {10-1-1} plane group, which is a semipolar plane of the n-type group III nitride semiconductor layer. It is an electrode for ohmic contact with an n-type group III nitride semiconductor layer made of Au).
The electrode of the present invention is an n-type group III nitride semiconductor composed of titanium (Ti), nickel (Ni), and gold (Au), which is sequentially stacked on a hexagonal pyramid-shaped surface composed of an n-type group III nitride semiconductor layer. It is an electrode for ohmic contact with a layer.
The electrode manufacturing method of the present invention includes a step of forming a semipolar surface by etching a nitrogen polar surface of an n-type group III nitride semiconductor layer, and titanium (Ti) and nickel (Ni) on the surface of the semipolar surface. , And a method of manufacturing an electrode for ohmic contact with an n-type group III nitride semiconductor layer including a step of sequentially laminating gold (Au).
The electrode manufacturing method of the present invention includes a step of forming a hexagonal pyramid shape by etching a nitrogen polar surface of an n-type group III nitride semiconductor layer, and titanium (Ti), nickel (Ni), A method for producing an electrode for ohmic contact with an n-type group III nitride semiconductor layer including a step of sequentially laminating gold (Au).
The electrode manufacturing method of the present invention is characterized by etching using an etchant containing KOH or NaOH.

The electrode of the present invention can form a good ohmic junction with the n-type group III nitride semiconductor even on the surface on the growth substrate side.

It is process sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is a SEM photograph (a: Ga polar surface, b: N polar surface) of the GaN surface after anisotropic etching with respect to a polar surface. It is a SEM photograph of the shape after anisotropic etching of the surface in an example. Dependence of current-voltage characteristics on heat treatment temperature of Cr / Ni / Au electrodes formed on Ga polar face, N polar face and semipolar face ((a) As-depo state, (b) After heat treatment at 250 ° C. , (C) after heat treatment at 400 ° C.), and when the electrode is Ti / Ni / Au, the current-voltage characteristics depend on the heat treatment temperature ((d) As-depo. State, (e) heat treatment at 250 ° C. (F) After heat treatment at 400 ° C. It is a figure which simplifies and shows the manufacturing method of an example of the conventional light emitting element. It is a figure which simplifies and shows the manufacturing method of the other example of the conventional light emitting element.

Hereinafter, the electrode according to the embodiment of the present invention will be described. In this electrode, it is the semipolar plane that is in direct contact with the electrode in the n-type group III nitride semiconductor. This electrode can obtain a good ohmic contact particularly in the n-type group III nitride semiconductor on the lifted-off side.

Here, a polar (Polar) surface, a non-polar (None-polar) surface, and a semipolar (Semi-polar) surface will be briefly described. The nitride semiconductor single crystal has a wurtzite hexagonal structure, and a group III element surface and a nitrogen element surface are alternately stacked in the c-axis direction. Since the bond has some ionicity, spontaneous polarization occurs, and when strain is applied, piezo polarization is also added. Therefore, the polarization state is different between the (0001) group III plane and the (000-1) N plane. On the other hand, on the plane parallel to the c-axis, the elements exposed on the surface are in a ratio of 1: 1 for both the group III element and the nitrogen element, so that the polarization is canceled out and the so-called nonpolar plane has no apparent polarity. The m-plane {10-10} and the a-plane {11-20} correspond to it. A plane that forms an angle with respect to the c-axis (c-plane) is a semipolar plane, such as {11-22} plane, {20-21} plane, {10-1-3} plane, {10-1 The -1} plane corresponds to that. Note that the (0001) group III polar surface is expressed as a Ga polar surface for convenience, and even when expressed as a Ga polar surface, the surface is not limited to Ga, and may be a surface containing Al, In, or the like.

By forming this electrode on a semipolar surface, the ohmic characteristics can be improved as confirmed in Examples described later. The reason is considered as follows. Contact resistance is related to bending of the semiconductor band structure at the interface between the electrode and the semiconductor layer. This bending of the band structure is greatly related to the polarity of the semiconductor surface, and this state is different between the polar and semipolar planes, so good ohmic characteristics can be obtained in a metal configuration different from the electrodes used for the conventional polar plane. May be. Here, the best ohmic characteristics can be obtained by a combination of an electrode made of titanium (Ti), nickel (Ni), and gold (A), which will be described later, and this semipolar plane.

On the other hand, a group III nitride semiconductor is generally formed by heteroepitaxial growth on a substrate, and the growth surface cannot be freely selected from the viewpoint of obtaining good characteristics. Currently, in order to reduce the influence of polarization, the development of epitaxial technology on the nonpolar (10-10) plane (m-plane) and (20-21) semipolar plane is also progressing. There are problems with crystallinity and the like, and in general, the (0001) c-plane is used. Therefore, in the present embodiment, as described below, the growth surface itself is a polar surface so that good characteristics can be obtained in the growing group III nitride semiconductor, but the semipolar surface is forcibly exposed. By doing so, the electrode and the semipolar surface are brought into direct contact.

FIG. 1 is a process cross-sectional view showing a method for manufacturing this semiconductor device. In the semiconductor device 10, as in the example of FIG. 6, the n-type GaN layer 11 is formed on the sapphire substrate (growth substrate) 20 by heteroepitaxial growth, and the n-type GaN layer on the side where the sapphire substrate 20 is removed. 11 is forcibly made a semipolar surface by anisotropic etching, and an n-side electrode (electrode) 12 is formed in contact with the surface. The surface on which the n-side electrode 12 is formed is a semipolar surface, but this does not mean that this surface itself is a flat surface and this flat surface is a semipolar surface. This means that this surface is not a flat surface but is composed of fine irregularities, and the micro surface constituting the irregularities is a semipolar surface.

In FIG. 1A, metal chrome (Cr) having a thickness of, for example, about 20 nm is formed on the sapphire substrate 20 as a lift-off layer 21 by, for example, a sputtering method or a vacuum deposition method. As the sapphire substrate 20, in order to obtain a single crystal GaN on the sapphire substrate 20, a single crystal having a quasi-hexagonal c-plane as a main surface is particularly preferably used. The growth substrate and the lift-off layer are not limited to the above. For example, a substrate such as an AlN template may be used as the growth substrate.

Thereafter, as described in Japanese Patent Application Laid-Open No. 2009-54888, a nitriding treatment may be performed in this state, for example, at a high temperature of 1040 ° C. or higher in an ammonia atmosphere. Thereby, the vicinity of the surface of the lift-off layer 21 is nitrided to become a chromium nitride layer. The thickness of the chromium nitride layer can be set by adjusting the film thickness of the Cr film, the processing time, the temperature, and the like.

Thereafter, in FIG. 1B, as described in JP 2009-54888 A, an n-type GaN layer 11 and a p-type GaN layer 13 are sequentially formed on the lift-off layer 21 (growth step). Here, although the light emitting layer is omitted, layers such as a single quantum well and a multiquantum well structure are located between the n-type layer and the p-type layer. Further, the n-type and p-type layers are not limited to GaN, and may be Al _x In _y Ga _z N (x + y + z = 1) or the like. This film formation is performed by, for example, the MOCVD method or the MBE method. The n-type GaN layer 11 is doped with an impurity serving as a donor, and the p-type GaN layer 13 is doped with an impurity serving as an acceptor. As described in JP 2009-54888 A and the like, the n-type GaN layer 11 and the p-type GaN layer 13 with few crystal defects can be grown on the chromium nitride layer. Here, in general, on the c-plane of the sapphire substrate 20, it grows in the [0001] Ga orientation. That is, the surface (upper surface) of the n-type GaN layer 11 or the surface (upper surface) of the p-type GaN layer 12 grown thereon is a (0001) Ga polar surface. The side in contact with the growth substrate is a (000-1) N polar plane.

Next, as shown in FIG. 1C, the p-side electrode 14 is formed on the surface (upper surface) of the p-type GaN layer 13. A known p-side electrode 14 can be used. Thereafter, the p-side electrode 14 is patterned by photolithography using an etching method or the like. The p-side electrode may be patterned by a lift-off method.

Next, as shown in FIG. 1 (d), for example, a copper block 32 is connected to the entire upper surface via a cap metal 31 as a support structure after the next lift-off process. As the cap metal 31, for example, Ni / Au can be used. The support structure may be formed by a dry plating method, a wet plating method, or a bonding method with a bonding material between the support metal and the cap metal. Further, the material of the support structure portion may be a metal, an alloy, or a conductive semiconductor.

Thereafter, the lift-off layer 21 is removed by chemical treatment (lift-off process). By selective wet etching, only the lift-off layer 21 is selectively removed as shown in FIG. 1E without affecting the n-type GaN layer 11, the p-type layer 13, the support structure, and the like. Can do. This process is the same as the process known as chemical lift-off described in JP2009-54888A. By this step, the lower surface of the n-type GaN layer 11 is exposed. This surface is a nitrogen polarity surface opposite to the upper surface of the n-type GaN layer 11.

Next, anisotropic wet etching is performed on the laminated structure of the n-type GaN layer 11 and the p-type GaN layer 12 where this surface is exposed (surface etching step). Here, anisotropic wet etching is different from etching for the purpose of removing the lift-off layer and cleaning the surface, which etches the surface evenly. In the present invention, etching so that a semipolar surface appears with respect to a polar surface is called anisotropic etching. However, in the present invention, a surface whose surface can be formed by etching a polar surface is a semipolar surface, for example, a {10-1-1} surface group.

For this anisotropic wet etching, an alkaline etching solution, for example, a potassium hydroxide (KOH) solution, a sodium hydroxide (NaOH) solution, a mixed alkali solution containing both, or the like may be used. As the solvent, water (H ₂ O) or glycol can be used. At this time, etching occurs when OH- ions oxidize group III atoms (Ga, Al) of GaN or AlGaN. In particular, in the case of GaN, since three nitrogen atoms exist below the Ga atom on the Ga polar face side, the OH-ion cannot oxidize Ga. On the other hand, since only one nitrogen atom exists below the Ga atom on the nitrogen polar face side, OH- can oxidize the Ga atom. The lower surface (nitrogen polar surface) is selectively etched by anisotropic wet etching performed under appropriate conditions such as heating using a strong alkaline etching solution, and the surface reflects hexagonal crystals. Many hexagonal pyramidal projections having a hexagonal bottom surface are formed. For the above reasons, such anisotropic etching occurs on the nitrogen polar surface, and the Ga polar surface is hardly etched. In this etching, a hexagonal pyramid-like pit is observed on the Ga polar face when dislocations are present.

The electron microscope (SEM) photograph of the form after this etching is shown in FIG. 2 (a: Ga polar plane, b: N polar plane). As shown in FIG. 2A, the hexagonal pyramid shape has six {10-1-1} planes having a hexagonal bottom surface on the (000-1) plane and an angle of 62 ° with respect to the bottom surface. A group appears. Whether it is the (10-1-1) plane can be determined by determining the angle of the side surface with respect to the bottom surface from shape observation by SEM observation. For example, when the device cross section is observed in the [10-10] direction, the interface between the n-type GaN layer 11 and the n-side electrode (electrode) 12 is a saw having an angle of about 62 ° to the n-type GaN layer 11 side. It has a blade shape. As shown in FIG. 1 (f) and FIG. 2 (b), after the above etching, the surface shape is composed of unevenness composed of six {10-1-1} plane groups.

Since the effective surface area is composed of the {10-1-1} plane group of hexagonal pyramid-shaped semipolar planes compared to the flat (000-1) plane, it is about twice as large regardless of the size of the irregularities. Become. Thereby, the main electrode formed on the semipolar surface has an effect of reducing the contact resistance value because the effective contact area with the n-type electrode is increased even if the electrode dimensions in the planar direction are the same. Since the size of the unevenness can be controlled by the concentration, temperature, and time conditions of the etching solution, it should be a size that is suitable not only for reducing the above contact resistance value but also for improving the light extraction efficiency using Snell's law. Is preferred. For example, the height of the hexagonal pyramid shape is unevenness of 0.3 to 4.5 μm.

Next, as shown in FIG. 1G, an n-side electrode (electrode) 12 is formed on the lower surface (semipolar surface after anisotropic etching) of the n-type GaN layer 11 in this state, for example, Ti / Ni. / Au (structure in which Ti, Ni, and Au are laminated in this order) is formed (electrode formation step). This formation is preferably performed by, for example, a sputtering method or a vacuum evaporation method. The film forming method and patterning method are the same as those for the p-side electrode 14. Since the surface of the n-type GaN layer 11 is composed of the semipolar plane as described above, the ohmic property between the n-side electrode 12 and the n-type GaN layer 11 is good, and the contact resistance can be reduced. .

In general, the resistivity of the p-type GaN layer 13 is higher than the resistivity of the n-type GaN layer 11. For this reason, in the operation of the semiconductor device described above, the configuration in which the area of the p-side electrode 14 and the area of the n-side electrode 11 are reduced as shown in FIG. 1 reduces the influence of the electrode resistance. preferable. In this case, light emission is not taken out from the p-side electrode 14 side (reflected by the p-side electrode), and light emission is taken out from the small-area n-side electrode 12 side. It can be a diode (light emitting element). In such a case, the above configuration that can reduce the resistance on the n-side electrode 12 side having a small area is extremely effective.

In the manufacturing method shown in FIG. 1, a semiconductor layer composed of an n-type layer and a p-type layer is sequentially grown on a growth substrate, and then the growth substrate is removed. The reason for performing these steps is to take out the p-side electrode and the n-side electrode from different sides of the semiconductor layer after the stacked structure of the p-type layer and the n-type layer is formed. When this semiconductor device is a light emitting diode or a laser diode using this pn junction, the electrode resistance is lowered by such a configuration, and theoretically, the forward resistance is low and high luminous efficiency can be obtained. Such a configuration is not limited to a light-emitting diode or a laser diode, but is clearly effective for all semiconductor devices that operate with a current flowing in a direction perpendicular to the main surface of the semiconductor layer. The same applies to the case where another layer is formed between the n-type layer and the p-type layer. In reality, however, there is a problem that a good ohmic contact cannot be formed on the (000-1) N exposed surface of the n-type layer, but the exposed surface is forcibly removed by anisotropic etching {00-1-1. } The problem of ohmic contact was solved by converting it to the surface.

In addition, according to the above manufacturing method, since a large number of irregularities are formed on the surface where the n-side electrode 12 and the n-type GaN layer 11 are in contact with each other, the substantial contact area is increased. As a result, it is possible to reduce the contact resistance, and it is also obvious that the adhesion between them can be increased by the so-called anchor effect due to the so-called anchor effect.

Also, for example, Non-Patent Document 1; Schnitzer et al., Appl. Phys. Lett. 63 (1993) 2174.30% external quantum efficiency from surface textured, thin-film light-emitting diodes. As shown in FIG. 4, in the light emitting diode, the light extraction efficiency is higher when the light emitting surface is formed with unevenness. According to the above manufacturing method, the n-side electrode may be formed on a part of the uneven surface after forming the unevenness, the process is simple, and this effect can be obtained at the same time.

In the lift-off process described above, chemical lift-off is used, but other methods can be used as long as a similar structure can be formed. For example, laser lift-off can be used instead of chemical lift-off.

In the above example, the case where GaN is used as the group III nitride semiconductor has been described. However, the crystal structure related to polarity, particularly the configuration of the (000-1) N plane and the formation of the semipolar plane, The same applies to III nitride semiconductors such as AlGaN and AlInGaN. Therefore, it is clear that the above-described electrode and manufacturing method are similarly effective for these other III nitride semiconductors. In addition, it is preferable that the group III element which comprises the group III nitride of the surface which forms an electrode contains Ga, and Ga is contained 30% or more. In the above example, the surface on which the electrode is formed is uneven, and the micro surface forming the uneven surface is a semipolar surface. However, the entire surface on which the electrode is formed is a semipolar surface. It is clear that the above-mentioned electrode is effective as an ohmic electrode even when it is constituted by a plane (for example, when a GaN crystal is physically cut by a semipolar plane).

(Example)
In the following, an n-side electrode is formed on the three types of Ga polar face, nitrogen polar face, and hexagonal pyramid-shaped semipolar face by vacuum vapor deposition (the degree of vacuum during vapor deposition is 8 × 10 ⁻⁴ Pa or less). The results of examining the characteristics will be described.

Cr (thickness 20 nm) was formed on the sapphire substrate (C surface) by sputtering, and nitriding was performed at 1080 ° C. in an ammonia atmosphere. Here, the nitriding treatment is performed in order to improve the crystallinity of the upper n-type GaN layer and facilitate lift-off. Thereafter, n-type GaN (Si-doped carrier concentration: about 5 × 10 ¹⁸ cm ⁻³ , thickness 5 μm) was grown by MOCVD. Even when a surface etching step using a 6 mol / L KOH aqueous solution is performed on the surface of the grown n-type GaN layer, the surface is hardly etched and flatness is maintained. The surface was confirmed.

Then, after depositing Cu (thickness 150 μm) on the n-type GaN layer, a lift-off process for etching the CrN layer with a selective etching solution to separate the growth substrate and the epitaxial growth layer was performed. The exposed surface after the lift-off process is a nitrogen polar surface opposite to the above. When this surface was subjected to an etching treatment at 60 ° C. for 30 minutes using a 6 mol / L aqueous KOH solution, a surface shape as shown in FIG. 3 was obtained. When this form was observed with an SEM, the irregularities had a hexagonal pyramid shape, and the triangular surface of the hexagonal pyramid shape was at an angle of 62 ° with respect to the (000-1) bottom surface. -1-1} face group was confirmed.

Electrodes made of various materials are formed on the three types of Ga polar surface after growth, nitrogen polar surface before etching, and hexagonal pyramid-shaped semipolar surface formed as described above. The current-voltage characteristics of the contacts were examined by the (Transmission Line Model) method. In the TLM method, electrodes having a length of 400 μm and a width of 150 μm were formed at intervals of 20, 40, 80, and 160 μm. The current-voltage characteristics were measured by contacting prober needles with these electrode patterns. As is well known, in the TLM method, it is possible to calculate contact resistance and the like from the relationship between the resistance value obtained in this case and the electrode spacing. In order to avoid an error due to contact resistance between the prober needle and the electrode, a four-probe method was used.

As the electrode material, two types of Cr / Ni / Au and Ti / Ni / Au were used. The thickness of the deposited electrode is 0.05 μm for both Cr and Ti, 0.02 μm for Ni, and 1.2 μm for Au. Here, the former has a laminated structure in which Cr is on the side in direct contact with the semiconductor layer and Cr in the latter. Each sample was subjected to a heat treatment at 250 ° C. and 400 ° C. for 10 minutes in a nitrogen atmosphere after film formation (As Depo.) To evaluate the thermal stability of the ohmic characteristics. FIG. 4 shows the current-voltage characteristics when the electrode spacing is 80 μm. FIGS. 4 (a) to 4 (c) show the cases of Cr / Ni / Au, and after film formation (As Depo.), Respectively. Sample after heat treatment at 250 ° C. and 400 ° C. In the case of Cr / Ni / Au, As Depo. It can be seen that good linearity is exhibited between 400 ° C. and the contact resistance is sufficiently small. However, it exhibits rectifying properties with respect to the nitrogen polar surface, and the ohmic characteristics are deteriorated by heat treatment up to 400 ° C. It can be seen that the semipolar surface exhibits linearity in the state where no heat treatment is performed after film formation, but the contact resistance is larger than that of the Ga polar surface, and the ohmic characteristics are deteriorated by heat treatment at 250 ° C. and 400 ° C. Therefore, it is difficult to use Cr / Ni / Au for an electrode for ohmic contact with the n-type group III nitride semiconductor layer on the growth substrate side after the lift-off process.

On the other hand, in the case of Ti / Ni / Au, on the semipolar plane, as shown in FIG. 4 (d), good linearity is obtained without heat treatment after film formation, and good ohmic characteristics are exhibited. Even after heat treatment at 250 ° C., a certain degree of linearity is obtained as shown in FIG. In general, the heat-resistant temperature of a silicone-based resin-encapsulated package having a high heat-resistant temperature is about 150 ° C. Therefore, the element is rarely used at 150 ° C. or higher, and Ti / Ni / Au has no problem in practical use. Judged to be level. As shown in FIG. 4D to FIG. 4F, rectification is present on the Ga polar face and good ohmic characteristics cannot be obtained. In addition, although the resistance value is smaller on the N-polar surface than on the Ga-polar surface, the ohmic characteristics are inferior to that on the semipolar surface. Note that since the n-side electrode is formed at the final stage after lift-off, there is no necessity to apply heat to the element after the n-side electrode is formed. Therefore, for example, it is practically preferable to obtain ohmic characteristics in the range from As Depo to 250 ° C. In a metal configuration in which ohmic characteristics cannot be obtained unless heat treatment is performed at a higher temperature, for example, 400 ° C., the n-side electrode For example, problems such as diffusion at the p-side electrode and junction formed before, separation due to the difference in thermal expansion coefficient between Cu and group III nitride semiconductor used for the support, etc. occur. It is not suitable for manufacturing vertical LEDs.

Note that the As. When the contact resistance ρc at Depo was calculated, when Cr / Ni / Au was used (FIG. 4A), good ohmic contact with the Ga surface was obtained, and the contact resistance was 4 × 10 ^−4. It was Ω · cm ² . On the other hand, when Ti / Ni / Au (FIG. 4 (d)) is used, good ohmic contact is obtained only with respect to the semipolar plane, and the contact resistance is 2 × 10 ⁻⁴ Ω · cm ² . The contact resistance also showed a low value.

Thus, on the N-polar surface, it was not possible to obtain good ohmic characteristics with either electrode material (although the N-polar surface provides linearity in Ti / Ni / Au in the state after film formation, The resistance value is larger than that on the semipolar surface, and the ohmic characteristics are deteriorated by heat treatment at 250 ° C., which is not suitable for practical use.) On the other hand, on the semipolar surface, when Ti / Ni / Au is used, the smallest contact resistance value among them is obtained. Table 1 shows the contact resistance ρc for these series of samples. In addition, since linearity was not necessarily obtained by all the samples, it calculated from the resistance value in case a current value is 20 mA.

From this result, the unevenness constituted by the semipolar surface is formed by performing anisotropic etching on the nitrogen polar surface, and by forming the Ti / Ni / Au electrode on this, good ohmic contact is achieved. Electrode. Therefore, for example, in the semiconductor device having the structure shown in FIG. 1G, when the electrode 12 is made of Ti / Ni / Au, the contact resistance can be reduced, so that the forward drive voltage Vf is reduced. can do. Moreover, in the combination of a semipolar surface and this electrode, high heat resistance up to 250 ° C. can be obtained. In addition, since the entire surface of the nitrogen polar surface is made uneven and an electrode is formed on a part thereof, the roughening process for increasing the extraction efficiency can be simplified.

From the above, it was found that the structure of the Ti / Ni / Au electrode of the present application is suitable for an electrode for ohmic contact with the n-type group III nitride semiconductor layer on the growth substrate side after the lift-off process.

In the above embodiment has been used GaN, similar results by using a Ti / Ni / Au electrode as _Al 0.7 _{Ga 0.3} N doped with Si was obtained. Thus, even if Al is used as a group III, B, In, or other n-type dopants are used, it is possible to use a Ti / Ni / Au electrode on the semipolar plane.

11, 92 n-type GaN layer (n-type group III nitride semiconductor layer)
12, 94 n-side electrode (electrode)
13 p-type GaN layer (p-type group III nitride semiconductor layer)
14, 44, 95 p-side electrode 20 Sapphire substrate (growth substrate)
21, 96 Lift-off layers 31, 45 Cap metal 32, 46 Copper block 41 Groove 42 First n-side electrode (electrode)
43 Insulating layer 47 Contact hole 48 n-side second electrode (electrode)

Claims (5)

1. n-type made of titanium (Ti), nickel (Ni), and gold (Au) sequentially laminated on the surface of the {10-1-1} plane group which is a semipolar plane of the n-type group III nitride semiconductor layer An electrode for ohmic contact with a group III nitride semiconductor layer.
2. For ohmic contact with an n-type group III nitride semiconductor layer made of titanium (Ti), nickel (Ni), and gold (Au) sequentially stacked on a hexagonal pyramid-shaped surface made of an n-type group III nitride semiconductor layer Electrodes.
3. A step of forming a semipolar surface by etching the nitrogen polar surface of the n-type group III nitride semiconductor layer, and titanium (Ti), nickel (Ni), and gold (Au) are sequentially formed on the surface of the semipolar surface. The manufacturing method of the electrode for ohmic contacts with the n-type group III nitride semiconductor layer including the process to laminate | stack.
4. A step of forming a hexagonal pyramid shape by etching the nitrogen polar face of the n-type group III nitride semiconductor layer, and sequentially stacking titanium (Ti), nickel (Ni), and gold (Au) on the hexagonal pyramid shaped surface The manufacturing method of the electrode for ohmic contacts with the n-type group III nitride semiconductor layer including the process to carry out.
5. The method for producing an electrode for ohmic contact with a group III nitride semiconductor layer according to claim 3 or 4, wherein the etching uses an etching solution containing KOH or NaOH.

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