JP2015166990A - Ic chip, command execution method and program for ic chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an IC chip, a command execution method and a program for an IC chip, capable of further reducing processing time required from receiving a command to responding thereto.SOLUTION: When a command is received through a specific IF, write-processing to a NVM 13d is not executed while processing the command, but instead, is executed thereafter when a command is received through an IF other than the specific IF.

Description

  The present invention relates to an IC chip, and more particularly to a technique for writing data in a nonvolatile memory included in the IC chip.

  In recent years, settlement services using non-contact communication using mobile terminals have been provided. At the time of payment, the mobile terminal is deceived as a payment terminal, so that the mobile terminal and the payment terminal transmit / receive a command (command data) and a response (response data) and perform processing necessary for payment. Such a portable terminal incorporates an IC chip (IC module) called a secure element such as a SIM (Subscriber Identity Module) card. The secure element has two interfaces (IF). Each interface is used for contact communication with a controller mounted on a portable terminal (for example, based on ISO / IEC7816 standard) and non-contact communication with an external terminal (for example, based on ISO / IEC 14443 standard). used. The secure element executes processing according to a command received from the controller of the external terminal or the mobile terminal via each interface, and responds with the result as a response.

  In the payment service described above, the secure element executes processing according to the received command, and the processing time occupies much of the time required for the entire transaction. The processing within the secure element includes cryptographic calculation processing and writing processing to the nonvolatile memory. In the non-contact payment service, it is required to shorten the processing time from the reception of a command to the response, so that there is a problem that the cryptographic calculation processing and the writing processing to the nonvolatile memory become a bottleneck. As a technique for shortening the writing process to the nonvolatile memory, a technique for caching the writing process to the nonvolatile memory is known (see, for example, Patent Document 1 and Patent Document 2). In this technique, the processing time is shortened by reducing the number of times of writing to the nonvolatile memory by combining a plurality of data to be written into one.

JP 2001-147855 A JP 2007-034344 A

  However, there is a limit to the method of reducing the number of times of writing to the nonvolatile memory as in the prior art, and further reduction of the processing time is desired.

  Therefore, the present invention has been made in view of such a point, and an IC chip, a command execution method, and an IC chip that can further reduce the processing time from reception of a command to a response. It is an object to provide a program for use.

  In order to solve the above-described problem, an invention according to claim 1 is an IC chip including a plurality of interfaces for performing communication with the outside, a cache memory, and a nonvolatile memory, wherein the cache A command for executing at least a process of updating data in a predetermined area in the memory and writing the data in the predetermined area including the updated data to the nonvolatile memory, wherein any one of the interfaces from the outside Receiving means for receiving the command via the interface, determining means for determining whether or not the interface from which the command is received is a specific interface, and a predetermined area in the cache memory according to the received command Updating means for updating the data, and the determination means If it is determined that the interface is not the specific interface, the update is not performed while the data in the predetermined area including the data updated by the update unit is not written to the nonvolatile memory. And writing means for writing the data in the predetermined area including the data updated by the means into the non-volatile memory.

  According to a second aspect of the present invention, in the IC chip according to the first aspect, when the writing unit determines that the specific interface is the specific interface when the command is received, the update is performed. The data in the predetermined area including the first data updated by the means is not written to the nonvolatile memory, and then, when the next command is received, it is determined that the specific interface is not the specific interface. In this case, the second data updated by the updating unit and the data in the predetermined area including the first data are written in the nonvolatile memory.

  According to a third aspect of the present invention, in the IC chip according to the first or second aspect, the determination unit determines whether or not the plurality of interfaces are set for use, and the use is set. Only when it is determined, it is determined whether or not the interface is the specific interface.

  According to a fourth aspect of the present invention, a computer in an IC chip including a plurality of interfaces for communicating with the outside, a cache memory, and a nonvolatile memory is updated, and data in a predetermined area in the cache memory is updated. And a command for executing at least a process of writing the data in the predetermined area including the updated data to the nonvolatile memory, and receiving the command from the outside via any of the interfaces Receiving means; determining means for determining whether or not the interface from which the command is received is a specific interface; and updating means for updating data in a predetermined area in the cache memory in accordance with the received command The specific interface is determined by the determination means. If the determination means determines that the data is not in the specific interface, the update means updates the data in the predetermined area including the data updated by the update means. The data of the predetermined area including the processed data is made to function as a writing means for writing to the nonvolatile memory.

  The invention according to claim 5 is a command execution method in an IC chip comprising a plurality of interfaces for performing communication with the outside, a cache memory, and a nonvolatile memory, and a predetermined area in the cache memory Is a command for executing at least a process of updating the data of the predetermined area and writing the data of the predetermined area including the updated data to the nonvolatile memory, and the command from the outside via any of the interfaces Receiving a command; determining whether an interface from which the command is received is a specific interface; and updating data in a predetermined area in the cache memory according to the received command. And determine that it is the specific interface If it is determined that the data is not in the specific interface, the data in the predetermined area including the updated data is not written to the nonvolatile memory. And writing to the non-volatile memory.

  According to the present invention, it is possible to further reduce the processing time required from the reception of a command to the response.

1 is a diagram illustrating a schematic configuration example of an IC card 1. FIG. (A) is a block diagram showing a hardware configuration example of SE13, and (B) is a block diagram showing a functional configuration example of SE13. FIG. 3 is a flowchart illustrating an example of command processing when the SE 13 receives a command.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiment described below is an embodiment when the present invention is applied to a mobile terminal.

  First, with reference to FIG. 1, the configuration and functional overview of the mobile terminal according to the present embodiment will be described. FIG. 1 is a block diagram illustrating a schematic configuration example of a mobile terminal according to the present embodiment. As shown in FIG. 1, the mobile terminal T includes a controller 11 responsible for the function of the mobile terminal T, a CLF (Contact Less Front-end) 12, an SE (Secure Element) 13, a battery 14, and the like. Note that, for example, a mobile phone or a smartphone including an operation key, a display, a speaker, and a mobile communication unit can be applied to the mobile terminal T. SE13 is an example of the IC chip of the present invention. The SE 13 may be configured by being directly incorporated on the circuit board of the portable terminal T. The battery 14 supplies power to the controller 11 and the like.

  Although not shown, the controller 11 is a CPU (Central Processing Unit), a non-volatile memory (such as a flash memory) that stores various programs and data, a RAM that temporarily stores data, and an I that serves as an interface with the SE 13. / O port etc. The controller 11 communicates with the SE 13 via the I / O port. And the controller 11 performs various processes according to the communication (communication performed via a mobile communication network or the internet) process of the portable terminal T, or the operation instruction from the user of the portable terminal T via the operation key. In such processing, the controller 11 transmits a command related to, for example, encryption processing or authentication processing to the SE 13 via the I / O port.

  The CLF 12 is an LSI module for non-contact communication (near field communication) defined by the NFC (Near Field Communication) standard, and an I / O port (SWIO) that performs an interface with the SE 13 and non-contact Are connected to an antenna 12a for transmitting / receiving various signals to / from the non-contact reader / writer R / W. When the user places the portable terminal T over the contactless reader / writer R / W, the command received from the contactless reader / writer R / W via the antenna 12a is transmitted to the SE 13 via the I / O port.

  The SE 13 is a UIM (User Identity Module) whose functions are expanded based on, for example, a SIM (Subscriber Identity Module). FIG. 2A is a block diagram illustrating a hardware configuration example of SE13, and FIG. 2B is a block diagram illustrating a functional configuration example of SE13. As shown in FIG. 2A, the SE 13 communicates with the CPU 13a, ROM (Read Only Memory) 13b, RAM (Random Access Memory) 13c, NVM (Nonvolatile Memory) 13d, and the outside (outside of the SE 13). Are provided with a plurality of IFs (interfaces) 1 to IFn. The SE 13 communicates with the controller 11 via, for example, IF1. The SE 13 communicates with the CLF 12 via, for example, IF2. For example, SWP (Single Wire Protocol) is applied as a communication protocol between the CLF 12 and the SE 13. Although not shown, the SE 13 has eight terminals C1 to C8 defined by, for example, ISO / IEC7816. Among these, for example, the C7 terminal is a terminal that bears IF1 with the controller 11, and the C6 terminal is a terminal that bears IF2 with the CLF12. The number of IFs is not particularly limited, and the present invention can also be applied when three or more IFs are provided.

  The RAM 13c is a cache memory for caching a write process to the NVM 13d. As shown in FIG. 2B, the RAM 13c is provided with a cache data holding area 105 (an example of a predetermined area) for temporarily holding data. The NVM 13d is a flash memory or a nonvolatile memory such as “Electrically Erasable Programmable Read-Only Memory”. As shown in FIG. 2B, the NVM 13d is provided with an update target data holding area 106 (an area corresponding to the cache data holding area 105) for holding the data in the cache data holding area 105. The ROM or NVM 13d stores the OS, the IC chip program of the present invention, and the application program. The application program includes, for example, a payment processing application program. By executing the application program for payment processing, for example, encryption processing, authentication processing, balance update processing, and the like are performed. The update target data holding area 106 is input with the update target data for the application program used in these processes (for example, a flag indicating whether or not the settlement process is started, and a pin (password) from the controller 11. Or a flag indicating whether or not).

  As shown in FIG. 2B, the CPU 13a executes the IC chip program and the like of the present invention, and as shown in FIG. 2B, the IF determination unit 101, the command processing unit 102, the cache memory update unit 103, and the nonvolatile memory update unit 104 And so on. Here, the IF determination unit 101 is an example of a determination unit in the present invention. The command processing unit 102 is an example of a receiving unit in the present invention. The cache memory update unit 103 is an example of update means in the present invention. The non-volatile memory update unit 104 is an example of a writing unit in the present invention.

  When the IF determination unit 101 receives a command (for example, APDU (Application Protocol Data Unit)) from the outside (for example, the controller 11 or the CLF 12) via any IF, the IF received the command. Is a specific IF (for example, IF for contactless communication that prioritizes performance). This command is a command for updating at least the data (update target data) of the cache data holding area 105 in the RAM 13c and writing the data of the cache data holding area 105 including the updated data to the NVM 13d. is there. In this embodiment, the IF 2 for performing communication with the CLF 12 is set in advance, for example, in the program or in the NVM 13d as a specific IF. Note that which IF is set as a specific IF is arbitrary, and can be appropriately changed depending on, for example, the form of service.

  The command processing unit 102 executes command processing according to the received command, and returns the result as a response to the outside. The cache memory update unit 103 updates the data in the cache data holding area 105 in the RAM 13c in accordance with the received command regardless of whether the IF determination unit 101 determines that the specific IF is specified. The nonvolatile memory update unit 104 does not write the data in the cache data holding area 105 including the data updated by the cache memory update unit 103 to the NVM 13d when the IF determination unit 101 determines that it is a specific IF (reflection). On the other hand, if it is determined by the IF determination unit 101 that the IF is not a specific IF, the non-volatile memory update unit 104 sets the “data in the cache data holding area 105” including the data updated by the cache memory update unit 103 to the NVM 13d. Are written in the update target data holding area 106 in FIG. In other words, the CPU 13a does not execute the writing process to the NVM 13d when the command is received via the specific IF during the command processing, and then receives the command via the IF other than the specific IF. Run when. As a result, it is possible to shorten the processing time required from the reception of the command to the response.

  Next, command processing when the SE 13 receives a command will be described with reference to FIG. FIG. 3 is a flowchart illustrating an example of command processing when the SE 13 receives a command. The command processing shown in FIG. 3 is started when a command is received from the outside via the IF.

  When the command processing shown in FIG. 3 is started, the CPU 13a determines whether or not the data in the cache data holding area 105 in the RAM 13c has been initialized (cache data has been initialized) (step S1). If it is determined that the data in the cache data holding area 105 has not been initialized (for example, 0000...) (Step S1: NO), the process proceeds to step S2. On the other hand, if it is determined that the data in the cache data holding area 105 has been initialized (step S1: YES), the process proceeds to step S3.

  In step S2, the CPU 13a stores (copies) the update target data (for example, the flag described above) stored in the update target data storage area 106 in the cache data storage area 105, and proceeds to step S3.

  In step S3, the command processing unit 102 of the CPU 13a performs command processing. In this command processing, the cache memory update unit 103 of the CPU 13a updates the update target data held in the cache data holding area 105 (cache data update) in accordance with the received command. The update target data is, for example, data A (an example of first data) shown in FIG.

  Next, the IF determination unit 101 of the CPU 13a determines whether or not a plurality of IFs are set for use (a plurality of IFs are being set for use) (step S4). When it is determined that a plurality of IFs are set to be used (step S4: YES), the process proceeds to step S5. On the other hand, when it is determined that a plurality of IFs are not set to be used (step S4: NO), the process proceeds to step S6. That is, when only a single IF is set to be used among a plurality of IFs, the process of step S5 is skipped. Although it may be configured not to perform the determination of step S4 (that is, the determination of step S5 is always performed when a command is received), the use of a plurality of IFs is set by performing the determination of step S4. Only when it is determined that the image is determined, the determination in step S5 can be performed. Therefore, it is possible to shorten the command processing time when only a single IF is set to be used.

  In step S5, the IF determination unit 101 of the CPU 13a determines whether the IF from which the command is received is a specific IF (for example, an IF for non-contact communication). If it is determined that the IF is a specific IF (step S5: YES), the nonvolatile memory update unit 104 does not write the update target data updated in the cache data holding area 105 in step S3 to the NVM 13d, and the command processing unit 102 Responds to the outside via the IF from which the command is received using the result of the command processing as a response (step S7), and ends the command processing. On the other hand, if it is determined that the IF is not a specific IF (step S5: NO), the nonvolatile memory update unit 104 updates the update target data updated in the cache data holding area 105 in step S3 to the update target data holding area 106 in the NVM 13d. The command processing unit 102 returns the command processing result as a response to the outside via the IF from which the command is received (step S7), and ends the command processing.

  Thereafter, when command processing is started by receiving the next command, the cache memory update unit 103 uses, for example, data B (an example of second data) as update target data in the cache data holding area 105. ), And it is determined in step S5 that it is not a specific IF. In this case, the non-volatile memory update unit 104 includes “data in the cache data holding area 105” including the update target data (data B) updated by the cache memory update unit 103 and the data A that has not been written in the previous command processing. Is written in the update target data holding area 106.

  As described above, according to the above-described embodiment, the write process to the NVM 13d when a command is received via a specific IF is not executed during the command process, and after that, other than the specific IF Since the processing is executed when a command is received via the IF, the processing time required from the reception of the command to the response can be further reduced. As a result, processing such as contactless payment can be completed in a shorter time. For example, it is possible to speed up the ticket gate processing in transportation to smooth the entrance and exit of the ticket gate, In this case, it is possible to improve the convenience by eliminating the waiting for payment processing.

11 Controller 12 CLF
13 SE
14 Battery 13a CPU
13b ROM
13c RAM
13d NVM
DESCRIPTION OF SYMBOLS 101 IF determination part 102 Command processing part 103 Cache memory update part 104 Non-volatile memory update part 105 Cache data holding area 106 Update object data holding area T Portable terminal

Claims (5)

An IC chip comprising a plurality of interfaces for communicating with the outside, a cache memory, and a nonvolatile memory,
A command for executing at least a process of updating data in a predetermined area in the cache memory and writing the data in the predetermined area including the updated data into the nonvolatile memory. Receiving means for receiving the command via the interface;
Determining means for determining whether the interface from which the command is received is a specific interface;
Updating means for updating data in a predetermined area in the cache memory in response to the received command;
When the determination unit determines that the interface is the specific interface, the data of the predetermined area including the data updated by the update unit is not written to the nonvolatile memory, but the determination unit does not write the specific interface. If determined, writing means for writing data in the predetermined area including data updated by the updating means to the nonvolatile memory;
An IC chip comprising:   When the determination unit determines that the specific interface is the specific interface when the command is received, the writing unit stores the data in the predetermined area including the first data updated by the update unit in a nonvolatile manner The second data and the first data updated by the update unit when the determination unit determines that the interface is not the specific interface when the next command is received after not writing to the memory. The IC chip according to claim 1, wherein data in the predetermined area including the data is written in the nonvolatile memory.   The determination means determines whether or not the plurality of interfaces are set to be used, and determines whether or not the specific interface is set only when it is determined that the settings are set to be used. The IC chip according to claim 1 or 2. A computer in an IC chip including a plurality of interfaces for communicating with the outside, a cache memory, and a nonvolatile memory,
A command for executing at least a process of updating data in a predetermined area in the cache memory and writing the data in the predetermined area including the updated data into the nonvolatile memory. Receiving means for receiving the command via the interface;
Determining means for determining whether the interface from which the command is received is a specific interface;
Updating means for updating data in a predetermined area in the cache memory in response to the received command;
When the determination unit determines that the interface is the specific interface, the data of the predetermined area including the data updated by the update unit is not written to the nonvolatile memory, but the determination unit does not write the specific interface. An IC chip program that, when determined, causes the data in the predetermined area including the data updated by the updating means to function as a writing means for writing to the nonvolatile memory. A command execution method in an IC chip comprising a plurality of interfaces for communicating with the outside, a cache memory, and a nonvolatile memory,
A command for executing at least a process of updating data in a predetermined area in the cache memory and writing the data in the predetermined area including the updated data into the nonvolatile memory. Receiving the command via the interface;
Determining whether the interface from which the command was received is a specific interface;
Updating data in a predetermined area in the cache memory in response to the received command;
If it is determined that the interface is the specific interface, the data in the predetermined area including the updated data is not written to the nonvolatile memory. On the other hand, if it is determined that the interface is not the specific interface, the updated data is stored. Including writing the predetermined area of data into the nonvolatile memory;
A command execution method comprising:

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