JP5799754B2 - IC chip, processing method in IC chip, IC chip processing program, IC card, and portable terminal - Google Patents

Description

  The present invention relates to a technical field such as an apparatus and a method for managing data.

  In an IC card on which an IC chip is mounted, a so-called issuing process is performed in which writing of personal information of an IC card user and writing of applications and information necessary for processing in a predetermined mode are performed.

  The issuance process is performed under the control of the issuance process program after storing (loading) the issuance process program for executing the IC chip inspection and issuance process in the IC card manufacturing stage (before the IC card is shipped). Individual data (such as the above-mentioned personal information) is received via an interface compliant with ISO7816, and for example, writing into a nonvolatile memory of an IC chip is performed. Thereafter, after all the issuing processes are completed, the issuing process program is disabled and the issuing process is completed.

  Currently, in addition to an interface compliant with ISO7816, an IC card having an interface (I / F) called SWP (Single Wired Protocol) formulated by ETSI TS 102.613 is used.

  Conventionally, in an IC chip having two or more interfaces, there is no clear agreement or policy regarding which interface to use in issuing processing. Under such circumstances, the conventional IC chip performs issue processing based on commands and data transmitted / received via an interface compliant with ISO7816.

  The SWP interface described above has a higher data transfer rate than an interface compliant with ISO7816. Therefore, from the viewpoint of the efficiency of the issuance process, the SWP interface can be used in the issuance process that needs to transmit a large amount of data to the IC card.

  However, since the interface used in the issuance process (including inspection and manufacturing process) in the conventional IC chip is an interface compliant with ISO7816, from the viewpoint of the efficiency of the issuance process described above, ISO7816 is used in the issuance process. It is desirable to use both an interface compliant with the SWP interface and an SWP interface.

  In addition, the issue processing program for executing the issue processing should be used only in the manufacturing stage, and it is desirable for security to operate after shipment (for example, when the IC chip reaches the user's hand). Absent. Therefore, after the IC chip is shipped, it is required to prohibit (disable) the issue processing program.

  Therefore, after completion of the issuance process, it is necessary not to execute the issuance process using any interface (for example, an interface conforming to ISO 7816 and the SWP interface) (in other words, from any interface). It is necessary to disable the issue processing program).

  However, in the IC chip manufacturing stage, the issue processing program is disabled immediately before the product is completed (for example, shipment of the IC chip) so that the issue processing can be performed again due to troubles (eg, momentary interruption). It is desirable that

  At this time, a case is considered in which an issue processing program using an interface compliant with ISO7816 and an issue processing program using an SWP interface are made unusable separately.

  For example, immediately after completion of an issue process using an interface (for example, either an interface conforming to ISO7816 or an issue process using an SWP interface), the issue process program using that interface is disabled. If a problem occurs during execution of the issuance process using the other interface and it becomes necessary to execute an issuance process program that has been disabled, the issuance process program can no longer be used. It will not be possible.

  In other words, if the issuance processing program using the interface conforming to ISO7816 and the SWP interface are disabled separately, depending on the manufacturing process, for example, if the issuance processing program using the interface conforming to ISO7816 is disabled first, There is a problem that reissuing becomes difficult and reissuing becomes impossible even though the issuance processing program using the SWP interface can be used.

  Further, if the issuance processing programs using the two types of interfaces are stopped (unusable) separately, the time required for processing increases accordingly. At the manufacturing stage of the IC chip, it is necessary to shorten the time required for the issuing process as much as possible, and it is required that the transmission / reception of commands and the like is as little as possible.

  Therefore, the present invention has been made in view of such problems and the like, and an IC chip that can execute a issuing process using a plurality of interfaces at high speed and efficiently, a processing method in an IC chip, and an IC An object is to provide a chip processing program and an IC card.

In order to solve the above problems, according to claim 1 invention, the first interface conforming to the first communication standard, and the second issue by using a second interface conforming to the communication standard process The issue processing means to perform, the completion detection means for detecting completion of the issue process, and the completion detection means detect completion of the issue process using the first interface and the issue process using the second interface. In this case, an issue process stop means for stopping subsequent issue processes in order from a predetermined issue process is provided.

  According to the present invention, the issuing process using a plurality of interfaces can be executed at high speed and efficiently, and the deterioration of the product yield can be avoided.

  The invention according to claim 2 is the IC chip according to claim 1, wherein the completion detecting unit receives the first interface when receiving one completion command indicating completion of the issuing process. It is detected that the issuing process using and the issuing process using the second interface are completed.

  The invention described in claim 3 is the IC chip according to claim 2, wherein the predetermined issuing process is an issuing process using an interface other than the interface that has received the completion command. And

  According to a fourth aspect of the invention, there is provided the IC chip according to the first or second aspect, wherein the predetermined issue process is an issue process executed previously.

  The invention according to claim 5 is the IC chip according to any one of claims 1 to 4, wherein the first interface based on the first communication standard is an interface based on ISO7816. The second communication standard is SWIO (Single Wired Protocol Input / Output) compliant with ETSI TS102.613.

  The invention according to claim 6 is characterized in that the IC chip according to any one of claims 1 to 5 is mounted.

The invention described in claim 7 is a portable terminal including the IC card according to claim 6.
The invention of claim 8 includes a first interface, and issue processing step of utilizing a second interface for issuing processing conforming to a second communication standard that complies with the first communication standard, A completion detection step for detecting completion of the issuance process; and a completion detection step for detecting completion of the issuance process using the first interface and the issuance process using the second interface. And an issuance process stop step for stopping subsequent issuance processes in order from the issuance process.

Further, an invention according to claim 9, a computer included in an IC chip, using the first interface, and a second interface conforming to a second communication standard that complies with the first communication standard published Issuing processing means for performing processing, completion detecting means for detecting completion of the issuing processing, and completion detecting means detect completion of issuing processing using the first interface and issuing processing using the second interface. In this case, in order from the predetermined issuing process, the issuing function is functioned as issuing process stop means for stopping the subsequent issuing process.

  According to the present invention, issuing processing using a plurality of interfaces can be executed quickly and efficiently.

It is a block diagram which shows the example of a schematic structure of the portable terminal which concerns on this embodiment. It is a block diagram which shows the example of a schematic structure of UIM13 which concerns on this embodiment. It is a conceptual diagram which shows the process of the module structure of the issue process program of this application. It is a conceptual diagram which shows the concept from which the command received through the SWP interface takes out command APDU via a some protocol layer. It is a conceptual diagram which shows a Pipe ID list. 12 is a flowchart showing the operation of the CPU 131 when the issue process executed first is an issue process using the ISO7816 interface. It is a flowchart which shows operation | movement of CPU131 when the issue process performed previously is an issue process using a SWP interface. It is a flowchart which shows operation | movement of CPU131 in the case of determining the order which an issuing process program stops according to the kind of interface which received the command.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiment described below is an embodiment when the present invention is applied to a mobile terminal.

  First, with reference to FIG. 1, the configuration and functional overview of the mobile terminal according to the present embodiment will be described.

  FIG. 1 is a block diagram illustrating a schematic configuration example of a mobile terminal according to the present embodiment.

  As shown in FIG. 1, the mobile terminal 1 includes a controller 11 that performs the functions of the mobile terminal 1, a CLF 12, and a UIM 13 (an example of an IC chip of the present application) on which a program for executing issue processing and predetermined operations is mounted. It is prepared for. As the mobile terminal 1, for example, a mobile phone, a PDA, a smartphone, or the like provided with operation keys, a display, a speaker, a mobile communication unit, and the like can be applied.

Although not shown, the controller 11 is a CPU (Central Processing Unit), a nonvolatile memory (such as a flash memory) that stores various programs and data, a RAM that temporarily stores data, and an I / O that serves as an interface with the UIM 13. It has a port. The controller 11 can communicate with the UIM 13 through, for example, an interface conforming to ISO 7816 (an example of a first interface conforming to the first communication standard of the present application; hereinafter referred to as “ISO 7816 interface”). ing. And the controller 11 performs various processes according to the communication (communication performed via a mobile communication network and the internet) process of the portable terminal 1, and the operation instruction from the user of the portable terminal 1 via the operation key. In such processing, for example, the controller 11 transmits a command signal related to a request for issuing processing, which will be described in detail later, to the UIM 13 through the interface.

  The CLF 12 is a non-contact type IC chip that performs non-contact communication defined by NFC (Near Field Communication) standards. Although not shown, the CLF 12 stores a CPU, a non-volatile memory that stores various programs and data, and temporarily stores data. A RAM, an I / O port (SWIO) that performs an interface with the UIM 13, and the like are provided. The CLF 12 is connected to an antenna 12a for transmitting and receiving various signals to and from a non-contact reader (not shown) in a non-contact field. Then, for example, when the user places the mobile terminal 1 on a non-contact reader, a command signal transmitted from the non-contact reader and related to a request for an issuance process, which will be described in detail later, is created by the ETSI TS 102.613. It is transmitted to the UIM 13 through an interface compliant with (Single Wired Protocol) (an example of a second interface compliant with the second communication standard of the present application, hereinafter referred to as “SWP interface”).

The UIM 13 is one of UICCs (Universal Integrated Circuit Cards), and is equipped with a contact IC chip whose functions are expanded based on a conventional SIM (Subscriber Identity Module).

  FIG. 2 is a block diagram illustrating a schematic configuration example of the UIM 13 according to the present embodiment.

  As shown in FIG. 2, the UIM 13 includes a central processing unit (CPU) 131 that handles signal processing, a read only memory (ROM) 132 that stores predetermined data and programs (for example, the CPU 131 centralizes the IC chip 1). RAM (Random Access Memory) 133 for temporarily storing data (for use as a work area for control, etc.), non-volatile memory for storing predetermined data, programs, etc. (for example, flash memory or EEPROM (registered trademark)) 134, an I / O port (input / output port) 135, and the like. The UIM 13 is provided on the IC card base 7 and is mounted on the portable terminal 1 as an IC card 8 (an example of the IC card of the present application).

  As shown in FIG. 2, the I / O port 135 has eight terminals C1 to C8 (contact terminals of a contact type IC chip) defined by ISO / IEC7816 or the like. Here, the C1 terminal is a power supply terminal (VCC), and the C5 terminal is a ground terminal (GND). The C2 terminal is a reset terminal (RST), and is used for inputting a reset signal of the ISO 7816 interface with the controller 11. The C3 terminal is a clock terminal (CLK) and is used to input a clock of the ISO7816 interface with the controller 11. The C7 terminal is a terminal that bears the ISO 7816 interface with the controller 11 and is used for communication between the UIM 13 and the controller 11. The C6 terminal is a terminal that bears the SWP interface with the CLF 11 and is used for communication between the UIM 13 and the CLF 13. Note that SWP is applied to the communication protocol between the CLF 12 and the UIM 13 as described above.

  The non-volatile memory 134 is a PROM (Programmable Rom) that can erase data stored in the storage area and re-store it any number of times. In the nonvolatile memory 134, for example, each area is assigned an address (function address), and is divided into one or a plurality of pages with a predetermined area as one page. For example, the CPU 131 can identify what data or program is stored in which area of the nonvolatile memory 134 under the control of the card OS or application.

  The programs stored in the ROM 132 include a card OS (operating system), an issue processing program for causing the CPU 131 to execute issue processing, and the data protection program of the present invention. Note that the issuance processing program and data protection program of the present invention may be incorporated as a function of the card OS or application program. These programs may be stored in the nonvolatile memory 134.

  Furthermore, the issuance processing program of the present application causes the CPU 131 to execute and complete the issuance processing based on the issuance processing request command received through the ISO 7816 interface or the SWP interface. In other words, the issue processing is executed by the CPU 131 based on a command corresponding to an interface compliant with ISO7816 and a command corresponding to an interface compliant with SWP formulated by ETSI TS 102.613 with one issue processing program. And it is supposed to be completed. That is, the issue processing program of the present application is combined with a command system that is received through the ISO 7816 interface or the SWP interface.

  Here, with reference to FIG. 3, the module configuration processing of the issuance processing program of the present application will be described.

  FIG. 3 is a conceptual diagram showing the module configuration processing of the issuance processing program of the present application.

  As shown in FIG. 3, the module processing of the issue processing program of the present application is performed by extracting a command APDU from data (command) received by a module of each interface (for example, by the operation of the CPU 131 or the like), and issuing the issue processing program. Send a command to Since the command APDU includes an issue processing program start instruction, when the command APDU is received, the issue processing program is started and the issue processing is executed.

  Here, for the command APDU received through the ISO interface, the command APDU is taken out as it is.

  On the other hand, for a command received through the SWP interface, a command APDU is extracted through a plurality of protocol layers.

  Here, with reference to FIG. 4, the concept that a command received through the SWP interface is taken out via a plurality of protocol layers will be described. Since this concept is a known technique, a more detailed description is omitted.

  FIG. 4 is a conceptual diagram showing a concept that a command received through the SWP interface is taken out through a plurality of protocol layers.

  When the command received through the SWP interface is input to the MAC layer, the frame payload is extracted, the information field is extracted from the SHDL layer, and after being divided, the HCI layer is connected together with the Pipe ID, and from there, the HCI DATA is extracted in the layer, and finally becomes a command APDU in the APDU layer.

  Here, the ID for the issuance process command is assigned to the Pipe ID, and for example, the SWP protocol management program throws a command (such as an activation command) to the issuance process program. That is, in the SWP interface, the program (function) to be activated is switched by changing the ID (Pipe ID). Specifically, as shown in FIG. 5, in the SWP interface, a Pipe ID and a program for executing a predetermined service or function are stored in association with each other. The program is executed by specifying the Pipe ID.

  In FIG. 5, the non-volatile memory 134 in which the Pipe ID is stored as Card Emulation, Reader / Writer mode, and an issue command (issue process program) as programs for realizing various services (the above issue process and the like). For example, a Pipe ID list (table) is stored in association with the address (function address). This function address is used for command routing of the service. Then, the CPU 131 (IC card 8) refers to the above table, calls the function address specified by the Pipe ID included in the received data (command), and transmits (provides) the command to each service.

  Note that in the issuance process executed based on the issuance process request command received through the ISO 7816 interface, the process is performed by selecting the issuance command router instead of the normal command router by a specific command. ing.

  Hereinafter, the issuance process executed based on the issuance process request command received through the ISO 7816 interface is referred to as an “issuance process using the ISO 7816 interface”. The issue process executed based on the issue process request command received through the SWP interface is referred to as an “issue process using the SWP interface”.

  Similarly, the completion of the issuance process using the ISO 7816 interface and the completion of the issuance process using the SWP interface can be detected by one (same) command (issue process completion command described later). it can.

  Regarding the completion of the issuance process using the ISO 7816 interface and the completion of the issuance process using the SWP interface, an operation stop flag is set on the issuance process program, and the program is stopped by determining (detecting) the program May be performed.

  In addition, the stop of the issuing process using the ISO 7816 interface, that is, the stop of the use of the issuing process program using the ISO 7816 interface is, for example, the calling point of the command router for the issuing command of the issuing process program using the ISO 7816 interface is nonvolatile. Delete from the memory 134. Further, the issue processing program stored in the nonvolatile memory 134 or the like may be directly deleted.

  In addition, the stop of the issuing process using the SWP interface, that is, the stop of the use of the issuing process program using the SWP interface is performed by referring to the Pipe ID list stored in the nonvolatile memory 134 as described above. And delete the function address. Further, the issue processing program stored in the nonvolatile memory 134 or the like may be directly deleted.

  It should be noted that an issuance processing program for causing the CPU 131 to execute issuance processing based on the issuance processing request command received through the ISO 7816 interface, and an issuance for causing the CPU 131 to perform issuance processing based on the issuance processing request command received via the SWP interface. You may make it prepare a processing program separately, respectively.

  In addition, since the issuing process is a known process, a detailed description is omitted. For example, one or a plurality of issuing processes subdivided under the IC card manufacturer (manufacturer) or the service provider, It is executed in a predetermined order. As the subdivided one or a plurality of issue processes, respective issue processes referred to as manufacturing stage, zero-order issue, primary issue, and secondary issue are executed in order. The processing contents of each issuance process will be described. For example, in the manufacturing stage, processing related to manufacturing of an IC chip (UIM 13 or the like) is performed, and specifically, the card OS or the like is stored in the ROM 132 or the like. In the 0th issue, processing related to the individualization of the IC chip is executed. Specifically, the initialization of the IC chip, an identifier for identifying the IC chip from other IC chips, and the like are stored. In the primary issue, processing related to the AP setting of the IC chip (setting of a predetermined application stored in the IC chip) is executed. Specifically, the format of the nonvolatile memory 134 and the predetermined application to the nonvolatile memory 134 are executed. Processing such as initial setting information and area reservation necessary for storage, storage (writing) of a predetermined application, and the like are performed. In the secondary issue, processing related to personalization of the IC chip (processing for providing an IC chip optimized in consideration of the user's usage mode, etc.) is executed, and personal settings of the user who uses the IC card 8 are performed. And authentication information such as personal information registration, PIN (Personal Identification Number) and biometric information (body / behavioral characteristics such as fingerprints) are stored.

  Returning to the description of FIG. 2, the CPU 131 controls the overall operation of the IC chip 1 and functions as an issue processing means, a completion detection means, and an issue process stop means of the present application as a part of its function. It has become.

  Next, the operation of the CPU 131 of the present application will be described with reference to FIGS.

  The CPU 131 of the present application performs issue processing using the ISO 7816 interface and issue processing using the SWP interface, detects completion of the issue processing for each ISO 7816 interface and SWP interface used for the issue processing, and both issue processing When the completion is detected, the subsequent issuance processing is stopped in association with the interface used for the issuance processing in order from the predetermined issuance processing.

  First, with reference to FIG. 6 and FIG. 7, the operation of the CPU 131 when the predetermined issue process condition to be stopped is the issue process executed first will be described.

  First, with reference to FIG. 6, the operation of the CPU 131 in the case of an issuance process using the ISO 7816 interface, which is an issuance process executed earlier, will be described.

  FIG. 6 is a flowchart showing the operation of the CPU 131 when it is an issuance process using the ISO 7816 interface, which is an issuance process executed first.

  As illustrated in FIG. 6, for example, when the CPU 131 receives a start command for issuing processing using the ISO 7816 interface, the CPU 131 executes an issuing processing program using the ISO 7816 interface and executes the issuing processing (step S1). ).

  For example, when the CPU 131 receives an issue process start command using the SWP interface, the CPU 131 executes the issue process program using the SWP interface and executes the issue process (step S2).

  When the CPU 131 receives an issuance completion command via the SWP interface as an example of one completion command indicating completion of the issuance processing, both the issuance processing using the ISO 7816 interface and the issuance processing using the SWP interface are issued. It is determined that the process has been completed (step S3).

  The CPU 131 of the present application determines that all the issuance processes have been completed when a single completion command indicating completion of the issuance process is received. As a result, the issuing process can be completed by transmitting and receiving a small number of commands, so that the issuing process using a plurality of interfaces can be executed more quickly and efficiently. Furthermore, since the completion of the issuing process is detected by the command received through the interface used immediately before, the device that transmits the command does not need to switch the script.

  Note that the method for determining that all the issuing processes have been completed is not limited to the above-described example, and when the issuing process completion command is received from the interface used for the issuing process, it is determined that the issuing process has been completed. You may make it do. Specifically, when an issue processing completion command is received through the ISO 7816 interface, it is determined that the issue processing using the ISO 7816 interface is completed, and when an issue processing completion command is received through the SWP interface. It may be determined that the issuing process using the SWP interface is completed.

  Then, the CPU 131 stops using the issuance processing program for executing the issuance processing using the ISO 7816 interface, which is the issuance processing executed previously (step S4).

  Various methods can be applied to determine whether this has been executed first.

  For example, a flag that is turned on when each issuance processing program is executed and a time when it is turned on are associated with each other and stored in the nonvolatile memory 134, and the determination may be made with reference to the stored flag and time. .

  Note that as an example of the predetermined issuance processing to be stopped, the issuance processing using an interface other than the interface that has received the end command may be stopped in order.

  In this case, the CPU 131 can determine the interface that has received the command by monitoring the type of the interface that has received the end command (whether the SWP interface or the ISO 7816 interface).

  Returning to the description of FIG. 6, the CPU 131 then stops using the issuance processing program for executing the issuance processing using the SWP interface (step S <b> 5).

  By doing so, for example, when the issuing process is stopped halfway due to a momentary interruption or the like at the stage before the issuing process is completed (for example, the stage of the processing in step S2 or step S3), the IC Instead of discarding the chip (IC card), the issuing process can be performed again. Therefore, the issuing process using a plurality of interfaces can be executed quickly and efficiently.

  Then, the CPU 131 transmits an issuance process completion response to the outside (step S6).

  Next, with reference to FIG. 7, the operation of the CPU 131 when the issue process executed first is an issue process using the SWP interface will be described.

  FIG. 7 is a flowchart showing the operation of the CPU 131 when the issue process executed first is an issue process using the SWP interface.

  The operation of the CPU 131 described in FIG. 7 is different from the operation of the CPU 131 described in FIG. 6 in that the issue process executed first is an issue process using the SWP interface.

  As illustrated in FIG. 7, for example, when the CPU 131 receives an issue processing start command using the SWP interface, the CPU 131 executes the issue processing program using the SWP interface, and executes the issue processing (step S <b> 11). ).

  For example, when the CPU 131 receives a start command for issuing processing using the ISO 7816 interface, the CPU 131 executes an issuing processing program using the ISO 7816 interface, and executes the issuing processing (step S12).

  When the CPU 131 receives an issuance completion command via the ISO 7816 interface as an example of one completion command indicating completion of the issuance processing, both the issuance processing using the ISO 7816 interface and the issuance processing using the SWP interface are issued. It is determined that the process has been completed (step S13).

  Then, the CPU 131 stops using the issuance process program for executing the issuance process using the SWP interface, which is the issuance process executed previously (step S14).

  As for the determination of whether or not it has been executed first, various methods can be applied, as in the example of the operation of FIG. 6 described above.

  That is, a flag that is turned on when the issuing process program is executed and a time when the issuance program is turned on are associated with each other and stored in the nonvolatile memory 134, and a determination may be made with reference to the stored flag and time.

  In addition, as an example of the predetermined issuance processing to be stopped, the issue processing using the interface other than the interface that has received the end command may be stopped in order from the issuance processing using the example of the operation illustrated in FIG. It is the same.

  That is, the CPU 131 can determine the interface that has received the command by monitoring the type of the interface that has received the end command (whether the SWP interface or the ISO7816 interface).

  Returning to the description of FIG. 7, the CPU 131 then stops using the issuance processing program for executing the issuance processing using the ISO7816 interface (step S <b> 15).

  Then, the CPU 131 transmits an issuance process completion response to the outside (step S16).

  Next, with reference to FIG. 8, the operation of the CPU 131 when determining the order in which the issuance processing program is stopped according to the type of interface that has received the command will be described.

  FIG. 8 is a flowchart showing the operation of the CPU 131 when determining the order in which the issuance processing program is stopped depending on the type of interface that has received the command.

  The operation of the CPU 131 described in FIG. 8 is different from the operation of the CPU 131 described in FIGS. 6 and 7 in that the order in which the issuance processing program is stopped is determined according to the type of interface that has received the command.

  As shown in FIG. 8, upon receiving an issuance processing start command using the first interface (in this embodiment, either the ISO7816 interface or the SWP interface), the CPU 131 issues an issue using this first interface. The processing program is executed, and the issuing process is executed (step S21).

  Then, the CPU 131 issues a start command for issuing processing using a second interface (an interface other than the first interface. In this embodiment, for example, when the first interface is an ISO7816 interface, the SWP interface). Is received, the CPU 131 executes an issuance processing program that uses the second interface, and executes the issuance processing (step S22).

  When the CPU 131 receives the issue completion command through the first interface or the second interface (step S23), the CPU 131 determines the type of the interface that has received the command (whether it is the first interface or the second interface) ( Step S24). Since this determination method is a known means, a detailed description thereof is omitted, but for example, the CPU 131 may monitor and determine the interface that has received the issuance completion command.

  Then, the CPU 131 refers to the determination result in step S24 and first stops the issue processing program that uses an interface other than the interface that has received the issue completion command (step S25).

  Next, the CPU 131 refers to the determination result of step S24, and stops the issue processing program that uses the interface that has received the issue completion command (step S26).

  Then, the CPU 131 transmits an issuance process completion response to the outside (step S27).

  As described above, the CPU 131 of the UIM 13 in this embodiment executes the issuing process using the ISO 7816 interface or the SWP interface, detects the completion of the issuing process, and issues the issuing process using the ISO 7816 interface. When completion of issue processing using the SWP interface is detected, subsequent issue processing is stopped in order from the predetermined issue processing, so issue processing using multiple interfaces can be executed quickly and efficiently. It is possible to avoid the deterioration of the product yield.

  The embodiments described above do not limit the invention according to the claims. And not all the combinations of the configurations described in the above embodiment are indispensable means for solving the problems of the invention.

1 mobile terminal 7 IC card base 8 IC card 11 controller 12 CLF
13 UIM
131 CPU
132 ROM
133 RAM
134 Nonvolatile memory 135 I / O port

Claims (9)

A first interface, and issuing processing means for executing the issue process by using the second interface conforming to a second communication standard that complies with the first communication standard,
Completion detection means for detecting completion of the issuing process;
When the completion detection means detects completion of the issuance process using the first interface and the issuance process using the second interface, the issuance is performed to stop the subsequent issuance process in order from the predetermined issuance process. Processing stop means;
An IC chip comprising: The IC chip according to claim 1,
The completion detecting means detects that the issuing process using the first interface and the issuing process using the second interface are completed when one completion command indicating completion of the issuing process is received. Characteristic IC chip. The IC chip according to claim 2,
The IC chip according to claim 1, wherein the predetermined issuing process is an issuing process using an interface other than the interface that has received the completion command. The IC chip according to claim 1 or 2,
The IC chip according to claim 1, wherein the predetermined issuing process is an issuing process executed first. The IC chip according to any one of claims 1 to 4,
The first interface compliant with the first communication standard is an interface compliant with ISO7816,
An IC chip, wherein the first interface compliant with the second communication standard is SWIO (Single Wired Protocol Input / Output) compliant with ETSI TS102.613.   An IC card on which the IC chip according to any one of claims 1 to 5 is mounted. A portable terminal comprising the IC card according to claim 6. A first interface, and issue processing step of utilizing a second interface for issuing processing conforming to a second communication standard that complies with the first communication standard,
A completion detection step of detecting completion of the issuing process;
When the completion detection step detects completion of the issuance process using the first interface and the issuance process using the second interface, the issuance is performed to stop the subsequent issuance process in order from the predetermined issuance process. A process stop process;
A processing method for an IC chip, comprising: The computer included in the IC chip
First interface, and issuing processing means for issuing processing by using the second interface conforming to a second communication standard that complies with the first communication standard,
Completion detection means for detecting completion of the issuing process;
When the completion detection means detects completion of the issuance process using the first interface and the issuance process using the second interface, the issuance is performed to stop the subsequent issuance process in order from the predetermined issuance process. Processing stop means,
IC chip processing program characterized in that it functions as:

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