JP2015162497A - Semiconductor device and electronic apparatus using the same - Google Patents

Semiconductor device and electronic apparatus using the same Download PDF

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JP2015162497A
JP2015162497A JP2014035284A JP2014035284A JP2015162497A JP 2015162497 A JP2015162497 A JP 2015162497A JP 2014035284 A JP2014035284 A JP 2014035284A JP 2014035284 A JP2014035284 A JP 2014035284A JP 2015162497 A JP2015162497 A JP 2015162497A
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semiconductor device
bare chip
flexible circuit
circuit board
support
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JP6121926B2 (en
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靜昭 増田
Shizuaki Masuda
靜昭 増田
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NEC Platforms Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can release generated heat while inhibiting an increase in mounting area.SOLUTION: A semiconductor device comprises: s support medium which has a thickness almost the same with that of a bare chip and is arranged adjacent to the bare chip; a flexible circuit board on which the bare chip and the support medium are mounted and which is folded so as to surround the bare chip and the support medium; a heat release part which is provided by thermal contact with an external surface of the flexible circuit board which surrounds the bare chip and the support medium; and leg parts which pierce the flexible circuit board to conduct heat in a region surrounded by the flexible circuit board to the outside of the region surrounded by the flexible circuit board.

Description

本発明は、放熱特性を改善した半導体装置及びそれを用いた電子機器に関する。   The present invention relates to a semiconductor device with improved heat dissipation characteristics and an electronic apparatus using the same.

近年の電子機器における小型化及び低消費電力化等の要求を実現するために、半導体装置の高密度実装が必要とされている。そこで、特開平8−335663号公報では、ベアチップの半導体素子が搭載された可撓性回路基板を折り曲げて、当該ベアチップを包んだ構成の3次元実装型半導体装置が開示されている。   In order to realize the recent demands for downsizing and low power consumption in electronic devices, high-density mounting of semiconductor devices is required. Japanese Patent Application Laid-Open No. 8-335663 discloses a three-dimensional mounting type semiconductor device having a configuration in which a flexible circuit board on which a bare chip semiconductor element is mounted is bent and the bare chip is wrapped.

ベアチップを可撓性回路基板に直接接続(搭載)することにより薄型化が可能になると共に、ベアチップと最終品である半導体装置との外形サイズが、概ね同じ寸法にすることができる。   By directly connecting (mounting) the bare chip to the flexible circuit board, the thickness can be reduced, and the outer size of the bare chip and the final semiconductor device can be made substantially the same.

しかし、特開平8−335663号公報に係る構成では、ベアチップは可撓性回路基板で包まれる構成であるため、ベアチップの消費電力の大きい場合には、当該ベアチップで発生した熱が外部に逃げ難くなってしまう。この結果、ベアチップの温度が上昇し、誤動作を起こす問題があった。   However, in the configuration according to Japanese Patent Application Laid-Open No. 8-335663, since the bare chip is wrapped with a flexible circuit board, when the power consumption of the bare chip is large, the heat generated in the bare chip is difficult to escape to the outside. turn into. As a result, there is a problem that the temperature of the bare chip rises and malfunctions occur.

この様な観点から、WO2011/043493号公報においては、ベアチップと共に支持体を可撓性回路基板で包み込み、かつ、この支持体を突出させることにより、ベアチップで発生した熱の放熱効率を改善させた半導体装置が提案されている。   From this point of view, in WO2011 / 043493, the heat dissipation efficiency of the heat generated in the bare chip is improved by wrapping the support together with the bare chip in a flexible circuit board and projecting the support. Semiconductor devices have been proposed.

特開平8−335663号公報JP-A-8-335663 WO2011/043493号公報WO2011 / 043493

しかしながら、WO2011/043493号公報に係る構成では、支持体が可撓性回路基板から突き出した構成となるため、半導体装置の実装面積が大きくなる問題がある。   However, the structure according to WO2011 / 043493 has a problem in that the mounting area of the semiconductor device increases because the support protrudes from the flexible circuit board.

そこで、本発明の主目的は、実装面積の増大を抑制しながら発生した熱を効率よく放熱できるようにした半導体装置及びそれを用いた電子機器を提供することである。   SUMMARY OF THE INVENTION Accordingly, a main object of the present invention is to provide a semiconductor device and an electronic device using the same that can efficiently dissipate heat generated while suppressing an increase in mounting area.

上記課題を解決するため、ベアチップと概ね同じ厚みで、かつ、当該ベアチップに隣接して配置された支持体と、ベアチップ及び支持体が搭載され、かつ、該ベアチップ及び該支持体を包むように折り曲げられる可撓性回路基板と、ベアチップ及び支持体を包みこんだ可撓性回路基板の外面に熱接触して設けられた放熱部と、可撓性回路基板を挿通して、当該可撓性回路基板で包まれた領域な内の熱を、該可撓性回路基板で囲まれた領域の外に導く脚部と、を備える個とを特徴とする。   In order to solve the above-described problem, a support body that is substantially the same thickness as the bare chip and that is disposed adjacent to the bare chip, the bare chip and the support body are mounted, and are folded so as to enclose the bare chip and the support body. A flexible circuit board, a heat radiation portion provided in thermal contact with the outer surface of the flexible circuit board enclosing the bare chip and the support, and the flexible circuit board inserted through the flexible circuit board And a leg portion for guiding heat in the region surrounded by the flexible circuit board to the outside of the region surrounded by the flexible circuit board.

本発明によれば、実装面積の増大を抑制しながら発生した熱を効率よく放熱できるようになる。   According to the present invention, it is possible to efficiently dissipate heat generated while suppressing an increase in mounting area.

第1実施形態に係る半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device according to a first embodiment. 可撓性回路基板の構成を説明する図で、(a)は展開図、(b)はベアチップと支持体とを包む様子を示す断面斜視図である。It is a figure explaining the structure of a flexible circuit board, (a) is an expanded view, (b) is a cross-sectional perspective view which shows a mode that a bare chip and a support body are wrapped. 支持体側開口部の開口形状を示す図である。It is a figure which shows the opening shape of a support body side opening part. ベアチップからの熱が放熱される熱伝導パスを矢印で示した図である。It is the figure which showed the heat conduction path by which the heat | fever from a bare chip is thermally radiated with the arrow. 半導体装置における主要要素の図で、(a)はベアチップの側面図、(b)は支持体の上面図、(c)は可撓性回路基板の断面図、(d)は可撓性回路基板の上面図である。1A and 1B are diagrams of main elements in a semiconductor device, where FIG. 1A is a side view of a bare chip, FIG. 1B is a top view of a support, FIG. 2C is a cross-sectional view of a flexible circuit board, and FIG. FIG. ベアチップ等が仮搭載された可撓性回路基板の図で、(a)は側面図、(b)は上面図である。It is a figure of the flexible circuit board by which the bare chip etc. were temporarily mounted, (a) is a side view, (b) is a top view. 可撓性回路基板によりベアチップと支持体とを包み、かつ、これらに接着して形成したパッケージの断面図である。FIG. 3 is a cross-sectional view of a package formed by wrapping a bare chip and a support with a flexible circuit board and bonding them to each other. はんだボールで、はんだ接続したパッケージの断面図である。It is sectional drawing of the package soldered with the solder ball. 第2実施形態に係る半導体装置の断面図である。It is sectional drawing of the semiconductor device which concerns on 2nd Embodiment. 第3実施形態に係る半導体装置の断面図である。It is sectional drawing of the semiconductor device which concerns on 3rd Embodiment. 他の構成の半導体装置の断面図である。It is sectional drawing of the semiconductor device of another structure. 他の構成の半導体装置の断面図である。It is sectional drawing of the semiconductor device of another structure. 第4実施形態に係る半導体装置の断面図である。It is sectional drawing of the semiconductor device which concerns on 4th Embodiment. 2つのベアチップを積層した半導体装置の断面図である。It is sectional drawing of the semiconductor device which laminated | stacked two bare chips.

<第1実施形態>
本発明の第1実施形態を説明する。図1は本実施形態にかかる半導体装置2Aの断面図である。かかる半導体装置2Aは、家庭用ゲーム機、医療機器、ワークステーション、サーバー、パーソナルコンピュータ、カーナビゲーション、携帯電話、ロボット、計測器等の小型化・高集積化の要求が高い電子機器で使用することができる。
<First Embodiment>
A first embodiment of the present invention will be described. FIG. 1 is a cross-sectional view of a semiconductor device 2A according to the present embodiment. The semiconductor device 2A should be used in electronic devices with high demands for miniaturization and high integration, such as home game machines, medical devices, workstations, servers, personal computers, car navigation systems, mobile phones, robots, and measuring instruments. Can do.

このような半導体装置2Aは、素子部4と放熱部6とを主要構成として構成されて、実装基板10に搭載して用いられる。   Such a semiconductor device 2 </ b> A includes the element unit 4 and the heat dissipation unit 6 as main components, and is used by being mounted on the mounting substrate 10.

素子部4は、ベアチップ11、支持体12、及び、可撓性回路基板13を含んでいる。そして、ベアチップ11と支持体12とは、可撓性回路基板13に搭載されて、当該可撓性回路基板13によって包まれている。即ち、素子部4は、可撓性回路基板13によりベアチップ11、支持体12が包まれた袋状態となっている。   The element unit 4 includes a bare chip 11, a support body 12, and a flexible circuit board 13. The bare chip 11 and the support 12 are mounted on the flexible circuit board 13 and are wrapped by the flexible circuit board 13. That is, the element portion 4 is in a bag state in which the bare chip 11 and the support 12 are wrapped by the flexible circuit board 13.

そこで、袋状態にある可撓性回路基板13の外面(図1において放熱材21側の面)を放熱側面Fhと記載し、他方の外面(図1において実装基板10側の面)を端子側面Ftと記載する。また、端子側面Ftの裏面(ベアチップ11が搭載される面)をチップ搭載面Fcと記載する。   Therefore, the outer surface of the flexible circuit board 13 in the bag state (the surface on the heat dissipating material 21 side in FIG. 1) is referred to as a heat dissipating side surface Fh, and the other outer surface (the surface on the mounting substrate 10 side in FIG. 1) is the terminal side surface. Described as Ft. Moreover, the back surface (surface on which the bare chip 11 is mounted) of the terminal side surface Ft is referred to as a chip mounting surface Fc.

ベアチップ11として、半導体IC、パッケージ化された電子部品、コンデンサ、抵抗、インダクタ等の受動部品等が例示出来る。   Examples of the bare chip 11 include semiconductor ICs, packaged electronic components, passive components such as capacitors, resistors, and inductors.

支持体12は、ベアチップ11と概ね同じ厚みに形成されて、当該ベアチップ11の縁端に過大な荷重が加わることを防止している。このような支持体12の材料としては、例えば金属(鉄、アルミニウム、アルミニウムを含んだ合金、NiとFeを含んだ合金、NiとCrを含んだ合金、Crを含んだ合金、銅)、シリコン、樹脂材料(ナイロン、PP、エポキシ樹脂、カーボン、アラミド樹脂)、雲母(マイカ)などが利用出来る。   The support 12 is formed to have substantially the same thickness as that of the bare chip 11 and prevents an excessive load from being applied to the edge of the bare chip 11. Examples of the material of the support 12 include metals (iron, aluminum, alloys containing aluminum, alloys containing Ni and Fe, alloys containing Ni and Cr, alloys containing Cr, copper), silicon, and the like. Resin materials (nylon, PP, epoxy resin, carbon, aramid resin), mica (mica), etc. can be used.

可撓性回路基板13は、可撓性のプリント基板等からなる配線基板で、チップ搭載面Fcにはベアチップ11と電気的接続するための図示しないベアチップ接続用電極が形成され、このチップ搭載面Fcと反対側の端子側面Ftには外部端子14と電気的接続するための図示しない外部端子用電極が形成されている。   The flexible circuit board 13 is a wiring board made of a flexible printed board or the like, and a bare chip connection electrode (not shown) for electrical connection with the bare chip 11 is formed on the chip mounting surface Fc. An external terminal electrode (not shown) for electrical connection with the external terminal 14 is formed on the terminal side surface Ft opposite to the Fc.

外部端子14は実装基板10との接続に用いられる端子で、例えばSnを含んだ金属材料で構成されたいわゆる半田ボール等が好ましい。無論、半田ボールに限定するものではなく、表面実装型部品の形状であれば、対応できるのは言うまでもない。   The external terminal 14 is a terminal used for connection to the mounting substrate 10, and for example, a so-called solder ball made of a metal material containing Sn is preferable. Needless to say, the shape is not limited to solder balls, and needless to say, any shape can be used as long as the shape is a surface-mounted component.

図2は可撓性回路基板13の構成を説明する図で、(a)は可撓性回路基板13の展開図、(b)は可撓性回路基板13でベアチップ11と支持体12とを包む様子を示す断面斜視図である。なお、図2(a)においては、ベアチップ11と支持体12とを点線で示している。ベアチップ11は、可撓性回路基板13のほぼ中央に搭載され、このベアチップ11を囲むように、支持体12が配置されている。   2A and 2B are diagrams illustrating the configuration of the flexible circuit board 13. FIG. 2A is a development view of the flexible circuit board 13, and FIG. 2B is a diagram of the flexible circuit board 13 in which the bare chip 11 and the support 12 are connected. It is a cross-sectional perspective view which shows a mode that it wraps. In FIG. 2A, the bare chip 11 and the support 12 are indicated by dotted lines. The bare chip 11 is mounted substantially at the center of the flexible circuit board 13, and a support 12 is disposed so as to surround the bare chip 11.

そして、可撓性回路基板13には支持体側開口部15aが設けられている。支持体側開口部15aは、可撓性回路基板13を折り曲げてベアチップ11と支持体12とを包んだ際に、支持体12の直上に位置するようになっている。但し、支持体側開口部15aの面積は対向する支持体12の面積より適宜小さくなっている。従って、可撓性回路基板13を袋状態にした際には、支持体12の外周部近傍領域のみが可撓性回路基板13で覆われた状態となる。   The flexible circuit board 13 is provided with a support side opening 15a. The support side opening 15a is positioned directly above the support 12 when the flexible circuit board 13 is bent and the bare chip 11 and the support 12 are wrapped. However, the area of the support-side opening 15a is appropriately smaller than the area of the opposing support 12. Therefore, when the flexible circuit board 13 is put into a bag state, only the region near the outer peripheral portion of the support 12 is covered with the flexible circuit board 13.

この支持体側開口部15aの形状は矩形形状に限定するものではなく、例えば図3に示すように楕円形状であっても良く、また長穴形状であっても良い。   The shape of the support-side opening 15a is not limited to a rectangular shape, and may be, for example, an elliptical shape as shown in FIG.

次に、放熱部6について説明する。放熱部6は、放熱材21と導熱シート22とを含んでいる。   Next, the heat radiation part 6 will be described. The heat dissipation part 6 includes a heat dissipation material 21 and a heat conductive sheet 22.

放熱材21は、脚部23、及び、放熱部24を備える。この放熱材21として、所謂ヒートシンクが利用できるが、導熱シート、導熱ゴム、または半導体装置2Aをカバーしている筐体などを用いることも可能である。以下においてはヒートシンクを想定して説明する。また、脚部23と放熱部24とは一体物である必要はなく、少なくとも両者は密着し、その接触面で熱抵抗が発生しない(熱抵抗が小さいように)ことが要件である。以下においては、脚部23と放熱部24とは別体物であることを想定する。   The heat dissipation material 21 includes a leg portion 23 and a heat dissipation portion 24. A so-called heat sink can be used as the heat dissipating material 21, but a heat conducting sheet, a heat conducting rubber, or a housing covering the semiconductor device 2 </ b> A can also be used. In the following description, a heat sink is assumed. Moreover, the leg part 23 and the heat radiating part 24 do not need to be a single body, and at least both of them are in close contact with each other, and it is a requirement that no thermal resistance is generated on the contact surface (so that the thermal resistance is small). In the following, it is assumed that the leg portion 23 and the heat radiating portion 24 are separate objects.

脚部23は、シート状部材の放熱部24に立設され、その解放端は支持体側開口部15aを挿通して支持体12と密着している。従って、支持体12の熱は、脚部23を介して放熱部24に効率よく熱伝導するようになる。放熱部24に流入した熱は、大気等の周辺の雰囲気や部材に効率よく放熱される。   The leg portion 23 is erected on the heat radiating portion 24 of the sheet-like member, and the open end thereof is in close contact with the support body 12 through the support body side opening 15a. Therefore, the heat of the support 12 is efficiently conducted to the heat radiating portion 24 through the leg portion 23. The heat flowing into the heat radiating section 24 is efficiently radiated to the surrounding atmosphere and members such as the atmosphere.

導熱シート22は、放熱部24に密着して設けられたシート状部材である。導熱シート22と放熱部24とは密に面接触している。このため、放熱部24と導熱シート22との熱伝導パスは均一、かつ、最短となり導熱シート22の熱は効率的に放熱部24に伝達できるようになっている。   The heat conducting sheet 22 is a sheet-like member provided in close contact with the heat radiating portion 24. The heat conducting sheet 22 and the heat radiating part 24 are in close surface contact. For this reason, the heat conduction path between the heat radiating section 24 and the heat conducting sheet 22 is uniform and shortest so that the heat of the heat conducting sheet 22 can be efficiently transmitted to the heat radiating section 24.

図4は、ベアチップ11からの熱が放熱される熱伝導パスを矢印で示した図である。ベアチップ11で発生した熱は、このベアチップ11の表裏に接触している可撓性回路基板13に伝わる。その後、可撓性回路基板13の熱の一部は、導熱シート22を経由して放熱部24に伝わり、大気等に放熱される。一方、可撓性回路基板13の残りの熱は、支持体12に伝わる。この支持体12には、脚部23が密着しているので、可撓性回路基板13からの熱は、脚部23を介して放熱部24に伝わって、放熱される。   FIG. 4 is a diagram showing a heat conduction path through which heat from the bare chip 11 is dissipated by arrows. The heat generated in the bare chip 11 is transmitted to the flexible circuit board 13 in contact with the front and back of the bare chip 11. Thereafter, part of the heat of the flexible circuit board 13 is transmitted to the heat radiating portion 24 via the heat conducting sheet 22 and is radiated to the atmosphere or the like. On the other hand, the remaining heat of the flexible circuit board 13 is transferred to the support 12. Since the leg portion 23 is in close contact with the support 12, the heat from the flexible circuit board 13 is transmitted to the heat radiating portion 24 through the leg portion 23 and is radiated.

次に、上述した半導体装置2Aの製造方法について説明する。   Next, a method for manufacturing the above-described semiconductor device 2A will be described.

図5は、半導体装置2Aにおける主要要素の図で、(a)はベアチップ11の側面図、(b)は支持体12の上面図、(c)は可撓性回路基板13の断面図、(d)はこの可撓性回路基板13の上面図である。また、ベアチップ11の外形サイズを約13mm×13mm×高さ0.7mmとし、支持体12の外形サイズを約23mm×17mm×厚さ0.7mmとする。可撓性回路基板13は、外形サイズを約17mm×36mm×厚さ0.14mmとする。この可撓性回路基板13として、例えば、図5(c)に示すような第1絶縁層13a、第2絶縁層13b、第3絶縁層13cからなる配線層数が2層の基板を用いることがでる。外部端子14は、直径約0.8mmのSnAgCuはんだボールを、約100個を用いる。なお、ベアチップ11等のサイズや可撓性回路基板13の層数、外部端子14の数は例示である。   5A and 5B are diagrams of main elements in the semiconductor device 2A, where FIG. 5A is a side view of the bare chip 11, FIG. 5B is a top view of the support 12, and FIG. 5C is a cross-sectional view of the flexible circuit board 13. d) is a top view of the flexible circuit board 13; In addition, the outer size of the bare chip 11 is about 13 mm × 13 mm × height 0.7 mm, and the outer size of the support 12 is about 23 mm × 17 mm × thickness 0.7 mm. The flexible circuit board 13 has an outer size of about 17 mm × 36 mm × thickness 0.14 mm. As the flexible circuit board 13, for example, a board having two wiring layers including the first insulating layer 13a, the second insulating layer 13b, and the third insulating layer 13c as shown in FIG. 5C is used. I get out. The external terminal 14 uses about 100 SnAgCu solder balls having a diameter of about 0.8 mm. The size of the bare chip 11 and the like, the number of layers of the flexible circuit board 13, and the number of external terminals 14 are examples.

このとき、可撓性回路基板13のチップ搭載面Fcにおける支持体12の表面やベアチップ11の表面と接着する領域R(図5(b)を参照)に接着層として、厚さ約25μmの熱可塑性(接着温度が約150℃)のの接着シート13dを貼り付けておく。   At this time, heat having a thickness of about 25 μm is used as an adhesive layer on the surface R of the support 12 or the surface of the bare chip 11 (see FIG. 5B) on the chip mounting surface Fc of the flexible circuit board 13. A plastic adhesive sheet 13d (adhesion temperature is about 150 ° C.) is pasted.

この様な材料を用いて、先ず、可撓性回路基板13におけるチップ搭載面Fcのベアチップ接続用電極13eにフラックス又はクリーム半田を塗布し、フリップベアチップ実装マウンターやベアチップマウンターを用いて、ベアチップ11、支持体12を図6に示すように仮搭載する。図6は、ベアチップ11等が仮搭載された可撓性回路基板13の図で、(a)は側面図、(b)は上面図である。   Using such a material, first, flux or cream solder is applied to the bare chip connection electrode 13e on the chip mounting surface Fc of the flexible circuit board 13, and the bare chip 11 or the bare chip mounter is used by using a flip bare chip mounting mounter or a bare chip mounter. The support 12 is temporarily mounted as shown in FIG. 6A and 6B are diagrams of the flexible circuit board 13 on which the bare chip 11 and the like are temporarily mounted. FIG. 6A is a side view and FIG. 6B is a top view.

次に、ベアチップ11等が仮搭載された可撓性回路基板13を180℃に加熱したヒーターステージ上に吸着固定させる。そして、この状態で、加圧ツールを用いて可撓性回路基板13を辺K(図6(b)参照)で折り曲げ、ベアチップ11と支持体12の表面に接着させる。これにより、可撓性回路基板13は、ベアチップ11と支持体12とを包み、かつ、これらに接着する。図7は、この様にして形成されたパッケージの断面図である。   Next, the flexible circuit board 13 on which the bare chip 11 and the like are temporarily mounted is sucked and fixed onto a heater stage heated to 180 ° C. In this state, the flexible circuit board 13 is bent at a side K (see FIG. 6B) using a pressure tool, and is bonded to the surfaces of the bare chip 11 and the support 12. Thereby, the flexible circuit board 13 wraps the bare chip 11 and the support 12 and adheres to them. FIG. 7 is a cross-sectional view of the package thus formed.

その後、可撓性回路基板13における端子側面Ftの外部端子14に、はんだボールをフラックスで仮搭載した後、リフロー炉に投入して、はんだ接続を行った。図8は、はんだボールで、はんだ接続したパッケージの断面図である。   Thereafter, a solder ball was temporarily mounted on the external terminal 14 on the terminal side surface Ft of the flexible circuit board 13 with a flux, and then placed in a reflow furnace to perform solder connection. FIG. 8 is a cross-sectional view of a package soldered with solder balls.

次に、導熱シート22を配置し、可撓性回路基板13における支持体側開口部15aから見える支持体12と放熱部24とを接触させる。   Next, the heat conductive sheet 22 is disposed, and the support 12 and the heat radiating part 24 that are visible from the support-side opening 15a in the flexible circuit board 13 are brought into contact with each other.

そして、半導体装置2Aをマウンターにより実装基板10に搭載し、リフロー装置を用いて、これらの半導体装置2Aを実装基板10に、はんだ接続させた。   Then, the semiconductor device 2A was mounted on the mounting substrate 10 by a mounter, and these semiconductor devices 2A were soldered to the mounting substrate 10 using a reflow device.

なお、上記製造方法は一例であることを敢えて付言する。従って、発明の精神を逸脱しない範囲でさらに多くの改変を施しえるのは言うまでも無いことである。   It is noted that the above manufacturing method is an example. Accordingly, it goes without saying that many more modifications can be made without departing from the spirit of the invention.

以上説明したように、可撓性回路基板13の支持体側開口部15aに露出している支持体12を、脚部23を介して放熱部24に熱伝導させることが可能になって、ベアチップ11で発生した熱が効率的に放熱できるようになる。放熱性が向上することは、実装面積の増大が抑制でき、また高密度実装が可能になることを意味する。   As described above, the support 12 exposed to the support-side opening 15a of the flexible circuit board 13 can be thermally conducted to the heat dissipation part 24 via the leg 23, and the bare chip 11 The heat generated in can be efficiently dissipated. An improvement in heat dissipation means that an increase in mounting area can be suppressed and high-density mounting is possible.

<第2実施形態>
次に、本発明の第2実施形態を説明する。なお、第1実施形態と、同一構成に関しては同一符号を用いて説明を適宜省略する。
Second Embodiment
Next, a second embodiment of the present invention will be described. In addition, about 1st Embodiment and the same structure, the description is abbreviate | omitted suitably using the same code.

第1実施形態においては、脚部23は、支持体12とのみ熱接触する構成であった。しかし、本発明はこれに限定されず、例えば図9に示すように、ベアチップ11とも熱接触するようにしても良い。なお、図9において導熱シートは図示省略されている。   In the first embodiment, the leg portion 23 is configured to be in thermal contact with only the support 12. However, the present invention is not limited to this. For example, as shown in FIG. 9, the bare chip 11 may be in thermal contact. In FIG. 9, the heat conducting sheet is not shown.

図9に示す半導体装置2Bは、ベアチップ11に対向した可撓性回路基板13の領域を開口してベアチップ側開口部15bを形成すると共に、このベアチップ側開口部15bに対応して脚部25を追加して設けている。   The semiconductor device 2B shown in FIG. 9 opens the area of the flexible circuit board 13 facing the bare chip 11 to form the bare chip side opening 15b, and the leg 25 corresponding to the bare chip side opening 15b. It is additionally provided.

これにより、ベアチップ11の熱は脚部25からも放熱されるので、これまで述べた効果に加え、さらに放熱効率が向上する。   Thereby, since the heat of the bare chip 11 is also radiated from the leg portion 25, in addition to the effects described so far, the heat radiation efficiency is further improved.

<第3実施形態>
次に、本発明の第3実施形態を説明する。なお、上述した実施形態と、同一構成に関しては同一符号を用いて説明を適宜省略する。これまでの各実施形態においては、放熱効率を向上させるために、脚部23,25等を設けてベアチップ11の熱を放熱部24に導く構成について説明した。しかし、本発明は、かかる構成に限定されるものではない。例えば図10に示すように、熱を、脚部23を介して実装基板10に流動させるようにしてもよい。
<Third Embodiment>
Next, a third embodiment of the present invention will be described. In addition, about the same structure as embodiment mentioned above, description is abbreviate | omitted suitably using the same code | symbol. In each of the embodiments so far, in order to improve the heat radiation efficiency, the configuration in which the leg portions 23 and 25 are provided to guide the heat of the bare chip 11 to the heat radiation portion 24 has been described. However, the present invention is not limited to such a configuration. For example, as shown in FIG. 10, heat may be caused to flow to the mounting substrate 10 via the leg portions 23.

なお、図11に示すように、可撓性回路基板13にベアチップ11と対向するベアチップ側開口部15bのみを設けた構成の半導体装置2Dでも良い。また、図12に示すように、可撓性回路基板13に支持体側開口部15aとベアチップ側開口部15bとを設けて、脚部23,25により放熱する構成の半導体装置2Eでも良い。   As shown in FIG. 11, a semiconductor device 2D having a configuration in which only the bare chip side opening 15b facing the bare chip 11 is provided on the flexible circuit board 13 may be used. Further, as shown in FIG. 12, the semiconductor device 2 </ b> E may be configured such that the support circuit side opening 15 a and the bare chip side opening 15 b are provided in the flexible circuit board 13 and the legs 23 and 25 radiate heat.

これら図10〜図12に示す半導体装置2C〜2Eは、実装基板10が放熱部24の放熱機能を兼ねた構成である。これにより、これまで述べた効果に加え、半導体装置の高さを高くすることなくベアチップ11の発熱を外部に効率よく放熱できるようになる。   The semiconductor devices 2 </ b> C to 2 </ b> E illustrated in FIGS. 10 to 12 have a configuration in which the mounting substrate 10 also serves as a heat dissipation function of the heat dissipation unit 24. As a result, in addition to the effects described so far, the heat generated by the bare chip 11 can be efficiently radiated to the outside without increasing the height of the semiconductor device.

<第4実施形態>
次に、本発明の第4実施形態を説明する。なお、上述した実施形態と、同一構成に関しては同一符号を用いて説明を適宜省略する。
<Fourth embodiment>
Next, a fourth embodiment of the present invention will be described. In addition, about the same structure as embodiment mentioned above, description is abbreviate | omitted suitably using the same code | symbol.

これまで説明した半導体装置においては、脚部23,25は、放熱部24側又は実装基板10側のいずれか一方に設けた。これに対し、本実施形態では、脚部を放熱部24側と実装基板10側との両方に設けた。図13は、この様な構成の半導体装置2Fの断面図である。   In the semiconductor device described so far, the leg portions 23 and 25 are provided on either the heat radiating portion 24 side or the mounting substrate 10 side. On the other hand, in the present embodiment, the leg portions are provided on both the heat radiating portion 24 side and the mounting substrate 10 side. FIG. 13 is a cross-sectional view of the semiconductor device 2F having such a configuration.

この半導体装置2Fでは、支持体12を挟んで上下に脚部23が設けられ、この脚部23に放熱部24や実装基板10が熱接触している。従って、これまで述べた効果に加え、放熱パスが増大することによる放熱効率が向上する。   In the semiconductor device 2 </ b> F, leg portions 23 are provided on the upper and lower sides of the support 12, and the heat radiating portion 24 and the mounting substrate 10 are in thermal contact with the leg portions 23. Therefore, in addition to the effects described so far, the heat dissipation efficiency due to the increase of the heat dissipation path is improved.

<第5実施形態>
次に、本発明の第5実施形態を説明する。なお、上述した実施形態と、同一構成に関しては同一符号を用いて説明を適宜省略する。
<Fifth Embodiment>
Next, a fifth embodiment of the present invention will be described. In addition, about the same structure as embodiment mentioned above, description is abbreviate | omitted suitably using the same code | symbol.

上述した各実施形態においては、半導体装置は、1つのベアチップを含む構成であった。しかし、本発明は係る構成に限定されない。即ち、複数のベアチップを含んでも良い。このとき、各ベアチップは同種類又は異なる種類であってもよい。   In each of the embodiments described above, the semiconductor device has a configuration including one bare chip. However, the present invention is not limited to such a configuration. That is, a plurality of bare chips may be included. At this time, the bare chips may be of the same type or different types.

図14は、2つのベアチップ11a,11bを積層した半導体装置2Gの断面図である。即ち、半導体装置2Gは、第1実施形態に係る半導体装置2Aの下部に第3実施形態に係る半導体装置2Cを配置して、これらを実装基板10に搭載した構造となっている。   FIG. 14 is a cross-sectional view of a semiconductor device 2G in which two bare chips 11a and 11b are stacked. That is, the semiconductor device 2G has a structure in which the semiconductor device 2C according to the third embodiment is disposed below the semiconductor device 2A according to the first embodiment and these are mounted on the mounting substrate 10.

このとき、半導体装置2Aと半導体装置2Cとは、外部端子14により電気的に接続されて、半導体装置2A,2Cへの信号は実装基板10を介して行われる。   At this time, the semiconductor device 2 </ b> A and the semiconductor device 2 </ b> C are electrically connected by the external terminal 14, and signals to the semiconductor devices 2 </ b> A and 2 </ b> C are performed via the mounting substrate 10.

このように、複数のチップを積層した構成にすることで、実装面積の増大を抑制しながら、放熱効率の優れた半導体装置を得ることができる。   As described above, by stacking a plurality of chips, a semiconductor device having excellent heat dissipation efficiency can be obtained while suppressing an increase in mounting area.

なお、図14に示す半導体装置2Gは、半導体装置2Aと半導体装置2Cとを積層した構造であるが、積層する半導体装置を限定するものではないことを敢えて付言する。   Note that the semiconductor device 2G illustrated in FIG. 14 has a structure in which the semiconductor device 2A and the semiconductor device 2C are stacked, but it is added that the semiconductor device to be stacked is not limited.

2A〜2G 半導体装置
4 素子部
6 放熱部
10 実装基板
11,11a,11b ベアチップ
12 支持体
13 可撓性回路基板
15a 支持体側開口部
15b ベアチップ側開口部
21 放熱材
22 導熱シート
23 脚部
24 放熱部
25 脚部
2A to 2G Semiconductor device 4 Element part 6 Heat radiation part 10 Mounting board 11, 11a, 11b Bare chip 12 Support body 13 Flexible circuit board 15a Support body side opening part 15b Bare chip side opening part 21 Heat radiation material 22 Heat conduction sheet 23 Leg part 24 Heat radiation Part 25 Leg

Claims (10)

実装基板に搭載されるベアチップを備えた半導体装置であって、
前記ベアチップと概ね同じ厚みで、かつ、当該ベアチップに隣接して配置された支持体と、
前記ベアチップ及び前記支持体が搭載され、かつ、該ベアチップ及び該支持体を包むように折り曲げられる可撓性回路基板と、
前記ベアチップ及び前記支持体を包みこんだ前記可撓性回路基板の外面に熱接触して設けられた放熱部と、
前記可撓性回路基板を挿通して、当該可撓性回路基板で包まれた領域な内の熱を、該可撓性回路基板で囲まれた領域の外に導く脚部と、
を備えることを特徴とする半導体装置。
A semiconductor device comprising a bare chip mounted on a mounting substrate,
A support having a thickness substantially the same as that of the bare chip and disposed adjacent to the bare chip;
A flexible circuit board on which the bare chip and the support are mounted and bent so as to wrap the bare chip and the support;
A heat dissipating part provided in thermal contact with the outer surface of the flexible circuit board enclosing the bare chip and the support;
Legs that pass through the flexible circuit board and guide the heat in the area surrounded by the flexible circuit board to the outside of the area surrounded by the flexible circuit board;
A semiconductor device comprising:
請求項1に記載の半導体装置であって、
前記支持体に対向する前記可撓性回路基板における前記放熱部側の領域が開口されて、前記脚部が当該開口を挿通して、前記支持体と前記放熱部とを熱接続することを特徴とする半導体装置。
The semiconductor device according to claim 1,
A region on the heat radiation portion side of the flexible circuit board facing the support is opened, and the leg portion is inserted through the opening to thermally connect the support and the heat dissipation portion. A semiconductor device.
請求項1に記載の半導体装置であって、
前記支持体に対向する前記可撓性回路基板における前記実装基板側の領域が開口されて、前記脚部が当該開口を挿通して、前記支持体と前記実装基板とを熱接続することを特徴とする半導体装置。
The semiconductor device according to claim 1,
An area on the mounting board side of the flexible circuit board facing the support is opened, and the leg portion is inserted through the opening to thermally connect the support and the mounting board. A semiconductor device.
請求項1に記載の半導体装置であって、
前記ベアチップに対向する前記可撓性回路基板における前記放熱部側の領域が開口されて、前記脚部が当該開口を挿通して、前記ベアチップと前記放熱部とを熱接続することを特徴とする半導体装置。
The semiconductor device according to claim 1,
A region on the heat radiation part side of the flexible circuit board facing the bare chip is opened, and the leg part is inserted through the opening to thermally connect the bare chip and the heat radiation part. Semiconductor device.
請求項1に記載の半導体装置であって、
前記ベアチップに対向する前記可撓性回路基板における前記放熱部側の領域が開口されて、前記脚部が当該開口を挿通して、前記ベアチップと前記放熱部とを熱接続することを特徴とする半導体装置。
The semiconductor device according to claim 1,
A region on the heat radiation part side of the flexible circuit board facing the bare chip is opened, and the leg part is inserted through the opening to thermally connect the bare chip and the heat radiation part. Semiconductor device.
請求項1乃至5のいずれか1項に記載の半導体装置であって、
前記開口は矩形形状、楕円形状、円形状の少なくとも1つの形状に形成されていることを特徴とする半導体装置。
A semiconductor device according to any one of claims 1 to 5,
The semiconductor device is characterized in that the opening is formed in at least one of a rectangular shape, an elliptical shape, and a circular shape.
請求項1乃至6のいずれか1項に記載の半導体装置であって、
前記ベアチップ及び前記支持体を包む前記可撓性回路基板が複数積層されて、前記実装基板に搭載されていることを特徴とすることを特徴とする半導体装置。
The semiconductor device according to claim 1, wherein:
A semiconductor device, wherein a plurality of the flexible circuit boards that wrap around the bare chip and the support are stacked and mounted on the mounting board.
請求項1乃至7のいずれか1項に記載の半導体装置であって、
前記支持体は、Fe、NiとFeを含んだ合金、アルミニウム、アルミニウムを含んだ合金、銅、NiとCrを含んだ合金、Crを含んだ合金、シリコン、樹脂材料、雲母、マイカのうちいずれか1つの材料を含むことを特徴とする半導体装置。
A semiconductor device according to any one of claims 1 to 7,
The support may be any one of Fe, an alloy containing Ni and Fe, aluminum, an alloy containing aluminum, copper, an alloy containing Ni and Cr, an alloy containing Cr, silicon, a resin material, mica, and mica. A semiconductor device comprising one material.
請求項1乃至8のいずれか1項に記載の半導体装置であって、
前記ベアチップは、半導体IC、パッケージ化された電子部品、コンデンサ、抵抗、インダクタのいずれか1つを含むことを特徴とする半導体装置。
A semiconductor device according to any one of claims 1 to 8,
The bare chip includes one of a semiconductor IC, a packaged electronic component, a capacitor, a resistor, and an inductor.
請求項1乃至9のいずれか1項に記載の半導体装置を搭載した電子機器。   An electronic device in which the semiconductor device according to claim 1 is mounted.
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Cited By (5)

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Publication number Priority date Publication date Assignee Title
JP2019165146A (en) * 2018-03-20 2019-09-26 Necプラットフォームズ株式会社 Semiconductor device and electronic apparatus
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