JP2015153966A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device which corresponds to high temperature and has high reliability.SOLUTION: A semiconductor device comprises: an insulating substrate 4; and semiconductor elements (IGBT2, SBD3) bonded to the insulating substrate 4 via sintered bonding parts 5 by sintering reaction. Each sintered bonding part 5 is formed on an inner region at a distance from an outer periphery (lateral face S2) of the semiconductor element. Or in a manufacturing method, a bonding materia, 5P is arranged so as to fall within an inner range at a distance from the outer periphery of the semiconductor.

Description

  The present invention relates to a semiconductor device used for power control, and more particularly, to a configuration and a manufacturing method of a semiconductor device in which a semiconductor element and a circuit board are bonded using a sinterable bonding material of metal particles.

  2. Description of the Related Art A vertical semiconductor chip (element) such as an IGBT, a diode, or a MOSFET is mounted on a power conversion semiconductor device used for motor inverter control or the like. In the case of a general semiconductor device, the back electrode of the semiconductor element and the substrate are bonded via a bonding material such as solder. Often done.

  A bonding material used in such a semiconductor device is required to have high heat resistance because the amount of heat generated by the semiconductor element tends to increase. However, a lead-free solder material having high heat resistance performance has not been found at present. Under such circumstances, application of a joining material to a semiconductor device using a sintering phenomenon of metal particles instead of solder is being studied (for example, see Patent Document 1). A joining material (sintered joining material) used in the sintering joining technique is composed of metal particles that are aggregates and organic components that cover the surfaces of the metal particles in order to suppress sintering at room temperature. The sintered joining material can decompose the organic component at a temperature lower than the melting point to advance the sintering phenomenon of the metal particles and form a metal bond with the member to be joined. Therefore, it has a feature that it has a heat resistance temperature equal to or higher than the bonding temperature with respect to the solder whose bonding temperature is the upper limit of the heat resistance temperature.

JP 2007-214340 A (paragraphs 0023 to 0024, FIGS. 1 to 3)

  However, the sintered bonding material differs greatly in manufacturing process from the conventional solder materials in that it is necessary to pressurize the bonded members simultaneously with heating during bonding. And in the part where pressurization is not given, the sintering phenomenon does not proceed sufficiently, and the bonding state of the metal particles becomes weak and fragile. On the other hand, in the joining process, a part of the sintered joining material supplied in a range equal to or larger than the area of the member to be joined may protrude from a region to be joined. Since the pressure is not sufficiently applied to the protruding sintered joint material, unstable and brittle metal pieces remain around the joint. Such a metal piece falls off during the subsequent manufacturing process and during use of the product after manufacturing, causing a malfunction of the module and reducing the reliability of the semiconductor device.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a highly reliable semiconductor device that can cope with high temperatures.

  A semiconductor device according to the present invention includes a circuit board and a semiconductor element bonded to the circuit board via a bonding part by a sintering reaction, and the bonding part is spaced from the outer periphery of the semiconductor element. It is formed in an inner region.

  A method of manufacturing a semiconductor device according to the present invention includes a step of supplying a sinterable bonding material to at least one of a semiconductor element and a circuit board, and the semiconductor element is mounted on the circuit board so as to sandwich the bonding material. And a step of sintering and bonding the semiconductor element and the circuit board by pressurizing and heating the bonding material via the semiconductor element and the circuit board. In the step of placing at the predetermined position, the bonding material is supplied so that the bonding material falls within an inner range spaced from the outer periphery of the semiconductor element.

  According to the present invention, since the joint portion made of sintered metal is constituted only by a sufficiently pressurized portion, it is possible to perform strong joining without dropping off the metal piece, corresponding to high temperature, and reliability. A semiconductor device with a high level can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view for explaining the configuration of a semiconductor device according to a first embodiment of the present invention and a partially enlarged view thereof. It is the schematic sectional drawing for demonstrating the structure of the conventional semiconductor device, and its partial enlarged view. It is a schematic sectional drawing for demonstrating the deformation | transformation of the semiconductor element at the time of joining accompanying the protrusion of the semiconductor element from joining material. It is a figure which shows the relationship between the protrusion amount from the joining material of a semiconductor element, and the largest bending stress to generate | occur | produce. It is a cross-sectional schematic diagram for each step for explaining the method for manufacturing a semiconductor device according to the first exemplary embodiment of the present invention. It is the schematic sectional drawing for demonstrating the structure of the semiconductor device concerning Embodiment 2 of this invention, and its partial enlarged view. FIG. 4 is a partial plan view and a partial cross-sectional schematic diagram for explaining a configuration of a semiconductor device according to a second embodiment of the present invention. FIG. 6 is a partial plan view and a partial cross-sectional schematic view for explaining a configuration of a semiconductor device according to a first modification of the second embodiment of the present invention. It is the fragmentary top view and fragmentary sectional schematic diagram for demonstrating the structure of the semiconductor device concerning the 2nd modification of Embodiment 2 of this invention. It is the schematic sectional drawing for demonstrating the structure of the semiconductor device concerning Embodiment 3 of this invention, and its partial enlarged view. It is an expanded sectional schematic diagram for every process for demonstrating the manufacturing method of the semiconductor device concerning Embodiment 3 of this invention.

Embodiment 1 FIG.
1 to 5 are diagrams for explaining the configuration of the semiconductor device according to the first embodiment of the present invention. FIG. 1 is a schematic cross-sectional view showing the characteristic configuration of the semiconductor device according to the first embodiment. FIGS. 2A and 2B are an enlarged view of a region A portion in FIG. 2A, FIG. 2A is a schematic cross-sectional view showing a configuration of a conventional semiconductor device as a comparative example, and FIG. FIGS. 3B and 3B are schematic cross-sectional views for explaining deformation of the semiconductor element when the semiconductor element protrudes from the bonding material in the bonding step, and FIG. 4 shows the amount of protrusion of the semiconductor element from the bonding material. It is a figure which shows the relationship with the maximum bending stress. 5A to 5C are schematic cross-sectional views for each process for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

  As shown in FIG. 1, the semiconductor device 1 according to the first embodiment of the present invention has a MOSFET (Metal) as a semiconductor element with respect to an insulating substrate 4 on which conductor patterns 41 and 43 are formed on both sides of an insulating layer 42. -Oxide Semiconductor Field-Effect Transistor) 2 and SBD (Schottky Barrier Diode: Schottky Diode) 3 back electrodes (drain electrode 2d, cathode electrode 3c) are respectively formed by sintered joints 5 formed by a sintering joining technique. It has been joined. The feature of the semiconductor device 1 according to the first embodiment of the present invention is that the sintered joint portion 5 is included in the MOSFET 2 and the SBD 3 (there is no distinction between them and may be simply referred to as a semiconductor chip) leaving a margin. In other words, the electrodes of the semiconductor chip protrude along the outer periphery of the sintered joint 5 at intervals.

  A wiring member (not shown) is connected to the conductor pattern 41 on the front side of the insulating substrate 4 to which the semiconductor chip is bonded. Also, a wiring member (not shown) is joined to the source electrode 2s as the main electrode on the surface side of the MOSFET 2, the gate electrode 2g as the control electrode, and the anode electrode 3a on the surface side of the SBD so as to be electrically connected to an external circuit. However, since it is not a feature of the present invention, the description is omitted. Further, a description of a heat dissipating member such as a heat spreader provided on the conductor pattern 43 side of the insulating substrate 4 or a member provided in a general semiconductor device such as a sealing body or a case covering a semiconductor element is omitted. .

  Joining materials that use the sintering phenomenon are sintered joining materials that use the phenomenon that the metal sinters at a temperature lower than the melting point shown by the bulk due to the reactivity of metal fine particles (metal nanoparticles) at the nanometer level. is there. However, due to the high reactivity of metal nanoparticles, sintering proceeds just by contacting them at room temperature. Therefore, in the sintered bonding material, the metal nanoparticles are held by the organic dispersion material for dispersing and holding the metal nanoparticles in an independent state in order to suppress the aggregation of the metal nanoparticles and the progress of the sintering reaction. Further, in order to cause a sintering reaction in the joining process, the dispersion trapping material that reacts with the organic dispersion material by heating to bare the metal nanoparticles, and the reactants of the dispersion material and the dispersion material trapping material are captured. Volatile organic components that volatilize are added. In other words, the sintered bonding material is a paste in which metal nanoparticles as an aggregate are dispersed in an organic component, or a sheet-like material obtained by drying the above paste. Sintering is achieved by supplying and heating between desired members to be joined.

  The metal nanoparticles used as the aggregate may be single metals classified as noble metals such as gold (Au), silver (Ag), copper (Cu), palladium (Pd), platinum (Pt), Ag—Pd, Au. Any of alloy compositions such as -Si, Au-Ge and Au-Cu may be used. The sintered bonding material containing such metal nanoparticles has a volume of the bonded portion after bonding of about 1/2 to the volume of the initial paste due to decomposition of the organic component and sintering of the nanoparticles. It decreases to about 1/4. Therefore, in order to obtain a highly reliable joint with few voids, it must be heated while being pressurized during joining. As described above, in order to use the sintered joining technique, a semiconductor device structure capable of pressurizing the joining portion (sintered joining material) is required.

  Here, an example in the case of joining with a sintered metal in a conventional semiconductor device will be described. In the conventional semiconductor device 1 </ b> C, as shown in FIG. 2, the back electrode of the semiconductor chip does not protrude from the sintered joint portion 5 </ b> C and is contained in the sintered joint portion 5 </ b> C. For this reason, the unjoined end portion 5a of the sintered joint portion 5C protrudes from the electrode of the semiconductor chip and cannot be pressurized through the semiconductor chip even in the joining process, so the unjoined end portion 5a is very brittle and falls off. It remains as a metal piece that is easy to do. Therefore, if the remaining metal piece falls off after the subsequent manufacturing process or manufacturing is completed, for example, adheres to the insulating portion, insulation failure occurs. Or if it adheres to a wiring part, a short circuit will be produced and a malfunction will be produced.

  However, as shown in FIG. 1, in the semiconductor device 1 according to the first embodiment of the present invention, the semiconductor chip 1 is arranged so that the sintered joint portion 5 is within the range of the electrode (joint surface F2) of the semiconductor chip. However, it protrudes along the outer periphery of the sintered joint 5. Therefore, when the pressure is applied in the bonding process, the entire sintered bonded portion 5 (bonding material 5P) is sufficiently pressed and strongly sintered through the semiconductor chip. The joining end portion 5a hardly occurs. Therefore, it is possible to greatly reduce the frequency of occurrence of malfunctions in the power semiconductor device due to the dropout of the metal piece such as the unjoined end portion 5a. For this reason, when joining a semiconductor chip and a circuit board (insulating substrate 4), it becomes possible to use a sintered joining material excellent in high heat resistance instead of the conventional solder, and as a result, power control is performed like a power module. The heat resistance of the semiconductor device can be improved.

  In determining the protruding amount of the electrode of the semiconductor chip with respect to the outer periphery of the sintered joint portion 5 (the amount of the sintered joint portion 5 drawn from the back electrode of the semiconductor chip), it is important to prevent cracking of the semiconductor chip in the joining process. is there. As shown in FIG. 3, when the semiconductor chip (MOSFET 2 in the figure) is bonded to the insulating substrate 4, it is sandwiched between pressing plates (heating press stage 61a, heating press tool 61b). At this time, the cushion material 62 is interposed in order to prevent unevenness in thickness (uniform load) and damage to the semiconductor chip. Then, the portion protruding from the sintered joint portion 5 of the semiconductor chip (lower side in the figure) has no support, and is in a cantilever state where a force is applied unilaterally from the cushion material 62 side (upper side in the figure). , Deflection occurs.

Here, assuming that the protruding amount of the electrode of the semiconductor chip from the sintered joint 5 is S, the Young's modulus of the semiconductor chip is E, the thickness is t, and the pressure applied to the semiconductor chip at the time of bonding is P, the surface of the semiconductor chip The maximum bending stress σ _max generated in the above can be simply expressed as shown in Equation (1).
σ _max = 3PS ⁴ / 2Et ³ (1)

In Expression (1), assuming that the pressure P and the state of the semiconductor chip itself (thickness t, Young's modulus E) are constant, the relationship between the protruding amount S from the joint and the maximum bending stress σ _max is as shown in FIG. Become. In FIG. 4, the horizontal axis represents the protrusion amount S from the joint, and the vertical axis represents the maximum bending stress σ _max . As the protrusion amount S increases, the maximum bending stress σ _max increases, and as the protrusion amount S increases, the change in the maximum bending stress σ _{max with} respect to the change in the protrusion amount S increases.

In order to prevent cracking of the semiconductor chip in the bonding process, it is necessary to keep the maximum bending stress σ _max generated on the surface of the semiconductor chip during bonding so as to be smaller than the bending strength σ _b of the semiconductor chip itself. 2) It is necessary to satisfy.
σ _max = 3PS ⁴ / 2Et ³ <σ _b (2)

  In addition, when using a semiconductor chip based on SiC called a wide band gap semiconductor material, if the protruding amount S is adjusted so as to fall within the range of 0.02 mm to 1.0 mm, the crack of the semiconductor chip is prevented. I found that it can be prevented.

  Next, a method for manufacturing the semiconductor device 1 described above (described with reference to FIG. 1) will be described with reference to FIG. First, as shown in FIG. 5 (a), the sintered joint portion 5 and the predetermined portion on the surface F4 of the conductor pattern 41 of the insulating substrate 4, the back surface electrode (joint surface F2) of the semiconductor chip, or both. For example, a paste-like bonding material 5P is supplied. At this time, the region where the bonding material 5P is supplied is a region narrowed so that the above-described protrusion amount S can be obtained from the range where the semiconductor chip back electrode is placed (the outer periphery of the semiconductor chip).

  Subsequently, as shown in FIG. 5B, the semiconductor chips (MOSFET 2 and SBD 3) are aligned and placed. Here, when a paste-like material is used for the bonding material 5P, it is desirable to provide a pre-drying step before the main bonding. The preliminary drying step may be performed either before or after placing the semiconductor chip on the insulating substrate 4. However, since the bonding material 5P does not have an adhesive force enough to temporarily fix the insulating substrate 4 and the semiconductor chip, when the semiconductor chip is preliminarily dried before placing the semiconductor chip on the insulating substrate 4, a sintering reaction is caused. There may be a step of temporarily fixing by applying a low temperature and a low load that do not start.

  On the other hand, when a sheet-like material is used as the bonding material 5P, the bonding material 5P is formed into a size that can be accommodated in the above-described region, and is placed between the insulating substrate 4 and the semiconductor chip. Also in this case, since the bonding material 5P does not have adhesive strength to temporarily fix the insulating substrate 4 and the semiconductor chip, there is a step of temporarily fixing by applying a low temperature and a low load that do not start the sintering reaction. May be.

  Subsequently, as shown in FIG. 5 (c), a heating press device (not shown) having a heating press stage 61a and a heating press tool 61b is used and heated to 200 to 350 ° C. while applying a load via the cushion material 62, A heating and pressing step is executed. The pressing force applied to the sintered joint 5 (or the bonding material 5P) by the hot press device is applied via the semiconductor chip. Therefore, if the sintered joint 5 protrudes from the back electrode of the semiconductor chip, the sintering is performed. It was difficult to pressurize the entire joint 5. Therefore, in this Embodiment 1, since the electrode of a semiconductor chip protrudes along the outer peripheral part of the sintered joining part 5, the whole sintered joining part 5 can fully be pressurized and sintered.

  In addition, although the example using MOSFET2 and SBD3 was shown as a power semiconductor element, it is not restricted to this, IGBT (Insulated Gate Bipolar Transistor) or other things are applicable. As the semiconductor material, it is preferable to use a silicon (Si), silicon carbide (SiC), or gallium nitride (GaN) -based material known as a power device material. Among these, SiC is a wide band gap semiconductor material, has a high electric field strength that leads to dielectric breakdown, has excellent thermal conductivity, heat resistance, chemical resistance, and has higher radiation resistance than Si semiconductors. preferable. In addition to SiC, gallium nitride-based materials and diamond are also called wide band gap semiconductor materials, which have a wider band gap and superior heat resistance than Si semiconductors. For this reason, when a semiconductor element formed of a wide band gap semiconductor material is used, the operating temperature range is also increased, and the effect of the present invention becomes more remarkable.

  As described above, according to the semiconductor device 1 according to the first embodiment of the present invention, the circuit board (insulating substrate 4) and the joint part (sintered joint part 5) by the sintering reaction to the circuit board (insulating substrate 4). ), And a bonding portion (sintered bonding portion 5) is formed in an inner region spaced from the outer periphery (side surface S2) of the semiconductor element. Since the sintered joint portion 5 is formed only by a sufficiently pressurized portion, it is possible to perform a strong joint without dropping off a metal piece such as the unjoined end portion 5a, A highly reliable semiconductor device 1 that can cope with high temperatures can be obtained.

At that time, since the interval (projection amount S) is configured to be in the range of 0.02 mm to 1.0 mm, the maximum bending stress σ _max applied to the portion protruding from the sintered joint portion 5 of the semiconductor chip is set as the semiconductor chip. It can be kept smaller than its own bending strength σ _b , and the semiconductor chip is not damaged during bonding. That is, the yield is increased and the reliability is improved.

  Further, according to the method for manufacturing the semiconductor device 1 according to the first embodiment, the step of supplying the sinterable bonding material 5P to at least one of the semiconductor element (IGBT2, SBD3) and the circuit board (insulating substrate 4). And the step of placing the semiconductor element at a predetermined position on the circuit board (insulating substrate 4) so as to sandwich the bonding material 5P, and the bonding material 5P through the semiconductor element and the circuit board (insulating substrate 4). And a sintering joining step of joining the semiconductor element and the circuit board (insulating substrate 4) by pressurization and heating, and in the step of placing at a predetermined position, a distance from the outer periphery (side surface S2) of the semiconductor chip is set. Since the joining material 5P is supplied so that the joining material 5P can be accommodated in the inner range, the sintered joint portion 5 is formed only by a sufficiently pressurized portion. Metal like part 5a There without falling off, it is possible to strong bonding, corresponding to a high temperature, it is possible to obtain a highly reliable semiconductor device 1.

Embodiment 2. FIG.
In the semiconductor device according to the second embodiment, a metal piece capturing portion that captures a metal piece that has fallen off from the sintered joint portion is formed in a region surrounding the sintered joint portion on the surface of the conductor pattern. 6 and 7 are diagrams for explaining the configuration of the semiconductor device according to the second embodiment of the present invention. FIG. 6 is a schematic cross-sectional view (a) and (a) showing the characteristic configuration of the semiconductor device. FIG. 7B is a partial plan view and a schematic cross-sectional schematic view of the semiconductor device showing the mounting range of the semiconductor chip for explaining the formation range of the metal piece capturing portion. FIG. 8 is a partial plan view and schematic cross-sectional view of the semiconductor device showing the mounting range of the semiconductor chip, in order to explain the formation range of the metal piece capturing portion in the semiconductor device according to the first modification. These are the partial top view and schematic sectional drawing of the semiconductor device which showed the mounting range of the semiconductor chip, in order to demonstrate the formation range of the metal piece capture | acquisition part in the semiconductor device concerning a 2nd modification. In the figure, the same components as those described in the first embodiment are denoted by the same reference numerals, and redundant description is omitted.

  As shown in FIGS. 6 and 7, the semiconductor device 1 according to the second embodiment is sintered so as to surround a region connected to the sintered joint 5 on the surface F <b> 4 of the conductor pattern 41 of the insulating substrate 4. A groove-shaped metal piece capturing portion 4w for capturing the metal piece 5d that has fallen off from the joint portion 5 is formed. Other configurations are the same as in the first embodiment, and the electrodes 2d and 3c of the MOSFET 2 and SBD 3 which are semiconductor elements protrude along the outer peripheral portion of the sintered joint portion 5 so as to leave a margin.

  The metal piece capturing portion 4w has a groove shape provided in a rectangular shape so as to surround the sintered joint portion 5, and is formed so as to straddle the outer periphery (side surface S2) of the semiconductor chip in the width direction. As a result, the metal piece 5d that has unexpectedly dropped from the end portion 5b of the sintered joint portion 5 is captured and captured in the groove shape, and can be prevented from scattering to the surroundings. In addition, although the metal piece capture | acquisition part 4w was taken as the rectangular groove shape provided so that the sintered junction part 5 might be enclosed, it is not restricted to this, A V shape or U shape may be sufficient, or The following modifications are also applicable.

<First modification>
As a first modified example, as shown in FIG. 8, a plurality of dimple-like minute recesses are provided so as to surround the sintered joint portion 5. In the figure, for the sake of simplification, the dents are described so as to be double-wrapped inside and outside the outer periphery (side surface S2) of the semiconductor chip, but this is not restrictive. Further, when a straight line is drawn outward from the sintered joint 5 on the conductor pattern 41, the positions of the plurality of recesses are shifted so that the sintered joint 5 is multiplexed. If the metal piece 5d is enclosed, the dropped metal piece 5d is caught in any of the recesses, and the metal piece 5d can be efficiently caught.

<Second modification>
As a second modification, as shown in FIG. 9, a roughened region was provided so as to surround the sintered joint portion 5. The roughening method may be any method such as etching, sand blasting, mechanical polishing, etc. However, if the surface roughness is 1.5 (μm) or more in terms of arithmetic average roughness Ra, the metal can be efficiently used. It has been confirmed that the piece 5d can be captured. When the sintered joint 5 is surrounded by the roughened region in this way, the metal piece 5d dropped from the end 5b of the sintered joint is easily mechanically coupled to the roughened surface and scattered around. Can be prevented.

  As described above, according to the semiconductor device according to the second embodiment of the present invention, the joint (sintered joint 5) is provided on the surface F4 of the circuit board (insulating substrate 4: strictly speaking, the conductor pattern 41). Since the metal piece catching portion 4w for catching the metal piece 5d detached from the sintered joint portion 5 is formed so as to surround the portion to be formed, the metal piece 5d is unexpectedly formed from the end portion 5b of the sintered joint portion 5. Even if it falls off, it can prevent scattering to the surroundings.

  Since the metal piece capturing portion 4w is a groove surrounding the portion where the sintered joint portion 5 is formed, the metal piece 5d can be captured in the groove.

  Or since the metal piece capture | acquisition part 4w is a several dent arrange | positioned so that the part in which the sintered junction part 5 was formed may be enclosed, the movement of the metal piece 5d can be prevented and captured.

  Alternatively, since the metal piece capturing portion 4w is a roughened region formed so as to surround the portion where the sintered joint portion 5 is formed, it can be combined with the metal piece 5d and prevented from scattering.

  Since the arithmetic average roughness Ra of the roughened region (metal piece capturing portion 4w) is 1.5 or more, it can be surely combined with the metal piece 5d and prevented from scattering.

Embodiment 3 FIG.
In the semiconductor device according to the third embodiment, a surface coating that is not bonded to the sintered joint is formed in a region surrounding the sintered joint on the surface of the conductor pattern. 10 and 11 are diagrams for explaining the configuration and manufacturing method of the semiconductor device according to the third embodiment of the present invention. FIG. 10 is a schematic cross-sectional view (a) showing a characteristic configuration of the semiconductor device. FIG. 11B is an enlarged view of the region A in FIG. 11A, and FIG. 11A and FIG. 11B are schematic cross-sectional views for each step for explaining the method for manufacturing the semiconductor device according to the third embodiment of the present invention. It is. In the figure, the same components as those described in the first embodiment are denoted by the same reference numerals, and redundant description is omitted.

  As shown in FIG. 10, in the semiconductor device 1 according to the third embodiment, a region surrounding a portion connected to the sintered joint 5 on the surface F <b> 4 of the conductor pattern 41 of the insulating substrate 4 is sintered. It is made to cover with the surface film 4c which is not couple | bonded with (it is easy to release). Other configurations are the same as in the first embodiment, and the electrodes 2d and 3c of the MOSFET 2 and SBD 3 which are semiconductor elements protrude along the outer peripheral portion of the sintered joint portion 5 so as to leave a margin. On the other hand, in the manufacturing method, as will be described later, a step of removing a part of the sintered joint portion 5 is added, but the other steps are the same as those in the first embodiment.

  The surface coating 4c shown in FIG. 10 is provided so as to cover a region surrounding a region connected to the sintered joint portion 5 on the surface F4 of the conductor pattern 41 of the insulating substrate 4. As the surface coating 4c, a stable oxide coating that is not metallically bonded to the sintered joint 5 (or metal particles in the joining material 5P) such as nickel (Ni), titanium (Ti), aluminum (Al), etc. is formed on the surface. The material to be formed can be used. Alternatively, it may be an organic material such as polyimide or fluororesin that itself is not metallically bonded to the sintered joint 5 (or the metal particles in the joining material 5P), or a ceramic material. Since the surface coating 4c formed of any material should not be altered such as thermal decomposition or melting at the heating temperature at the time of joining, it is selected from those having a melting point or a thermal decomposition temperature of at least 200 ° C. There is a need.

  In the manufacturing process, after performing the sinter bonding, as described above, a process of removing a part of the sintered joint portion 5 is performed. When the semiconductor chip is bonded to the insulating substrate 4, as shown in FIG. 11A, even when the surface coating 4c is formed, the end 5b of the sintered bonded portion 5 is the outer periphery (side surface S2) of the semiconductor chip. May protrude beyond the outside. Even if such a state occurs, as shown in FIG. 11 (b), by removing the end portion 5b on the surface coating 4c after bonding, there is no portion with a high possibility of dropping.

  As a removing method, any of a method of blowing a gas such as air blow, a method of blowing a liquid such as water pressure, or a method of removing mechanically may be used. Even when the surface coating 4c is not formed, it is effective to perform the step of removing the end portion 5b protruding from the semiconductor chip. However, if the region surrounding the portion to be joined with the sintered joint 5 is covered with the surface coating 4c in advance, the end portion 5b protruding from the semiconductor chip will not be bonded to the surface coating 4c, so that the semiconductor chip is scratched. However, it can be easily removed by the above method. Therefore, it is possible to prevent the end portion 5b from being accidentally dropped in the subsequent manufacturing process or the manufactured product.

  As described above, according to the semiconductor device 1 according to the third embodiment of the present invention, the process includes a step of removing a portion protruding from the outer periphery of the semiconductor chip out of the sintered metal generated in the sintering joining process. As a result, there is no portion that is easily detached from the sintered joint portion 5, and for example, the metal piece 5d is not accidentally dropped from the end portion 5b of the sintered joint portion 5.

  Further, a step of covering a portion around a region corresponding to an inner range spaced from the outer periphery of the semiconductor chip on the circuit board (insulating substrate 4) with a material not bonded to the bonding material 5P (forming the surface coating 4c). However, since it is executed at least prior to the step of placing it at a predetermined position, the portion of the sintered joint 5 that protrudes from the outer periphery of the semiconductor chip can be easily removed.

1: semiconductor device, 2: MOSFET (semiconductor element), 2g: gate electrode, 2s: source electrode (front surface main electrode), 2d: drain electrode (back surface main electrode), 3: SBD (semiconductor element), 3a: anode electrode (Front surface main electrode), 3c: cathode electrode (back surface main electrode), 4: circuit board, 4c: surface coating, 4w: metal piece capturing part, 41: first conductor pattern, 42: insulating layer, 43: second 5a: unjoined end of the sintered joint, 5b: end of the sintered joint, 5d: dropout, 5P: joining material,
61: heating press device, 61a: heating press stage, 61b: heating press tool, 62: cushion material (buffer material),
F2: bonding surface of the semiconductor chip, F4: surface of the conductor pattern (insulating substrate), S: protrusion amount (interval), S2: side surface (outer periphery) of the semiconductor chip.

Claims (13)

A circuit board;
A semiconductor element joined to the circuit board via a joining part by a sintering reaction,
The semiconductor device according to claim 1, wherein the junction is formed in an inner region spaced from the outer periphery of the semiconductor element.   The semiconductor device according to claim 1, wherein the interval is in a range of 0.02 mm to 1.0 mm.   2. A metal piece catching portion for catching a metal piece detached from the joint portion is formed on a surface of the circuit board so as to surround a portion where the joint portion is formed. 2. The semiconductor device according to 2.   The semiconductor device according to claim 3, wherein the metal piece capturing portion is a groove surrounding a portion where the joint portion is formed.   The semiconductor device according to claim 3, wherein the metal piece capturing part is a plurality of recesses arranged so as to surround a portion where the joint part is formed.   The semiconductor device according to claim 3, wherein the metal piece capturing portion is a roughened region formed so as to surround a portion where the joint portion is formed.   The semiconductor device according to claim 6, wherein an arithmetic average roughness Ra of the roughened region is 1.5 or more.   3. The semiconductor device according to claim 1, wherein a region surrounding the portion where the joint portion of the circuit board is formed is covered with a material that is not coupled to the joint portion.   9. The semiconductor device according to claim 1, wherein the semiconductor element is made of a wide band gap semiconductor material.   The semiconductor device according to claim 9, wherein the wide band gap semiconductor material is any one of silicon carbide, a gallium nitride-based material, and diamond. Supplying a sinterable bonding material to at least one of the semiconductor element and the circuit board;
Placing the semiconductor element at a predetermined position on the circuit board so as to sandwich the bonding material;
Pressurizing and heating the bonding material through the semiconductor element and the circuit board, and heating and bonding the semiconductor element and the circuit board; and
In the step of placing at the predetermined position, the bonding material is supplied so that the bonding material falls within an inner range spaced from the outer periphery of the semiconductor element. .   The method for manufacturing a semiconductor device according to claim 11, further comprising: removing a portion protruding from an outer periphery of the semiconductor element among sintered metals generated in the sintering joining step.   The step of covering a portion around a region corresponding to the inner range of the circuit board with a material that is not bonded to the bonding material is performed prior to the step of placing at least the predetermined position. Item 13. A method for manufacturing a semiconductor device according to Item 11 or 12.

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