JP2015126002A - Power module substrate, method of manufacturing the same, and power module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power module substrate, a method of manufacturing the same, and a power module, capable of reducing an electric resistance value between a semiconductor element bonded via an Ag burned layer formed on a circuit layer, and the circuit layer.SOLUTION: An alloy part 35 formed of an Ag-Al alloy is formed along four sides of an Ag layer 32, in a peripheral region of an Ag burned layer 30. That is, the alloy part 35 is formed in such a substantially square shape that surrounds the Ag layer 32 (and a glass layer 31 formed below). Such the alloy part 35 is directly connected with the circuit layer 12, and makes the Ag layer 32 and the circuit layer 12 electrically conductive with each other without intervening the glass layer 31. Thereby, the Ag layer 32 is electrically connected with the circuit layer 12 by the alloy part 35 with a low electric resistance value rather than the glass layer 31 with a relatively high electric resistance value.

Description

  The present invention relates to a power module substrate in which a circuit layer is formed on one surface of an insulating layer, a manufacturing method thereof, and a power module in which a semiconductor element is bonded on the circuit layer.

Among various semiconductor elements, for example, a power element for high power control used for controlling an electric vehicle or an electric vehicle has a large amount of heat generation. As a substrate on which such a power element for controlling high power is mounted, for example, a power module substrate in which a metal plate having excellent conductivity is bonded as a circuit layer on a ceramic substrate made of AlN (aluminum nitride) or the like has been widely used. It is used.
In such a power module substrate, a semiconductor element as a power element is mounted on the circuit layer via a solder material (see, for example, Patent Document 1).

As the metal constituting the circuit layer, aluminum or an aluminum alloy, or copper or a copper alloy is generally used.
Here, in the circuit layer made of aluminum, since a natural oxide film of aluminum is formed on the surface, it is difficult to perform good bonding with the solder material.

On the other hand, as a joining method that does not use a solder material, for example, Patent Document 2 proposes a technique for joining semiconductor elements using Ag nanopaste.
Further, for example, Patent Documents 3 and 4 propose a technique for joining semiconductor elements using an oxide paste containing metal oxide particles and a reducing agent made of an organic substance without using a solder material.

  However, as disclosed in Patent Document 2, when a semiconductor element is bonded using an Ag nano paste without using a solder material, the bonding layer made of the Ag nano paste has a thickness larger than that of the solder material. Since it is formed thin, the stress at the time of thermal cycle load tends to act on the semiconductor element, and the semiconductor element itself may be damaged.

  In addition, as disclosed in Patent Documents 3 and 4, when a semiconductor element is bonded using a metal oxide and a reducing agent, the fired layer of the oxide paste is still formed thinly. The stress at the time of thermal cycle load tends to act on the semiconductor element, and the performance of the power module may be deteriorated.

  Therefore, for example, in Patent Documents 5 to 7, after forming an Ag fired layer on a circuit layer made of aluminum or copper using a glass-containing Ag paste, the circuit layer and the semiconductor element are bonded via a solder material or an Ag paste. Techniques for joining have been proposed. In this technique, a glass-containing Ag paste is applied to the surface of a circuit layer made of aluminum or copper and baked, whereby the oxide film formed on the surface of the circuit layer is removed by reacting with the glass to bak the Ag. A layer is formed, and a semiconductor element is joined via a solder material on the circuit layer on which the Ag fired layer is formed.

  Here, the Ag fired layer includes a glass layer formed by reacting glass with an oxide film of a circuit layer, and an Ag layer formed on the glass layer. Conductive particles are dispersed in the glass layer, and conduction of the glass layer is secured by the conductive particles.

JP 2004-172378 A JP 2008-208442 A JP 2009-267374 A JP 2006-202938 A JP 2010-287869 A JP 2012-109315 A JP 2013-012706 A

By the way, in order to improve the bonding reliability between the circuit layer and the Ag fired layer, it is effective to increase the glass content in the glass-containing Ag paste.
However, when the glass content in the glass-containing Ag paste is increased, the glass layer becomes thicker in the Ag fired layer. Even when conductive particles are dispersed, the glass layer has a higher electrical resistance than an Ag layer or the like. For this reason, the electrical resistance value of the Ag fired layer tends to increase as the glass layer becomes thicker, and it is difficult to balance both the bonding reliability and the electrical resistance value. When the electrical resistance value of the Ag fired layer is high in this way, when the circuit layer on which the Ag fired layer is formed and the semiconductor element are joined via a solder material or the like, electricity is supplied between the circuit layer and the semiconductor element. There was a possibility that it could not flow well.

  The present invention has been made in view of the above-described circumstances, and includes a semiconductor element and a circuit layer bonded via an Ag fired layer including a glass layer and an Ag layer formed on the circuit layer. It is an object of the present invention to provide a power module substrate, a method for manufacturing the same, and a power module that can reduce the electrical resistance value between them.

In order to solve the above problems, some aspects of the present invention provide the following power module substrate, method for manufacturing the same, and power module.
That is, the power module substrate of the present invention includes a circuit layer made of Al or Al alloy formed on one surface of the insulating layer and an Ag fired layer formed on the circuit layer. The Ag fired layer is composed of a glass layer, an Ag layer formed on the glass layer, Ag and Al, and an alloy part that electrically connects the Ag layer and the circuit layer. It is characterized by providing.

  According to the power module substrate of the present invention, the alloy part that electrically connects the Ag layer and the circuit layer is formed. Since the alloy of Ag and Al constituting such an alloy part has a lower electrical resistance value than the glass layer in which the conductive particles are dispersed, even if a relatively high resistance glass layer is formed as the Ag fired layer, The electrical resistance between the circuit layer and the Ag layer is reduced by the alloy part, and it is possible to flow electricity well. Accordingly, in order to improve the bonding reliability between the circuit layer and the Ag fired layer, the electrical resistance value between the Ag layer and the circuit layer is lowered even if the glass layer is thickened by increasing the glass content. Therefore, it is possible to balance both the junction reliability and the electric resistance value.

The alloy part is formed outside an element bonding region where a semiconductor element is disposed.
With such a configuration, an alloy portion is not formed in a portion where the semiconductor element and the Ag fired layer overlap, so that the electrical resistance value between the Ag layer and the circuit layer can be lowered while keeping the bonding reliability of the semiconductor element high. it can.

When the Ag fired layer is viewed from above, the area ratio occupied by the alloy part is 1% or more and 20% or less with respect to the area obtained by removing the area of the element bonding region from the area of the entire Ag fired layer. By setting the area ratio of the alloy portion in the Ag fired layer to be within a predetermined range, the electrical resistance value between the Ag layer and the circuit layer can be kept high while maintaining high bonding reliability of the semiconductor element. Can be lowered.

The Ag fired layer has a substantially rectangular shape when viewed from above, and the alloy part is formed along four sides of the Ag layer, and the glass layer is located inside a region surrounded by the alloy part. It is desirable that it be formed.
With such a configuration, the electrical resistance value between the Ag layer and the circuit layer can be reduced evenly over the substantially rectangular Ag fired layer.

The alloy part is a solid solution of Ag-Al or an intermetallic compound of Ag-Al.
The alloy part is a solid solution of Ag-Al or an intermetallic compound of Ag-Al, so that stable and high conductivity can be maintained, and the electrical resistance value between the Ag layer and the circuit layer can be stably reduced. Can do.

The Ag—Al intermetallic compound is a δ phase or a μ phase.
With such a configuration, the alloy part can maintain stable and high conductivity, and the electric resistance value between the Ag layer and the circuit layer can be stably reduced.

The Ag fired layer has an electrical resistance value in the thickness direction of 10 mΩ or less.
By reducing the electrical resistance value with such a configuration, a power module with less energization loss can be obtained.

  The power module of the present invention comprises the power module substrate according to each of the above items, and a semiconductor element disposed on one surface side of the Ag fired layer constituting the power module substrate, and the semiconductor element Is bonded to the Ag fired layer through a bonding layer.

  According to the power module of the present invention, the alloy part that electrically connects the Ag layer and the circuit layer is formed. Since the alloy of Ag and Al constituting such an alloy part has a lower electrical resistance value than the glass layer in which the conductive particles are dispersed, even if a relatively high resistance glass layer is formed as the Ag fired layer, The electrical resistance between the circuit layer and the Ag layer is reduced, and the electrical resistance value between the semiconductor element and the circuit layer can be kept low.

  The method for manufacturing a power module substrate according to the present invention includes a circuit layer made of Al or an Al alloy formed on one surface of an insulating layer, and an Ag fired layer formed on the circuit layer. A method for manufacturing a substrate, comprising: applying a glass-containing Ag paste on one surface of the circuit layer; and applying an Ag paste so that at least a part of the glass-containing Ag paste is applied to an application region. The 2nd application | coating process to apply | coat, the said glass-containing Ag paste, and the said Ag paste are baked, the glass layer, the Ag layer formed on this glass layer, Ag which comprises the said Ag paste, and the said circuit layer And a firing step for forming the alloy part made of an Al alloy diffused from the alloy part, the alloy part interposing the glass layer with the Ag layer and the circuit layer interposed therebetween. Characterized in that directly connected to.

  According to the method for producing a power module substrate of the present invention, the glass-containing Ag paste and the Ag paste are fired, the glass layer, the Ag layer formed on the glass layer, and the Ag constituting the Ag layer. And by providing the baking process which forms the alloy part which consists of an alloy with Al which comprises a circuit layer, a low resistance alloy part is formed rather than a glass layer with comparatively high resistance as an Ag baking layer. Since the Ag layer and the circuit layer are electrically connected by such an alloy part, the electrical resistance between the circuit layer and the Ag layer is reduced, and it is possible to flow electricity well. As a result, a method for manufacturing a power module substrate capable of reducing the electrical resistance between the circuit layer and the Ag layer can be realized.

  In the firing step, the firing temperature is desirably 567 ° C. or higher and 620 ° C. or lower. By setting the firing temperature to 567 ° C. or more and 620 ° C. or less, it is possible to reliably generate a liquid phase and form an alloy part.

  According to the present invention, a power module capable of reducing the electrical resistance value between a semiconductor element and a circuit layer bonded via an Ag fired layer formed on a circuit layer made of Al or an Al alloy. Board, a manufacturing method thereof, and a power module can be provided.

It is sectional drawing which shows the power module which concerns on one Embodiment of this invention. It is sectional drawing which shows the board | substrate for power modules of this invention. It is a principal part expanded sectional view which shows the junction part of Ag baking layer and a circuit layer. It is a top view when the board | substrate for power modules of this invention is seen from the upper surface. It is upper surface explanatory drawing which shows the measuring method of the electrical resistance value P of the thickness direction of Ag baking layer. It is side surface explanatory drawing which shows the measuring method of the electrical resistance value P of the thickness direction of Ag baking layer. It is a top view which shows the other form of an alloy part. It is the flowchart which showed in stepwise an example of the manufacturing method of the board | substrate for power modules of this invention. It is the principal part expanded sectional view which showed formation of Ag baking layer in steps. It is the principal part expanded sectional view which showed formation of Ag baking layer in steps. It is the principal part expanded sectional view which showed formation of Ag baking layer in steps.

  Hereinafter, a power module substrate, a manufacturing method thereof, and a power module of the present invention will be described with reference to the drawings. Each embodiment described below is specifically described for better understanding of the gist of the invention, and does not limit the present invention unless otherwise specified. In addition, in the drawings used in the following description, in order to make the features of the present invention easier to understand, there is a case where a main part is shown in an enlarged manner for convenience, and the dimensional ratio of each component is the same as the actual one. Not necessarily.

FIG. 1 is a cross-sectional view showing a power module provided with the power module substrate of the present invention.
The power module 1 in this embodiment includes a power module substrate 10 on which a circuit layer 12 is disposed, a semiconductor chip (semiconductor element) 3 bonded to the surface of the circuit layer 12 via a bonding layer 2, and a cooler. 40.

  The power module substrate 10 includes a ceramic substrate 11 constituting an insulating layer, a circuit layer 12 disposed on one surface 11a (upper surface in FIG. 1) of the ceramic substrate 11, and the other surface 11b of the ceramic substrate 11. And a metal layer 13 (on the lower surface in FIG. 1).

The ceramic substrate 11 prevents electrical connection between the circuit layer 12 and the metal layer 13. For example, AlN (aluminum nitride), Al ₂ O ₃ (aluminum oxide), Si, or the like having high insulating properties is used. _{3 N} 4 may be composed of such _(silicon nitride), the present embodiment uses the AlN. Moreover, the thickness of the ceramic substrate 11 is set within a range of 0.2 to 1.5 mm, for example, and as an example, is set to 0.635 mm in the present embodiment.

  The circuit layer 12 is formed by bonding a conductive metal plate to one surface 11 a of the ceramic substrate 11. The circuit layer 12 is made of Al or an alloy containing Al. In the present embodiment, the circuit layer 12 is formed, for example, by joining an aluminum plate made of a rolled plate of aluminum (so-called 4N aluminum) having a purity of 99.99 mass% or more to the ceramic substrate 11.

  The metal layer 13 is formed by bonding a metal plate to the other surface 11 b of the ceramic substrate 11. In the present embodiment, the metal layer 13 is formed by bonding an aluminum plate made of a rolled plate of aluminum (so-called 4N aluminum) having a purity of 99.99 mass% or more to the ceramic substrate 11, as with the circuit layer 12. Has been.

  The cooler 40 is for cooling the entire power module 1 by propagating the heat generated in the power module substrate 10 and dissipating it. Such a cooler 40 distribute | circulates the top plate part 41 joined with the board | substrate 10 for power modules, the radiation fin 42 hung downward from this top plate part 41, and a cooling medium (for example, cooling water). The flow path 43 is provided. The cooler 40 (top plate portion 41) is preferably made of a material having good thermal conductivity. In the present embodiment, it is made of, for example, A6063 (aluminum alloy).

  In the present embodiment, a buffer layer 15 made of aluminum, an aluminum alloy, or a composite material containing aluminum (for example, AlSiC) is provided between the top plate portion 41 of the cooler 40 and the metal layer 13. Yes.

A glass-containing Ag paste, which will be described later, and an Ag fired layer 30 obtained by firing the Ag paste are formed on the surface (upper surface in FIG. 1) 12a of the circuit layer 12, and the surface 12a of the Ag fired layer 30 is formed. In addition, the semiconductor chip 3 is bonded via the bonding layer 2.
An example of the bonding layer 2 is a solder layer. Examples of the solder material for forming the solder layer include Sn—Ag, Sn—In, and Sn—Ag—Cu.
As shown in FIG. 1, the Ag fired layer 30 is not formed on the entire surface of the circuit layer 12, and may be selectively formed only on a portion where the semiconductor chip 3 is disposed. The aluminum plate which comprises the circuit layer 12 is exposed to the periphery.

2 and 3 are cross-sectional views showing the power module substrate 10 before the semiconductor chip 3 is bonded via the bonding layer 2.
In the power module substrate 10, the aforementioned Ag fired layer 30 is formed on the surface (the upper surface in FIGS. 2 and 3) 12 a of the circuit layer 12. As shown in FIG. 3, the Ag fired layer 30 overlaps the glass layer 31 and the glass layer 31 formed on the circuit layer 12 side before the semiconductor chip 3 is bonded via the bonding layer 2. The Ag layer 32 formed as described above, and the alloy part 35 formed along the periphery of the glass layer 31 and the Ag layer 32 are provided.

The circuit layer 12 is made of aluminum having a purity of 99.99 mass%, but the surface of the circuit layer 12 (upper surface in FIG. 3) is an aluminum oxide film (oxide film: Al ₂ O ₃ ) that is naturally generated in the atmosphere. 12A. However, in the portion where the Ag fired layer 30 is formed, the aluminum oxide film 12A is removed by the reaction with the glass when the Ag fired layer 30 is formed.

  Therefore, in this portion (the portion of the circuit layer 12 overlapping the glass layer 31), the Ag fired layer 30 is formed directly on the circuit layer 12 without the aluminum oxide film 12A interposed therebetween. That is, the aluminum constituting the circuit layer 12 and the glass layer 31 are directly bonded.

  As for the glass layer 31 which comprises the Ag baking layer 30, the fine electroconductive particle 33 whose particle size is about several nanometer is disperse | distributed inside. The conductive particles 33 are, for example, crystalline particles containing at least one of Ag or Al.

  The Ag layer 32 constituting the Ag fired layer 30 is formed of a sintered body of silver particles of a glass-containing Ag paste, and may contain a small amount of glass particles inside.

  The alloy part 35 constituting the Ag fired layer 30 is made of an alloy of Ag and Al. Examples of such an alloy of Ag and Al include a solid solution of Ag—Al and an intermetallic compound of Ag—Al. In this embodiment, it is mainly composed of an Ag—Al intermetallic compound. Preferred examples of the intermetallic compound of Ag—Al include a δ phase or μ phase intermetallic compound in the known Ag—Al phase diagram. A method of forming such an alloy part 35 will be described in the manufacturing method.

  Such an alloy part 35 has a lower electrical resistance value than the glass layer 31 in which the conductive particles 33 are dispersed. For example, the electrical resistance value of the glass layer 31 in which the conductive particles 33 are dispersed is about 0.01Ω to 1.0Ω, whereas the electrical resistance value of the alloy portion 35 is about 1 mΩ to 10 mΩ.

FIG. 4 is a plan view of the power module substrate 10 before the semiconductor chip 3 is bonded via the bonding layer 2 when viewed from above.
The Ag fired layer 30 is formed on a part of the circuit layer 12 so as to form a substantially rectangular shape, for example, a rectangular shape when viewed from above. The circuit layer 12 is covered with the aluminum oxide film 12 </ b> A in the exposed portion around the portion where the Ag fired layer 30 is formed.

The vicinity of the center of the Ag fired layer 30 is an element bonding region E1 that is a region to which the semiconductor chip 3 is bonded via the bonding layer 2. On the other hand, in the peripheral region E2 spreading around the element bonding region E1, the Ag layer 32 is exposed even after the semiconductor chip 3 is bonded.
The alloy part 35 is formed along the four sides of the Ag layer 32 in the peripheral region E2 of the Ag fired layer 30. That is, in this embodiment, the alloy part 35 is formed in a substantially square shape so as to surround the Ag layer 32 (and the glass layer 31 formed in the lower layer). Such an alloy part 35 is directly connected to the circuit layer 12 to electrically connect the Ag layer 32 and the circuit layer 12 without the glass layer 31 (see FIG. 3).

  In the alloy part 35, when the Ag fired layer 30 is viewed from the top, the area ratio of the alloy part 35 is 1% with respect to the area obtained by removing the area of the element bonding region E1 from the entire area of the Ag fired layer 30. As mentioned above, it is preferable to form so that it may become 20% or less of range. If the area ratio of the alloy part 35 is less than 1%, a sufficient effect cannot be obtained, and the current value of the alloy part 35 increases, and there is a possibility that the semiconductor chip 3 is adversely affected by heat generation. Moreover, when the area ratio of the alloy part 35 exceeds 20%, there exists a possibility that the adhesiveness of the circuit layer 12 and the Ag baking layer 30 may fall.

  Thus, by forming the alloy part 35 in the Ag fired layer 30, the Ag layer 32 and the circuit layer 12 are directly and electrically connected by the alloy part 35 without the glass layer 31 having a relatively high resistance. Therefore, the electrical resistance value P in the thickness direction of the Ag fired layer 30 can be set to 10 mΩ or less, for example.

  In this embodiment, the electrical resistance value P in the thickness direction of the Ag fired layer 30 is the electrical resistance value between the upper surface of the Ag fired layer 30 and the upper surface of the circuit layer 12. This is because the electric resistance of 4N aluminum constituting the circuit layer 12 is very small compared to the electric resistance in the thickness direction of the Ag fired layer 30. When measuring the electrical resistance, as shown in FIG. 5 and FIG. 6, the upper surface center point of the Ag fired layer 30 and the distance H from the upper surface center point of the Ag fired layer 30 to the edge of the Ag fired layer 30. On the other hand, the electrical resistance between the point on the circuit layer 12 that is H apart from the end of the Ag fired layer 30 is measured.

  In the present embodiment, as shown in FIG. 3, the thickness to of the aluminum oxide film 12A that naturally occurs on the circuit layer 12 is 4 nm ≦ to ≦ 6 nm. Further, the thickness tg of the glass layer 31 is 0.01 μm ≦ tg ≦ 5 μm, the thickness ta of the Ag layer 32 is 1 μm ≦ ta ≦ 100 μm, and the total thickness tg + ta of the Ag fired layer 30 is 1.01 μm ≦ tg + ta ≦ 105 μm. It is comprised so that it may become.

In the embodiment described above, the alloy part 35 is formed along the four sides of the Ag layer 32, but the shape of the alloy part 35 is not limited to this. For example, in another embodiment shown in FIG. 7, it is also preferable to form alloy portions 35, 35... At the corners of the four corners of the Ag layer 32 formed in a rectangle when viewed in plan. Also in such a form, the area ratio occupied by the alloy portion 35 is in the range of 1% or more and 20% or less with respect to the area obtained by removing the area of the element bonding region E1 from the area of the entire Ag fired layer 30. It is preferable to do.
In addition to this, the alloy part 35 can be formed in an intermediate portion along each of the four sides of the Ag layer 32, or can be formed only on two opposing sides of the four sides of the Ag layer 32.

Next, the manufacturing method of the board | substrate for power modules of this invention is demonstrated.
FIG. 8 is a flowchart showing an example of a method for manufacturing a power module substrate step by step.
First, an aluminum plate to be a circuit layer 12 and an aluminum plate to be a metal layer 13 are prepared, and these aluminum plates are laminated on one surface 11a and the other surface 11b of the ceramic substrate 11 through brazing materials, respectively. The aluminum plate and the ceramic substrate 11 are joined by cooling after pressurization and heating (circuit layer and metal layer forming step S11). As the brazing material, for example, an Al—Si brazing material or the like can be used. In addition, the temperature of this brazing is set to 640 degreeC-650 degreeC, for example.

  Next, the cooler 40 (top plate portion 41) is joined to the other surface side of the metal layer 13 via the buffer layer 15 via the brazing material (cooler joining step S12). As the brazing material, for example, an Al—Si brazing material or the like can be used. Note that the brazing temperature of the cooler 40 is set to, for example, 590 ° C. to 610 ° C.

Next, a glass-containing Ag paste is applied to the surface 12a of the circuit layer 12 (first application step S13). In the first coating step S13, as shown in FIG. 9, the glass-containing Ag paste layer Pa1 is formed so as to form a substantially rectangular shape, for example, a rectangle when the circuit layer 12 is viewed from above. When such a glass-containing Ag paste is applied, various means such as a screen printing method, an offset printing method, and a photosensitive process can be employed. In this embodiment, the glass-containing Ag paste was formed in a pattern by a screen printing method.
Moreover, it can also dry after application | coating. When drying, for example, it is desirable to perform at 150 ° C. for 30 minutes.

    Here, the glass containing Ag paste used by 1st application | coating process S13 is demonstrated. The glass-containing Ag paste contains Ag powder, glass powder, resin, solvent, and dispersant, and the content of the powder component composed of Ag powder and glass powder is the whole glass-containing Ag paste. 60 mass% or more and 90 mass% or less, and the remainder is made of resin, solvent and dispersant.

  In addition, in this embodiment, content of the powder component which consists of Ag powder and glass powder is 85 mass% of the whole glass containing Ag paste. The viscosity of the glass-containing Ag paste is adjusted to, for example, 10 Pa · s or more and 500 Pa · s or less, more preferably 50 Pa · s or more and 300 Pa · s or less.

The Ag powder has a particle size of 0.05 μm or more and 1.0 μm or less. In this embodiment, an Ag powder having an average particle size of 0.8 μm was used.
The glass powder contains, for example, any one or more of lead oxide, zinc oxide, silicon oxide, boron oxide, phosphorus oxide and bismuth oxide, and the softening temperature is 600 ° C. or less. In the present embodiment, glass powder made of lead oxide, zinc oxide and boron oxide and having an average particle size of 0.5 μm was used.
The weight ratio A / G between the weight A of the Ag powder and the weight G of the glass powder is adjusted within the range of 80/20 to 99/1. In this embodiment, A / G = 80/5 It was.

A solvent having a boiling point of 200 ° C. or higher is suitable. In this embodiment, diethylene glycol dibutyl ether is used.
The resin is used to adjust the viscosity of the glass-containing Ag paste, and those that decompose at 500 ° C. or higher are suitable. In this embodiment, ethyl cellulose is used.
In this embodiment, a dicarboxylic acid-based dispersant is added. In addition, you may comprise a glass containing Ag paste, without adding a dispersing agent.

  As a method for obtaining a glass-containing Ag paste having such a structure, for example, a mixed powder is produced by mixing Ag powder and glass powder, and an organic mixture is produced by mixing a solvent and a resin. The powder, the organic mixture and the dispersant are premixed with a mixer. And after mixing a premix by kneading using a roll mill machine, a glass containing Ag paste is produced by filtering the obtained kneading with a paste filter.

Next, as shown in FIG. 10, the glass component is not contained so as to come into contact with the glass-containing Ag paste layer Pa1 along the four sides of the glass-containing Ag paste layer Pa1 having a rectangular shape in plan view formed in the first application step S13. An Ag paste is applied (second application step S14). Thereby, Ag paste layer Pa2 is formed so that glass-containing Ag paste layer Pa1 may be surrounded. In addition, it is preferable to form Ag paste layer Pa2 so that a part of the upper part may overlap with glass-containing Ag paste layer Pa1. Thereby, the Ag layer 32 and the alloy part 35 formed in the firing step which is a subsequent step can be reliably adhered.
The Ag paste layer Pa2 is also preferably formed so as to cover the four sides of the glass-containing Ag paste layer Pa1 and the entire upper surface.

  When applying the Ag paste, various means such as a screen printing method, an offset printing method, and a photosensitive process can be employed. In this embodiment, the Ag paste is formed in a pattern by a screen printing method.

  Here, the Ag paste used in the second application step S14 will be described. The Ag paste contains Ag powder, a resin, a solvent, and a dispersant, and the content of the Ag powder is 60% by mass or more and 90% by mass or less of the entire Ag paste, and the balance is Resins, solvents, and dispersants.

  In the present embodiment, the content of the Ag powder is 85% by mass of the entire Ag paste. Moreover, the viscosity of this Ag paste is adjusted to, for example, 10 Pa · s or more and 500 Pa · s or less, more preferably 50 Pa · s or more and 300 Pa · s or less.

The Ag powder has a particle size of 0.05 μm or more and 1.0 μm or less. In this embodiment, an Ag powder having an average particle size of 0.8 μm was used.
A solvent having a boiling point of 200 ° C. or higher is suitable. In this embodiment, diethylene glycol dibutyl ether is used.
The resin is used to adjust the viscosity of the Ag paste, and a resin that decomposes at 500 ° C. or higher is suitable. In this embodiment, ethyl cellulose is used.
In this embodiment, a dicarboxylic acid-based dispersant is added. In addition, you may comprise Ag paste, without adding a dispersing agent.

  As a method for obtaining an Ag paste having such a configuration, for example, an organic mixture is produced by mixing a solvent and a resin, and Ag powder, the organic mixture, and a dispersant are premixed by a mixer. And after mixing a premix by kneading using a roll mill machine, Ag paste is produced by filtering the obtained kneading with a paste filter.

  Next, in a state where a glass-containing Ag paste layer Pa1 made of glass-containing Ag paste and an Ag paste layer Pa2 made of Ag paste are formed on the surface 12a of the circuit layer 12, the glass-containing Ag is charged in a heating furnace. The paste and the Ag paste are baked (baking step S15).

  As shown in FIG. 11, in the firing step S15, first, the glass-containing Ag paste and Ag contained in the Ag paste are sintered. Then, Al of the circuit layer 12 in contact with the Ag paste layer Pa2 and the sintered Ag diffuse to each other. As the diffusion further proceeds, a liquid phase is generated, and this liquid phase is solidified to form an alloy part 35.

  Examples of the Ag—Al alloy constituting the alloy part 35 include an Ag—Al solid solution and an Ag—Al intermetallic compound. In this embodiment, it is mainly composed of an Ag—Al intermetallic compound. Preferred examples of the intermetallic compound of Ag—Al include a δ phase or μ phase intermetallic compound in the known Ag—Al phase diagram.

  In baking process S15, it heats to the temperature which produces a liquid phase, and performs baking. The firing temperature is preferably set to, for example, 567 ° C. or more and 620 ° C. or less. By setting the firing temperature to 567 ° C. or more and 620 ° C. or less, a liquid phase can be generated reliably and the alloy part 35 can be formed.

  Moreover, Ag baking layer 30 provided with the glass layer 31 and the Ag layer 32 is formed by baking process S15. At this time, the glass layer 31 melts and removes the aluminum oxide film 12A naturally generated on the surface of the circuit layer 12, and the glass layer 31 is directly formed on the circuit layer 12. In addition, fine conductive particles 33 having a particle size of about several nanometers are dispersed inside the glass layer 31. The conductive particles 33 are crystalline particles containing at least one of Ag or Al, and are presumed to have precipitated in the glass layer 31 during firing.

  Thus, the power module substrate 10 in which the Ag fired layer 30 including the glass layer 31, the Ag layer 32, and the alloy part 35 is formed on the surface 12a of the circuit layer 12 is produced.

Then, the semiconductor chip 3 is placed on the surface of the Ag fired layer 30 via a solder material, and soldered in a reduction furnace (solder joining step S16). At this time, part or all of the Ag layer 32 constituting the Ag fired layer 30 is melted in the bonding layer 2 formed of the solder material.
Thereby, the power module 1 in which the semiconductor chip 3 is bonded onto the circuit layer 12 via the bonding layer 2 is produced.

  In the power module substrate 10 and the power module 1 according to the present embodiment configured as described above, the alloy part 35 is formed around the Ag layer 32 in which the glass layer 31 is formed in the lower layer. By such an alloy part 35, the Ag layer 32 and the circuit layer 12 are electrically connected.

  Since the alloy part 35 has a lower electrical resistance value than the glass layer 31 in which the conductive particles 33 are dispersed, even if the glass layer 31 having a relatively high resistance is formed below the Ag layer 32, the alloy part 35 has a low resistance. The portion 35 reduces the electrical resistance between the circuit layer 12 and the semiconductor chip 3 and allows electricity to flow well. Thus, in order to improve the bonding reliability between the circuit layer 12 and the Ag fired layer 30, even if the glass layer 31 is thickened by increasing the glass content, the space between the Ag layer 32 and the circuit layer 12 is increased. The electrical resistance value can be kept low, and it is possible to balance both the junction reliability and the electrical resistance value.

As mentioned above, although embodiment of this invention was described, this invention is not limited to this, It can change suitably in the range which does not deviate from the technical idea of the invention.
For example, in the above embodiment, the case where a solder layer is used as the bonding layer has been described. However, the present invention is not limited to this. For example, a circuit layer and a semiconductor using an Ag paste containing nano Ag particles and an organic substance as the bonding layer. You may join an element.

  In the above-described embodiment, the aluminum plate is exemplified as the metal layer bonded to the ceramic substrate constituting the insulating layer. However, the present invention is not limited to this. For example, a copper plate can be used as the metal layer. Moreover, what joined the aluminum plate and the copper plate in order from the ceramic substrate side as a metal layer can also be used, respectively.

Below, the result of the confirmation experiment performed in order to confirm the effect of this invention is demonstrated.
As an example of the present invention, the power module substrate described in the above embodiment was prepared.
That is, the alloy part 35 in contact with the Ag layer 32 and the circuit layer 12 was formed in the peripheral region E2 of the Ag layer 32 constituting the Ag fired layer 30. The alloy portions 35 were formed along the four sides around the Ag layer 32 having a rectangular shape in plan view. The height of the alloy part 35 was 15 μm, and the maximum width was 300 μm.

  As a comparative example, a power module substrate in which the alloy part 35 is not formed was prepared. Except not forming the alloy part 35, it was set as the structure similar to the example of this invention.

For each of these inventive examples and comparative examples, the electrical resistance value in the thickness direction of the Ag fired layer was measured. When measuring the electrical resistance, as shown in FIGS. 5 and 6, Ag firing is performed with respect to the center point of the upper surface of the Ag fired layer and the distance H from the center point of the upper surface of the Ag fired layer to the Ag fired layer end. The electrical resistance between the points on the circuit layer separated by H from the layer edge was measured.
Table 1 shows the measured electrical resistance values of the fired Ag layers in the present invention and the comparative example.

  According to the results shown in Table 1, the electrical resistance value of the Ag fired layer, which was 0.5Ω in the past, was 10 mΩ or less according to the present invention, and a significant effect of reducing the electrical resistance value was confirmed. According to this invention, it was confirmed that the board | substrate for power modules which can balance both joining reliability and an electrical resistance value can be obtained.

1 Power Module 2 Bonding Layer 3 Semiconductor Chip (Semiconductor Element)
10 Power Module Substrate 11 Ceramic Substrate (Insulating Layer)
12 circuit layer 30 Ag fired layer 31 glass layer 32 Ag layer 33 conductive particle 35 alloy part E2 peripheral region

Claims (10)

A power module substrate comprising a circuit layer made of Al or an Al alloy formed on one surface of an insulating layer, and an Ag fired layer formed on the circuit layer,
The Ag fired layer includes a glass layer, an Ag layer formed on the glass layer, and an alloy part made of Ag and Al and electrically connecting the Ag layer and the circuit layer. A power module substrate, comprising:   The power module substrate according to claim 1, wherein the alloy part is formed outside an element bonding region in which a semiconductor element is disposed.   When the Ag fired layer is viewed from above, the area ratio occupied by the alloy part is 1% or more and 20% or less with respect to the area obtained by removing the area of the element bonding region from the area of the entire Ag fired layer. The power module substrate according to claim 1, wherein the power module substrate is provided.   The Ag fired layer has a substantially rectangular shape when viewed from above, and the alloy part is formed along four sides of the Ag layer, and the glass layer is located inside a region surrounded by the alloy part. It forms, The board | substrate for power modules as described in any one of Claim 1 thru | or 3 characterized by the above-mentioned.   5. The power module substrate according to claim 1, wherein the alloy portion is an Ag—Al solid solution or an Ag—Al intermetallic compound. 6.   The power module substrate according to claim 5, wherein the intermetallic compound of Ag—Al is a δ phase or a μ phase.   The power module substrate according to any one of claims 1 to 6, wherein the Ag fired layer has an electrical resistance value in the thickness direction of 10 mΩ or less.   A power module substrate according to any one of claims 1 to 7, and a semiconductor element disposed on one surface side of the Ag fired layer constituting the power module substrate, The power module, wherein the semiconductor element is bonded to the Ag fired layer via a bonding layer. A method for producing a power module substrate comprising a circuit layer made of Al or an Al alloy formed on one surface of an insulating layer, and an Ag fired layer formed on the circuit layer,
A first application step of applying a glass-containing Ag paste on one surface of the circuit layer;
A second application step of applying the Ag paste so that at least a portion thereof overlaps with the application region of the glass-containing Ag paste;
The glass-containing Ag paste and the Ag paste are baked to form a glass layer, an Ag layer formed on the glass layer, and an alloy of Ag diffused from the Ag and the circuit layer constituting the Ag paste. And a firing step for forming the alloy part,
The said alloy part connects the said Ag layer and the said circuit layer directly, without interposing the said glass layer, The manufacturing method of the board | substrate for power modules characterized by the above-mentioned.   The method for manufacturing a power module substrate according to claim 9, wherein in the firing step, a firing temperature is set to 567 ° C. or more and 620 ° C. or less.

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