JP6171912B2 - Ag base layer-attached metal member, insulated circuit board, semiconductor device, heat sink-equipped insulating circuit board, and method for manufacturing Ag base layer-attached metal member - Google Patents

Description

  The present invention provides a metal member with an Ag base layer including a metal member to be joined to a body to be joined and an Ag base layer formed on the surface of the metal member, an insulating circuit board having the metal member with the Ag base layer, The present invention relates to a method of manufacturing a semiconductor device provided with this insulating circuit board, an insulating circuit board with a heat sink, and a metal member with an Ag underlayer.

A semiconductor device such as an LED or a power module has a structure in which a semiconductor element is bonded on a circuit layer made of a conductive material.
In power semiconductor elements for large power control used to control wind power generation, electric vehicles, hybrid vehicles, etc., the amount of heat generated is large. Therefore, for example, AlN (aluminum nitride), Al _An insulating circuit board comprising an insulating layer made of a ceramic substrate such as ₂ O ₃ (alumina) and a circuit layer formed by disposing a metal having excellent conductivity on one surface of the insulating layer has been conventionally used. Widely used. In addition, as an insulating circuit board, a board provided with a metal layer formed by disposing a metal having excellent thermal conductivity on the other surface of the insulating layer is also provided.

  For example, Patent Document 1 proposes an insulated circuit board in which a first metal plate and a second metal plate constituting a circuit layer and a metal layer are copper plates, and this copper plate is directly bonded to a ceramic substrate by a DBC method. Yes. In this DBC method, by utilizing a eutectic reaction between copper and copper oxide, a liquid phase is generated at the interface between the copper plate and the ceramic substrate, and the copper plate and the ceramic substrate are joined.

In the insulated circuit board described in Patent Document 1, an electronic component such as a semiconductor element is mounted on the surface of a circuit layer, and a heat sink base is soldered on the surface of a metal layer. Then, heat generated in an electronic component such as a semiconductor element is transmitted to the insulating circuit board side and dissipated to the outside through a heat sink base.
Recently, from the viewpoint of environmental protection, as a solder material used when joining an electronic component such as a semiconductor element and a circuit layer, or a heat sink base and a metal layer, for example, Sn-Ag, Sn-In, or Sn- Lead-free solders such as Ag-Cu are the mainstream.

Here, when directly soldering to a circuit layer or a metal layer made of copper or a copper alloy, the molten solder material reacts with copper, and the components of the solder material penetrate into the circuit layer or the metal layer, The characteristics of the circuit layer and the metal layer may be deteriorated. For this reason, conventionally, a Ni plating film is formed on the surface of a circuit layer or a metal layer, and solder bonding is performed.
Also, recently, compound semiconductor elements such as SiC or GaN are expected to be put into practical use from silicon semiconductors, and since the heat resistance of the semiconductor elements themselves is expected to be improved, there is a need for a bonding material that has better heat resistance than solder materials. It has been.

Therefore, as an alternative to the solder material, for example, Patent Document 2 proposes a technique for joining an electronic component such as a semiconductor element or a heat sink base using a metal paste having metal particles and an organic substance.
Patent Documents 3 and 4 propose a technique for joining an electronic component such as a semiconductor element or a heat sink base using an oxide paste containing metal oxide particles and an organic reducing agent.

  However, as disclosed in Patent Documents 2-4, when an electronic component such as a semiconductor element is joined using a metal paste or an oxide paste without using a solder material, it is made of a fired body of these pastes. Since the bonding layer is formed to be thinner than the solder material, the stress at the time of thermal cycle load tends to act on the electronic component such as a semiconductor element, and the electronic component such as the semiconductor element itself may be damaged. It was. Similarly, when the bonding layer formed between the metal layer and the heat sink becomes thin, thermal strain caused by the difference in thermal expansion coefficient between the insulating circuit board and the heat sink acts on the insulating circuit board, and the insulating layer is cracked. There was a fear.

Therefore, in Patent Documents 5 and 6, there is a technique for joining a circuit layer and a semiconductor element via a solder material or Ag paste after forming an Ag underlayer on a circuit layer made of copper using a glass-containing Ag paste. Proposed. In this technique, a glass-containing Ag paste is applied to the surface of a circuit layer made of copper and baked to remove the oxide film formed on the surface of the circuit layer by reacting with glass to form an Ag underlayer. The semiconductor element is joined with a solder material on the circuit layer on which the Ag base layer is formed.
Here, the Ag underlayer includes a glass layer formed by reacting glass with an oxide film of a circuit layer, and an Ag layer formed on the glass layer. Conductive particles are dispersed in the glass layer, and conduction of the glass layer is ensured by the conductive particles.

Japanese Patent Laid-Open No. 04-162756 JP 2006-202938 A JP 2008-208442 A JP 2009-267374 A JP 2012-109315 A JP2013-12706A

By the way, when an Ag underlayer is formed on the surface of a circuit layer using the glass-containing pastes of Patent Documents 5 and 6, and the circuit layer and an electronic component such as a semiconductor element are joined, the glass layer is formed thick in the Ag underlayer. Then, since the electric resistance value becomes large, there is a possibility that the conductivity between the circuit layer and the electronic component such as a semiconductor element cannot be secured.
Moreover, when an Ag underlayer is formed on the surface of the metal layer using the glass-containing pastes of Patent Documents 5 and 6, and the metal layer and the heat sink are joined, thermal conductivity deteriorates as the electrical resistance value increases. Further, heat transfer from the metal layer to the heat sink is also inhibited, and there is a possibility that heat cannot be efficiently dissipated.

  The present invention has been made in view of the above-described circumstances, and is excellent in bonding strength between a metal member and an Ag underlayer, and can provide a metal member with an Ag underlayer capable of ensuring conductivity and thermal conductivity. An object of the present invention is to provide an insulating circuit board made of a metal member with an Ag underlayer, a semiconductor device using the insulating circuit board, an insulating circuit board with a heat sink, and a method for producing a metal member with an Ag underlayer.

  In order to solve such problems and achieve the above-described object, the metal member with an Ag underlayer of the present invention includes a metal member to be bonded to a member to be bonded, and an Ag layer formed on the surface of the metal member. A copper layer made of copper or a copper alloy is formed on a joint surface of the metal member to be joined to the body to be joined. An Ag underlayer is formed on the surface, and the Ag underlayer has a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn.

  In the metal member with an Ag underlayer having this configuration, the copper layer formed on the bonding surface to be bonded to the object to be bonded and the intermetallic compound containing Ag and Sn in the Ag underlayer diffuse to each other. Thus, the Ag underlayer and the copper layer are reliably bonded. And since several Ag particle | grains are couple | bonded by the intermetallic compound containing Ag and Sn, the Ag base layer which laminated | stacked Ag particle | grains on the surface of a copper layer can be formed. Therefore, it is possible to obtain a metal member with an Ag underlayer that has excellent bonding strength between the metal member and the Ag underlayer, and that can ensure conductivity and thermal conductivity.

  Here, the insulated circuit board of the present invention is an insulated circuit board comprising an insulating layer and a circuit layer disposed on one surface of the insulating layer, and the insulating layer of the circuit layers includes the insulating layer. The copper layer is provided on the surface opposite to the disposed surface, an Ag underlayer is formed on the surface of the copper layer, and the circuit layer and the Ag underlayer are the above-described metal member with the Ag underlayer. The Ag underlayer has a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn.

  In the insulated circuit board having this configuration, the copper layer formed on the surface of the circuit layer opposite to the surface on which the insulating layer is disposed and the intermetallic compound containing Ag and Sn of the Ag underlayer diffuse each other. By doing so, the Ag underlayer and the copper layer are reliably bonded. And since several Ag particle | grains are couple | bonded by the intermetallic compound containing Ag and Sn, the Ag base layer which laminated | stacked Ag particle | grains on the surface of a copper layer can be formed. Therefore, it is possible to reliably bond the electronic component such as a semiconductor element and the circuit layer. In addition, since the Ag base layer is formed of the intermetallic compound containing Ag and Sn and Ag, it is possible to ensure conductivity and thermal conductivity between the circuit layer and the electronic component such as a semiconductor element.

  The insulating circuit board of the present invention includes an insulating layer, an insulating layer, a circuit layer disposed on one surface of the insulating layer, and a metal layer disposed on the other surface of the insulating layer. It is a circuit board, The said copper layer is provided in the surface on the opposite side to the surface where the said insulating layer was arrange | positioned among the said metal layers, The said Ag base layer is formed in the surface of this copper layer, The said metal layer And the Ag underlayer is the above-described metal member with an Ag underlayer, and the Ag underlayer has a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn. It is a feature.

  In the insulated circuit board having this configuration, the copper layer formed on the surface of the metal layer opposite to the surface on which the insulating layer is disposed and the intermetallic compound containing Ag and Sn of the Ag underlayer diffuse each other. By doing so, the Ag underlayer and the copper layer are securely joined together, and a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn. Therefore, the Ag particles are laminated on the surface of the copper layer. An underlayer can be formed. Therefore, it is possible to reliably bond the heat sink and the metal layer. In addition, since the Ag underlayer is formed of the intermetallic compound containing Ag and Sn and Ag, the thermal conductivity can be ensured, and the heat on the insulating circuit board side can be efficiently dissipated to the heat sink side. Can do.

  According to another aspect of the present invention, there is provided a semiconductor device comprising: the above-described insulating circuit substrate; and a semiconductor element bonded to the Ag base layer, wherein the Ag base layer and the semiconductor element include Ag and It is characterized by being bonded by a bonding layer made of a sintered body of a bonding material containing one or both of silver oxide and an organic substance.

  According to the semiconductor device of this configuration, from the sintered body of the bonding material including the Ag underlayer formed on the surface of the copper layer made of copper or a copper alloy of the circuit layers, one or both of Ag and silver oxide, and the organic substance. Therefore, the circuit layer and the electronic component such as a semiconductor element can be reliably bonded to each other. Therefore, it is possible to provide a semiconductor device that is excellent in bonding reliability and in which the circuit layer and the electronic component are securely bonded.

  An insulated circuit board with a heat sink according to the present invention is an insulated circuit board with a heat sink comprising the above-described insulated circuit board and a heat sink bonded to the Ag underlayer, wherein the Ag underlayer and the heat sink Are bonded by a bonding layer made of a sintered body of a bonding material containing one or both of Ag and silver oxide and an organic substance.

  According to the semiconductor device of this configuration, from the sintered body of the bonding material including the Ag underlayer formed on the surface of the copper layer made of copper or a copper alloy of the metal layer, one or both of Ag and silver oxide, and the organic substance. Therefore, the metal layer and the heat sink can be reliably bonded to each other. Therefore, it is possible to provide an insulating circuit board with a heat sink in which the metal layer and the heat sink are securely bonded and heat on the insulating circuit board side can be efficiently dissipated to the heat sink side.

  Moreover, the manufacturing method of the metal member with an Ag base layer of this invention is a metal member with an Ag base layer provided with the metal member joined to a to-be-joined body, and the Ag base layer formed in the surface of this metal member. A copper layer disposing step of disposing a copper layer made of copper or a copper alloy on a bonding surface to which the object to be bonded is bonded among the metal members, and a surface of the copper layer, By applying and heat-treating an Ag underlayer forming paste containing Ag powder and Sn or Sn alloy powder, a plurality of Ag particles were combined by an intermetallic compound containing Ag and Sn. And an Ag underlayer forming step for forming an Ag underlayer.

  According to the method of manufacturing a metal member with an Ag underlayer having this configuration, a copper layer made of copper or a copper alloy is disposed on the bonding surface of the metal member to which the object to be bonded is bonded, and the surface of the copper layer is arranged. Since there is provided an Ag underlayer forming step of forming an Ag underlayer by applying an Ag underlayer forming paste containing Ag powder and Sn or Sn alloy powder and heat-treating the metal member (copper layer) ), An Ag underlayer having a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn can be reliably formed.

  According to the present invention, a metal member with an Ag base layer that is excellent in bonding strength between the metal member and the Ag base layer, and can ensure electrical conductivity and thermal conductivity, and an insulating circuit board comprising the metal member with the Ag base layer It is possible to provide a semiconductor device using this insulating circuit board, an insulating circuit board with a heat sink, and a method for manufacturing a metal member with an Ag underlayer.

It is a schematic explanatory drawing of the semiconductor device which is 1st Embodiment of this invention. It is expansion explanatory drawing of the Ag base layer provided in the insulated circuit board which is 1st Embodiment of this invention. It is a binary phase diagram of Cu and Sn. It is a binary state diagram of Ag and Sn. It is a flowchart of the manufacturing method of the paste for Ag base layer formation used in 1st Embodiment of this invention. It is a flowchart of the manufacturing method of the insulated circuit board which is 1st Embodiment of this invention, and the manufacturing method of a semiconductor device. It is explanatory drawing which shows the manufacturing method of the insulated circuit board which is 1st Embodiment of this invention, and the manufacturing method of a semiconductor device. It is explanatory drawing which shows the process in which Ag base layer is formed in 1st Embodiment of this invention. It is a schematic explanatory drawing of the semiconductor device which is 2nd Embodiment of this invention. It is a flowchart of the manufacturing method of the insulated circuit board which is 2nd Embodiment of this invention, and the manufacturing method of a semiconductor device. It is a schematic explanatory drawing of the manufacturing method of the insulated circuit board which is 2nd Embodiment of this invention, and the manufacturing method of a semiconductor device. It is a schematic explanatory drawing of the semiconductor device which is 3rd Embodiment of this invention. It is a schematic explanatory drawing of the joining interface of the aluminum layer and copper layer in the semiconductor device of FIG. It is a binary phase diagram of Cu and Al. It is a flowchart of the manufacturing method of the insulated circuit board which is 3rd Embodiment of this invention, and the manufacturing method of a semiconductor device. It is a schematic explanatory drawing of the manufacturing method of the insulated circuit board which is 3rd Embodiment of this invention, and the manufacturing method of a semiconductor device. It is a schematic explanatory drawing of the semiconductor device which is other embodiment of this invention. In an Example, it is upper surface explanatory drawing which shows the measuring method of the electrical resistance value of the thickness direction of Ag base layer. In an Example, it is side explanatory drawing which shows the measuring method of the electrical resistance value of the thickness direction of Ag base layer.

  Embodiments of the present invention will be described below with reference to the accompanying drawings.

(First embodiment)
First, a first embodiment of the present invention will be described with reference to FIGS.
FIG. 1 shows a semiconductor device 1 according to a first embodiment of the present invention. The semiconductor device 1 includes an insulating circuit substrate 10 and a semiconductor element 3 bonded to one surface (upper surface in FIG. 1) of the insulating circuit substrate 10 via a bonding layer 2.

The insulated circuit board 10 includes a ceramic substrate 11 serving as an insulating layer, and a circuit layer 12 (metal member) disposed on one surface (upper surface in FIG. 1) of the ceramic substrate 11.
The ceramic substrate 11 is made of highly insulating AlN (aluminum nitride), Si ₃ N ₄ (silicon nitride), Al ₂ O ₃ (alumina), or the like. In this embodiment, it is comprised with AlN (aluminum nitride) excellent in heat dissipation. In addition, the thickness of the ceramic substrate 11 is set within a range of 0.2 to 1.5 mm, and in this embodiment is set to 0.635 mm.

  As shown in FIG. 7, the circuit layer 12 is formed by bonding a copper plate 22 made of copper or a copper alloy to one surface of the ceramic substrate 11. In the present embodiment, an oxygen-free copper rolled plate is used as the copper plate 22 constituting the circuit layer 12. A circuit pattern is formed on the circuit layer 12, and one surface (the upper surface in FIG. 1) is a mounting surface on which the semiconductor element 3 is mounted. Here, the thickness of the circuit layer 12 (copper plate 22) is set within a range of 0.1 mm or more and 1.0 mm or less, and is set to 0.3 mm in the present embodiment.

An Ag underlayer 30 is formed on one surface of the circuit layer 12. In the present embodiment, the Ag underlayer 30 and the circuit layer 12 serve as a metal member with an Ag underlayer.
As shown in FIG. 2, the Ag underlayer 30 includes Ag particles 31 and an intermetallic compound 32 containing Ag and Sn, and the plurality of Ag particles 31 includes an intermetallic compound 32 containing Ag and Sn. It is a structure joined by. The Ag underlayer 30 is formed of an Ag underlayer forming paste 50 described later. Here, Ni, Co, Ge, P, Si, In, Bi, or the like may be added to the intermetallic compound 32 containing Ag and Sn in an amount of 0.2 mass% or less in order to improve the bonding reliability. .
In the present embodiment, the thickness of the Ag underlayer 30 is in the range of 1 μm to 15 μm.
Further, the intermetallic compound 32 containing Ag and Sn and the circuit layer 12 diffuse to each other to form an alloy layer such as a Sn solid solution phase, η phase, η ′ phase, and ε phase in Cu ( (See FIG. 3). Also, the intermetallic compound 32 containing Ag and Sn and the Ag particles 31 diffuse to each other to form an alloy layer such as a Sn solid solution phase, an ε phase, and a ζ phase in Ag (see FIG. 4). .

  The joining layer 2 is a fired body of a joining material containing at least one or both of Ag particles and silver oxide particles and an organic substance, and in the present embodiment, an oxidation containing silver oxide particles and a reducing agent made of an organic substance. It is a fired body of silver paste. That is, the bonding layer 2 is an Ag fired body obtained by reducing silver oxide. Here, since the particles produced by reducing silver oxide are very fine, for example, with a particle size of 10 nm to 1 μm, a dense Ag fired layer is formed.

Next, the Ag underlayer forming paste 50 for forming the Ag underlayer 30 will be described.
As shown in FIG. 8, the Ag underlayer forming paste 50 includes an Ag powder 51, a Sn or Sn alloy powder 52, and an acrylic resin 53 having a decomposition temperature of 400 ° C. or less in an N ₂ atmosphere. doing. In addition, you may add a solvent and a dispersing agent as needed.
As the Sn alloy, a Sn—Ag alloy, a Sn—Cu alloy, a Sn—Zn—Al alloy, a Sn—Sb alloy, or the like can be used.
Further, Ni, Co, Ge, P, Si, In, Bi, or the like may be added to the Ag underlayer forming paste 50 in an amount of 0.2 mass% or less based on the powder weight of Sn or Sn alloy. Addition of Ni, Co, Ge, P, Si, In, Bi, etc. improves the wettability when the Sn or Sn alloy powder is melted, facilitates the reaction with the circuit layer, and improves the bonding reliability. improves. In addition, when adding Ni, Co, Ge, P, Si, In, Bi, etc., it adds as an alloy (for example, Sn-Ni alloy or Sn-Sb-Ni alloy) of these elements and Sn or Sn alloy. It is desirable.

Here, the content of the Ag powder 51 is 50 mass% or more and 80 mass% or less, the content of the Sn or Sn alloy powder 52 is 15 mass% or more and 35 mass% or less, and the content of the acrylic resin 53 is 0.1 mass% or more. The content of the organic solvent is not less than 2 mass% and not more than 0.9 mass% and not more than 18 mass%.
As the acrylic resin 53, methyl methacrylate, n-butyl methacrylate, i-butyl methacrylate, t-butyl methacrylate, 2-ethylhexyl methacrylate, lauryl methacrylate, alkyl methacrylate, tridecyl methacrylate, stearyl methacrylate , Cyclohexyl methacrylate, phenyl methacrylate, benzyl methacrylate, isobornyl methacrylate, glycidyl methacrylate, tetrahydrofurfuryl methacrylate, allyl methacrylate, 2-hydroxyethyl methacrylate, 2-methoxyethyl methacrylate, 2-ethoxy methacrylate Polymers such as ethyl, dimethylaminoethyl methacrylate, ethylene glycol dimethacrylate, and 1,3-butylene glycol dimethacrylate can be used.
Further, the average particle diameter of Ag powder 51 (center particle diameter d50 measured by microtrack method) is 0.1 μm or more and 10 μm or less, and the average particle diameter of Sn or Sn alloy powder 52 (center measured by microtrack method) The particle size d50) is 0.5 μm or more and 15 μm or less.
Moreover, as an organic solvent, what can melt | dissolve acrylic resin can be used, for example, (alpha)-terpineol, a butyl carbitol acetate, diethylene crycol dibutyl ether etc. can be used. In this embodiment, α-terpineol was used. As the amount of the organic solvent, one obtained by dissolving the resin in an organic solvent 7 to 24 times the organic solvent weight 1 was used.
Furthermore, a dispersing agent can be added as needed. In the case of adding a dispersant, it is preferable to use a carboxylic acid-based or amine-based dispersant that dissolves in the solvent. In the present embodiment, a diamine-based dispersant is added, and the amount of the dispersant is desirably added in the range of 0.05 to 0.50 dispersant with respect to 1 weight of the organic solvent.

Next, a method for producing the Ag underlayer forming paste 50 used in the present embodiment will be described with reference to the flowchart shown in FIG.
First, the Ag powder 51 described above and Sn or Sn alloy powder 52 are mixed (powder mixing step S1). Moreover, the acrylic resin 53, the dispersant, and the solvent are mixed to produce an organic mixture (organic matter mixing step S2).

Then, the mixed powder obtained in the powder mixing step S1 and the organic mixture obtained in the organic matter mixing step S2 are premixed by a mixer (preliminary mixing step S3).
Next, the preliminary mixture is mixed while kneading using a roll mill having a plurality of rolls (kneading step S4).
The kneaded material obtained by kneading process S4 is filtered with a paste filter (filtration process S5).
In this manner, the Ag underlayer forming paste 50 according to the present embodiment is produced.

Next, the silver oxide paste that forms the bonding layer 2 will be described.
This silver oxide paste contains silver oxide powder (silver oxide particles), a reducing agent, a resin, and a solvent, and in this embodiment, in addition to these, contains an organometallic compound powder. .
The content of the silver oxide powder is 60 mass% or more and 92 mass% or less of the entire silver oxide paste, the content of the reducing agent is 5 mass% or more and 20 mass% or less of the entire silver oxide paste, and the content of the organometallic compound powder is oxidized. It is set as 0 mass% or more and 10 mass% or less of the whole silver paste, and the remainder is made into the solvent. In this silver oxide paste, a dispersant and a resin are not added in order to prevent unreacted organic matter from remaining in the bonding layer 2 obtained by sintering.

The reducing agent is an organic substance having reducibility, and for example, alcohol and organic acid can be used.
The organometallic compound has an action of promoting the reduction reaction of silver oxide and the decomposition reaction of organic substances by the organic acid generated by thermal decomposition, for example, formic acid Ag, acetic acid Ag, propionic acid Ag, benzoic acid Ag, oxalic acid. A carboxylic acid metal salt such as Ag is applied.
The silver oxide paste has a viscosity adjusted to 10 Pa · s to 500 Pa · s, more preferably 50 Pa · s to 300 Pa · s.

Next, a method for manufacturing the insulated circuit board 10 and the semiconductor device 1 according to the present embodiment will be described with reference to FIGS.
First, the copper plate 22 is bonded to one surface of the ceramic substrate 11 using a copper member bonding paste containing Ag and a nitride-forming element to form the circuit layer 12 (circuit layer forming step S01).
Here, the copper member bonding paste contains a powder component containing Ag and a nitride-forming element, a resin, a solvent, a dispersant, a plasticizer, and a reducing agent. In addition to Ag and nitride forming elements, one or more additive elements selected from In, Sn, Al, Mn and Zn are included. In the present embodiment, Ti is used as the nitride forming element.

  Specifically, as shown in FIG. 7, Ag and the nitride-forming element layer 24 are formed by applying and drying a copper member bonding paste on one surface of the ceramic substrate 11 by screen printing. The thickness of the Ag and nitride forming element layer 24 is set to 60 μm or more and 300 μm or less after drying. Next, the copper plate 22 is laminated on one surface side of the ceramic substrate 11. That is, the Ag and nitride forming element layer 24 is interposed between the ceramic substrate 11 and the copper plate 22.

Then, by inserting and heating the copper plate 22 and the ceramic substrate 11 in a vacuum heating furnace in a state in which the copper plate 22 and the ceramic substrate 11 are pressurized in the stacking direction (pressure 1 to 35 kgf / cm ² ), the circuit layer 12 is formed on one surface of the ceramic substrate 11. Form. During this heating, Ag and Ag in the nitride-forming element layer 24 diffuse toward the copper plate 22. At this time, a part of the copper plate 22 is melted by a eutectic reaction between Cu and Ag, and a molten metal region is formed at the interface between the copper plate 22 and the ceramic substrate 11. Then, when the molten metal region is solidified, the ceramic substrate 11 and the copper plate 22 are joined, and the circuit layer 12 is formed.

Here, in this embodiment, the pressure in the vacuum heating furnace is set in a range of 10 ⁻⁶ Pa to 10 ⁻³ Pa, and the heating temperature is set in a range of 790 ° C. to 850 ° C.
In addition, after the solidification is completed, Ag and Ag of the nitride forming element layer 24 are sufficiently diffused, and the Ag and nitride forming element layer 24 remains at the bonding interface between the ceramic substrate 11 and the copper plate 22. Absent.

Next, an Ag underlayer 30 is formed on one surface of the circuit layer 12 (Ag underlayer formation step S02).
In this Ag underlayer forming step S02, the above-described Ag underlayer forming paste 50 is applied to one surface of the circuit layer 12, as shown in FIG.
Next, this Ag underlayer forming paste 50 is heat-treated. The heat treatment conditions are preferably a temperature of 400 ° C. to 600 ° C. and a holding time of 30 minutes to 2 hours in a nitrogen atmosphere, for example. As a result, as shown in FIG. 8B, the acrylic resin in the Ag underlayer forming paste 50 is decomposed and removed, and the Sn or Sn alloy powder 52 is melted to form a molten layer 52a. Is done. Here, Sn in the molten layer 52a and copper in the circuit layer 12 diffuse and alloy with each other, and the Ag powder 51 is surrounded by the molten layer 52a, and the Ag powder 51 and Sn in the molten layer 52a diffuse to each other. And alloyed.
Then, as shown in FIG. 8 (c), the mutual diffusion of the molten layer 52a and Ag and Cu further progresses, and the molten layer 52a becomes an intermetallic compound 32 containing Ag and Sn having a high melting point, and solidifies. An Ag underlayer 30 having a structure in which a plurality of Ag particles 31 are bonded by an intermetallic compound 32 containing Ag and Sn is formed.
The intermetallic compound 32 containing Ag and Sn includes an intermetallic compound of Ag and Cu and an intermetallic compound of Cu and Sn in addition to the intermetallic compound of Ag and Sn. Further, when an Sn alloy is used as the Sn or Sn alloy powder 52, an intermetallic compound of Ag, Cu, and Sn with an element contained in the Sn alloy is included. For example, when an Sn-Sb alloy is used as the Sn or Sn alloy powder 52, the intermetallic compound 32 containing Ag and Sn includes an intermetallic compound such as Ag and Sb, Cu and Sb, or Sn and Sb. .

  Thus, the insulated circuit board 10 which is this embodiment in which the Ag underlayer 30 is formed on the surface of the circuit layer 12 made of copper or a copper alloy is manufactured.

Next, the silver oxide paste used as the joining layer 2 is apply | coated to the surface of Ag base layer 30 (silver oxide paste application | coating process S03).
In addition, when apply | coating a silver oxide paste, various means, such as a screen printing method, an offset printing method, and a photosensitive process, are employable. In this embodiment, the silver oxide paste was printed by the screen printing method.

Next, after drying with the silver oxide paste applied (for example, stored at room temperature in an air atmosphere for 24 hours), the semiconductor element 3 is stacked on the silver oxide paste of the insulating circuit board 10 (semiconductor element stacking step S04). ).
Then, the semiconductor element 3 and the insulating circuit substrate 10 are stacked in a heating furnace, and the silver oxide paste is baked (baking step S06). At this time, the semiconductor element 3 and the insulating circuit substrate 10 can be more reliably bonded by heating in a state where the semiconductor element 3 and the insulating circuit substrate 10 are pressurized in the stacking direction. In this case, the pressurizing pressure is desirably 0.5 to 10 MPa.
In this way, the bonding layer 2 is formed on the Ag base layer 30, and the semiconductor element 3 and the circuit layer 12 are bonded. Thereby, the semiconductor device 1 which is this embodiment is manufactured.

  According to the semiconductor device 1 and the insulating circuit substrate 10 according to the present embodiment configured as described above, the Ag underlayer 30 is formed on the surface of the circuit layer 12 made of copper or a copper alloy. Since the ground layer 30 has a structure in which a plurality of Ag particles 31 are bonded by an intermetallic compound 32 containing Ag and Sn, the circuit layer 12 and the intermetallic compound 32 containing Ag and Sn are firmly bonded, The bonding strength between the circuit layer 12 and the Ag base layer 12a can be sufficiently increased. And since the circuit layer 12 in which this Ag foundation layer 30 was formed, and the semiconductor element 3 are joined via the joining layer 2 which consists of a baking body of a silver oxide paste, Ag foundation layer 30 and the joining layer 2 Becomes the bonding between the same kind of metals (Ag), the bonding strength between the Ag underlayer 30 and the bonding layer 2 is improved, and the bonding reliability between the insulating circuit substrate 10 and the semiconductor element 3 can be improved. In addition, the electrical resistance of the Ag base layer 30 is kept low, and electrical conductivity between the insulating circuit substrate 10 and the semiconductor element 3 can be ensured.

In this embodiment, since Sn or Sn alloy is used, the Sn or Sn alloy powder 52 is melted by heat treatment under the temperature condition of 400 ° C. or more and 600 ° C. or less in the Ag underlayer forming step S02. This makes it possible to reliably form the intermetallic compound 32 containing Ag and Sn.
Furthermore, in this embodiment, since the Ag base layer forming paste contains an acrylic resin having a decomposition temperature of 400 ° C. or lower in an N ₂ atmosphere, in the Ag base layer forming step S02, 400 ° C. or higher and 600 ° C. or lower. Since the acrylic resin is decomposed and removed by heat treatment under the above temperature conditions, the electrical resistance between the circuit layer 12 and the semiconductor element 3 can be reliably reduced.

  Furthermore, in this embodiment, since the bonding layer 2 is a fired body of silver oxide paste containing silver oxide powder and a reducing agent, the silver oxide is reduced by the reducing agent when the silver oxide paste is fired. Thus, the Ag layer becomes fine and the bonding layer 2 can have a dense structure. Further, since the reducing agent is decomposed when the silver oxide is reduced, it is difficult to remain in the bonding layer 2 and the conductivity and strength in the bonding layer 2 can be ensured. Furthermore, since the silver oxide paste can be fired under a relatively low temperature condition such as 300 ° C., for example, the junction temperature of the semiconductor element 3 can be kept low, and the thermal load on the semiconductor element 3 can be reduced. it can.

(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIGS.
FIG. 9 shows a semiconductor device 101 according to the second embodiment of the present invention. The semiconductor device 101 includes an insulating circuit board 140 with a heat sink, and a semiconductor element 103 bonded to one surface (upper surface in FIG. 9) of the insulating circuit board 140 with a heat sink via a first bonding layer 102. I have.
The insulated circuit board 140 with a heat sink includes an insulated circuit board 110 and a heat sink 141 joined to the other surface (the lower surface in FIG. 9) side of the insulated circuit board 110 via the second bonding layer 105. ing.

  As shown in FIG. 9, the insulating circuit board 110 includes a ceramic substrate 111, a circuit layer 112 (metal member) disposed on one surface (the upper surface in FIG. 9) of the ceramic substrate 111, and the ceramic substrate 111. And a metal layer 113 (metal member) disposed on the other surface.

  The ceramic substrate 111 prevents electrical connection between the circuit layer 112 and the metal layer 113. In the present embodiment, the ceramic substrate 111 is made of highly insulating AlN (aluminum nitride). Here, the thickness of the ceramic substrate 111 is set within a range of 0.2 to 1.5 mm, and is set to 0.635 mm in the present embodiment.

  As shown in FIG. 11, the circuit layer 112 is formed by bonding a copper plate 122 made of copper or a copper alloy to one surface of the ceramic substrate 111. In the present embodiment, an oxygen-free copper rolled plate is used as the copper plate 122 constituting the circuit layer 112. A circuit pattern is formed on the circuit layer 112, and one surface thereof is a mounting surface on which the semiconductor element 103 is mounted. Here, the thickness of the circuit layer 112 (copper plate 122) is set within a range of 0.1 mm to 1.0 mm, and is set to 0.6 mm in the present embodiment.

  As shown in FIG. 11, the metal layer 113 is formed by joining a copper plate 123 made of copper or a copper alloy to the other surface of the ceramic substrate 111. In the present embodiment, an oxygen-free copper rolled plate is used as the copper plate 123 constituting the metal layer 113. Here, the thickness of the metal layer 113 (copper plate 123) is set within a range of 0.5 mm to 6 mm, and is set to 0.6 mm in the present embodiment.

  The heat sink 141 is for cooling the insulating circuit board 110 described above, and in this embodiment, is a heat sink made of copper or a copper alloy.

Here, as shown in FIG. 11, the first Ag base layer 130 a is provided on one surface of the circuit layer 112, and the second Ag base layer 130 b is formed on the other surface of the metal layer 113.
In addition, as shown in FIG. 11, a third Ag base layer 130 c is formed in a region of the heat sink 141 that is bonded to the metal layer 113.
In the present embodiment, the circuit layer 112 and the first Ag underlayer 130a, the metal layer 113 and the second Ag underlayer 130b, the heat sink 141, and the third Ag underlayer 130c are each a metal member with an Ag underlayer.

The first Ag underlayer 130a, the second Ag underlayer 130b, and the third Ag underlayer 130c include Ag particles and an intermetallic compound containing Ag and Sn, and a plurality of Ag particles includes a metal containing Ag and Sn. The structure is bound by an intercalation compound. The first Ag underlayer 130a, the second Ag underlayer 130b, and the third Ag underlayer 130c are formed by the Ag underlayer forming paste 50 described in the first embodiment.
In the present embodiment, the thicknesses of the first Ag base layer 130a, the second Ag base layer 130b, and the third Ag base layer 130c are in the range of 1 μm to 15 μm.

  The first bonding layer 102 and the second bonding layer 105 are a fired body of a bonding material containing at least one or both of Ag particles and silver oxide particles and an organic material. In this embodiment, the first embodiment is the first embodiment. Similarly, a sintered body of a silver oxide paste containing silver oxide particles and a reducing agent made of an organic material is used.

Next, a method for manufacturing the insulated circuit board 110 and the semiconductor device 101 according to the present embodiment will be described with reference to FIGS.
First, the copper plates 122 and 123 are joined to one surface and the other surface of the ceramic substrate 111 to form the circuit layer 112 and the metal layer 113 (circuit layer and metal layer forming step S101).
In this embodiment, the copper plates 122 and 123 are joined via the Ag—Cu—Ti brazing materials 124 and 125.

Next, the first Ag base layer 130a is formed on one surface of the circuit layer 112, and the second Ag base layer 130b is formed on the other surface of the metal layer 113 (first and second Ag base layer forming step S102).
In the first and second Ag underlayer forming step S102, the above-described Ag underlayer forming paste 50 is applied to one surface of the circuit layer 112 and the other surface of the metal layer 113, and is heated. The

  In this way, the first Ag base layer 130a is formed on the surface of the circuit layer 112 made of copper or copper alloy, and the second Ag base layer 130b is formed on the surface of the metal layer 113 made of copper or copper alloy. The insulated circuit board 110 is manufactured.

Further, the third Ag base layer 130c is formed on the joint surface of the heat sink 141 to be bonded to the metal layer 113 (third Ag base layer forming step S103).
Also in the third Ag underlayer forming step S103, the above-described Ag underlayer forming paste 50 is applied to the bonding surface of the heat sink 141 and is heat-treated.

  Next, a silver oxide paste to be the first bonding layer 102 is applied to the surface of the first Ag underlayer 130a, and a silver oxide paste to be the second bonding layer 105 is applied to the surface of the second Ag underlayer 130b (see FIG. Silver oxide paste application step S104).

Next, after the silver oxide paste is applied and dried (for example, stored at room temperature in an air atmosphere for 24 hours), the semiconductor element 103 is stacked on the silver oxide paste on the circuit layer 112 side (semiconductor element stacking step S105).
In addition, after drying with the silver oxide paste applied (for example, stored at room temperature in an air atmosphere for 24 hours), the heat sink 141 is laminated on the silver oxide paste on the metal layer 113 side (heat sink lamination step S106).

Then, the semiconductor element 103, the insulating circuit substrate 110, and the heat sink 141 are stacked and placed in a heating furnace, and the silver oxide paste is baked (baking step S107). At this time, the semiconductor element 103, the insulating circuit substrate 110, and the heat sink 141 can be bonded more reliably by heating in a state where the semiconductor element 103, the insulating circuit substrate 110, and the heat sink 141 are pressed in the stacking direction. In this case, the pressurizing pressure is desirably 0.5 to 10 MPa.
In this manner, the semiconductor element 103 and the circuit layer 112 are bonded together, and the metal layer 113 and the heat sink 141 are bonded together, whereby the semiconductor device 101 and the insulated circuit board 140 with the heat sink according to the present embodiment are manufactured.

According to the semiconductor device 101, the insulated circuit board 140 with the heat sink, and the insulated circuit board 110 configured as described above, the same effects as those of the semiconductor device 1 and the insulated circuit board 10 of the first embodiment. Can be played.
In the present embodiment, the second Ag base layer 130b is formed on the surface of the metal layer 113, and the third Ag base layer 130c is formed on the bonding surface of the heat sink 141. These second and third Ag base layers 130b and 130c are formed. Since the second bonding layer 105 made of a sintered body of silver oxide paste is formed between the metal layer 113 and the heat sink 141, the metal layer 113 and the heat sink 141 can be bonded reliably.

  The second Ag base layer 130b and the third Ag base layer 130c include Ag particles and an intermetallic compound containing Ag and Sn, and a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn. Therefore, the thermal resistance between the metal layer 113 and the second Ag underlayer 130b, the heat sink 141 and the third Ag underlayer 130c is reduced, and the heat on the insulating circuit board 110 side is efficiently transferred to the heat sink 141 side. Can be released.

(Third embodiment)
Below, the 3rd Embodiment of this invention is described with reference to FIGS. 12-16.
FIG. 12 shows a semiconductor device 201 according to the third embodiment of the present invention. The semiconductor device 201 includes an insulating circuit substrate 210 and a semiconductor element 203 bonded to one surface (upper surface in FIG. 12) of the insulating circuit substrate 210 via a bonding layer 202.

  As shown in FIG. 12, the insulated circuit board 210 includes a ceramic substrate 211, a circuit layer 212 (metal member) disposed on one surface (the upper surface in FIG. 12) of the ceramic substrate 211, and the ceramic substrate 211. And a metal layer 213 disposed on the other surface (the lower surface in FIG. 12).

  The ceramic substrate 211 prevents electrical connection between the circuit layer 212 and the metal layer 213. In the present embodiment, the ceramic substrate 211 is made of highly insulating AlN (aluminum nitride). Here, the thickness of the ceramic substrate 211 is set within a range of 0.2 to 1.5 mm, and is set to 0.635 mm in the present embodiment.

As shown in FIG. 12, the circuit layer 212 includes an aluminum layer 212A formed on one surface of the ceramic substrate 211 and a copper layer 212B stacked on one surface side of the aluminum layer 212A. .
A circuit pattern is formed on the circuit layer 212, and one surface (the upper surface in FIG. 12) is a mounting surface on which the semiconductor element 203 is mounted. Here, the thickness of the circuit layer 212 is set within a range of 0.1 mm to 1.0 mm, and is set to 0.6 mm in the present embodiment.

Here, as shown in FIG. 16, the aluminum layer 212 </ b> A is formed by bonding an aluminum plate 222 </ b> A to one surface of the ceramic substrate 211. In the present embodiment, the aluminum layer 212A is formed by joining aluminum rolled plates having a purity of 99.99 mass% or more.
Further, as shown in FIG. 16, the copper layer 212B is formed by solid phase diffusion bonding of a copper plate 222B made of an oxygen-free copper rolled plate to the aluminum layer 212A.
A diffusion layer 215 is formed at the interface between the aluminum layer 212A and the copper layer 212B as shown in FIG.

  The diffusion layer 215 is formed by mutual diffusion of Al atoms in the aluminum layer 212A and Cu atoms in the copper layer 212B. The diffusion layer 215 has a concentration gradient in which the concentration of aluminum atoms gradually decreases and the concentration of copper atoms increases as it goes from the aluminum layer 212A to the copper layer 212B.

As shown in FIG. 13, the diffusion layer 215 is composed of an intermetallic compound composed of Al and Cu. In this embodiment, the diffusion layer 215 has a structure in which a plurality of intermetallic compounds are stacked along the bonding interface. . Here, the thickness of the diffusion layer 215 is set in the range of 1 μm to 80 μm, preferably in the range of 5 μm to 80 μm.
In the present embodiment, as shown in FIG. 13, the θ phase 216 and the η2 phase 217 are laminated in order from the aluminum layer 212A side to the copper layer 212B side along the bonding interface between the aluminum layer 212A and the copper layer 212B. Furthermore, at least one of the ζ2 phase 218a, the δ phase 218b, and the γ2 phase 218c is laminated (see the state diagram in FIG. 14).
In the present embodiment, the oxide 219 is dispersed in a layered manner inside the layer formed of the ζ2 phase 218a, the δ phase 218b, or the γ2 phase 218c along the interface between the copper layer 212B and the diffusion layer 215. The oxide 219 is an aluminum oxide such as alumina (Al ₂ O ₃ ).

  As shown in FIG. 16, the metal layer 213 is formed by joining an aluminum plate 223 made of aluminum or an aluminum alloy to the other surface of the ceramic substrate 211. In the present embodiment, a rolled aluminum plate having a purity of 99.99 mass% or more is used as the aluminum plate 223 constituting the metal layer 213. Here, the thickness of the metal layer 213 (aluminum plate 223) is set within a range of 0.5 mm to 6 mm, and is set to 1.0 mm in the present embodiment.

Here, as shown in FIG. 12, an Ag underlayer 230 is provided on one surface of the copper layer 212 </ b> B in the circuit layer 212. In the present embodiment, the circuit layer 212 provided with the copper layer 212B and the Ag base layer 230 are metal members with an Ag base layer.
The Ag underlayer 230 includes Ag particles and an intermetallic compound containing Ag and Sn, and has a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn. The Ag underlayer 230 is formed by the Ag underlayer forming paste 50 described in the first embodiment.
In the present embodiment, the thickness of the Ag underlayer 230 is in the range of 1 μm to 15 μm.

  The bonding layer 202 is a fired body of a bonding material containing at least one or both of Ag particles and silver oxide particles and an organic substance. In this embodiment, as in the first embodiment, silver oxide is used. A sintered body of silver oxide paste containing particles and a reducing agent made of an organic material is used.

Below, the manufacturing method of the insulated circuit board 210 which is this embodiment, and the semiconductor device 201 is demonstrated with reference to FIG.15 and FIG.16.
First, aluminum plates 222A and 223 are joined to one surface and the other surface of the ceramic substrate 211 to form an aluminum layer 212A and a metal layer 213 (aluminum layer and metal layer forming step S201).
In the present embodiment, as shown in FIG. 16, aluminum plates 222A and 223 to be aluminum layers 212A and metal layers 213 are disposed on one surface and the other surface of the ceramic substrate 211 via brazing material foils 224 and 225, respectively. Laminate. In this embodiment, the brazing material foils 224 and 225 are Al—Si brazing materials containing Si that is a melting point lowering element. Then, in a state where the aluminum plates 222A and 223 and the ceramic substrate 211 are pressed in the stacking direction (pressure 1 to 35 kgf / cm ² ), the aluminum plates 222A and 223 are joined by being inserted into a heating furnace and heated. ing. In this embodiment, in the aluminum layer and metal layer forming step S201, the heating temperature is 550 ° C. or more and 650 ° C. or less, and the heating time is 30 minutes or more and 180 minutes or less.

Next, the copper plate 222B is joined to one surface of the aluminum layer 212A to form the copper layer 212B (copper layer forming step S202).
A copper plate 222B is laminated on the aluminum layer 212A, and the aluminum layer 212A and the copper plate are heated by placing them in a vacuum heating furnace in a state of being pressurized in the laminating direction (pressure 3 to 35 kgf / cm ² ). 222B is solid phase diffusion bonded. Here, in copper layer formation process S202, heating temperature is 400 degreeC or more and 548 degrees C or less, and heating time is 15 minutes or more and 270 minutes or less. In the case of performing solid phase diffusion bonding between the aluminum layer 212A and the copper plate 222B, the heating temperature ranges from a temperature 5 ° C. lower than the eutectic temperature (548.8 ° C.) of Al and Cu to a temperature lower than the eutectic temperature. It is preferable that
By this copper layer forming step S202, a circuit layer 212 composed of an aluminum layer 212A and a copper layer 212B is formed on one surface of the ceramic substrate 211.

Next, the Ag base layer 230 is formed on one surface of the circuit layer 212 (one surface of the copper layer 212B). (Ag foundation layer forming step S203).
In this Ag underlayer forming step S203, the above-described Ag underlayer forming paste 50 is applied to one surface of the copper layer 212B and heat-treated, whereby an intermetallic compound in which a plurality of Ag particles contain Ag and Sn. As a result, an Ag underlayer 230 having a structure bonded to each other is formed.

  In this way, the insulated circuit board 210 according to this embodiment in which the Ag base layer 230 is formed on the surface of the copper layer 212B made of copper or a copper alloy in the circuit layer 212 is manufactured.

Next, a silver oxide paste to be the bonding layer 202 is applied to the surface of the Ag base layer 230 (silver oxide paste application step S204).
In addition, when apply | coating a silver oxide paste, various means, such as a screen printing method, an offset printing method, and a photosensitive process, are employable. In this embodiment, the silver oxide paste was printed by the screen printing method.

Next, after the silver oxide paste is applied and dried (for example, stored at room temperature and air atmosphere for 24 hours), the semiconductor element 203 is stacked on the silver oxide paste (semiconductor element stacking step S205).
Then, the semiconductor element 203 and the insulating circuit substrate 210 are stacked and placed in a heating furnace, and the silver oxide paste is baked (baking step S206). At this time, the semiconductor element 203 and the insulating circuit substrate 110 can be bonded more reliably by heating in a state of being pressurized in the stacking direction. In this case, the pressurizing pressure is desirably 0.5 to 10 MPa.
In this way, the semiconductor element 203 and the circuit layer 212 (copper layer 212B) are joined, and the semiconductor device 201 according to this embodiment is manufactured.

According to the semiconductor device 201 and the insulating circuit substrate 210 of the second embodiment configured as described above, the same operational effects as the semiconductor device 1 and the insulating circuit substrate 10 of the first embodiment can be obtained.
Further, in the present embodiment, since the circuit layer 212 includes the copper layer 212B, the heat generated from the semiconductor element 203 can be spread in the plane direction by the copper layer 212B, and efficiently to the insulating circuit board 210 side. Can transfer heat.

Furthermore, since the aluminum layer 212A having a relatively small deformation resistance is formed on one surface of the ceramic substrate 211, the thermal stress generated during the heat cycle load can be absorbed by the aluminum layer 212A. Can be prevented from cracking.
In addition, since the copper layer 212B made of copper or copper alloy having a relatively large deformation resistance is formed on one surface side of the circuit layer 212, the deformation of the circuit layer 212 can be suppressed during power cycle loading. High reliability with respect to the power cycle can be obtained.

In the present embodiment, the aluminum layer 212A and the copper layer 212B are solid phase diffusion bonded, and the temperature during the solid phase diffusion bonding is 400 ° C. or higher. Diffusion is promoted and solid phase diffusion can be sufficiently achieved in a short time. In addition, since the temperature at the time of solid phase diffusion bonding is 548 ° C. or less, a liquid phase of Al and Cu does not occur, and a bump occurs at the bonding interface between the aluminum layer 212A and the copper layer 212B. It can suppress that thickness changes.
Furthermore, when the heating temperature of the above-mentioned solid phase diffusion bonding is set in a range from 5 ° C. lower than the eutectic temperature of Al and Cu (548.8 ° C.) to less than the eutectic temperature, the compound of Al and Cu is It can be suppressed from being formed more than necessary, and the diffusion rate during solid phase diffusion bonding is ensured, so that solid phase diffusion bonding can be performed in a relatively short time.

As mentioned above, although embodiment of this invention was described, this invention is not limited to this, It can change suitably in the range which does not deviate from the technical idea of the invention.
For example, as shown in FIG. 17, a circuit layer 312 (metal member) made of copper or a copper alloy is formed on one surface of a ceramic substrate 311, and a metal layer made of aluminum or an aluminum alloy is formed on the other surface of the ceramic substrate 311. The insulated circuit board 310 may be formed by forming 313 and forming the Ag underlayer 330 on one surface side of the circuit layer 312. The semiconductor device 301 may be configured by mounting the semiconductor element 303 on the circuit layer 312 of the insulating circuit substrate 310 and bonding the heat sink 341 to the other surface side of the metal layer 313.

Moreover, although the copper plate which comprises a circuit layer, a metal layer, a copper layer, etc. was demonstrated as a rolled plate of oxygen-free copper, it is not limited to this, It was comprised with other copper or copper alloys. May be.
Similarly, the aluminum plate constituting the metal layer or the aluminum layer has been described as a rolled plate of pure aluminum having a purity of 99.99 mass%, but is not limited to this, and aluminum having a purity of 99 mass% (2N aluminum), etc. It may be composed of other aluminum or aluminum alloy.

  Moreover, in the said embodiment, although the joining layer demonstrated as what was comprised with the baking body of the silver oxide paste containing a silver oxide powder and a reducing agent, it is not limited to this, The paste of a silver particle is included. A fired body may be used, or a conductive adhesive containing Ag powder may be used.

In the third embodiment, the aluminum layer and the copper layer are described as forming a circuit layer having a structure in which solid phase diffusion bonding is performed. However, the present invention is not limited to this, and one surface of the circuit layer is formed. The side should just be made into the copper layer which consists of copper or a copper alloy.
Further, the metal layer may be a structure in which an aluminum layer and a copper layer are solid phase diffusion bonded, and an Ag underlayer may be formed on the copper layer and the heat sink may be bonded.

Further, the heat sink is not limited to the one exemplified in this embodiment, and the structure of the heat sink is not particularly limited. Also in the first, second, and fourth embodiments, a heat sink may be arranged.
Further, a buffer layer may be provided between the heat sink and the metal layer. As the buffer layer, a plate made of aluminum, an aluminum alloy, or a composite material containing aluminum (for example, AlSiC) can be used.

  A confirmation experiment conducted to confirm the effectiveness of the present invention will be described.

(Invention Example 1-8)
A copper plate to be a circuit layer is joined to one surface of a ceramic substrate by an active metal brazing method, and an aluminum plate to be a metal layer is joined to the other surface of the ceramic substrate by a brazing method to produce an insulated circuit board. did. Here, the ceramic substrate was AlN, and the size was 27 mm × 17 mm × 0.6 mm. The copper plate used as the circuit layer was made of the material shown in Table 1, and the size was 25 mm × 15 mm × 0.3 mm. The aluminum plate used as the metal layer was 4N aluminum having a purity of 99.99 mass% or more, and the size was 25 mm × 15 mm × 1.6 mm.

The Ag underlayer was formed by applying the Ag underlayer forming paste described in the embodiment to the surface of the circuit layer and performing heat treatment.
In addition, as Ag underlayer forming paste, Ag powder: 75 mass% (average particle size 0.8 μm), Sn or Sn alloy powder shown in Table 1: 15 mass%, acrylic resin (polymer of i-butyl methacrylate) ): 1 mass%, organic solvent (α-terpineol): A material containing 9 mass% was used.

  Next, as a silver oxide paste, commercially available silver oxide powder (manufactured by Wako Pure Chemical Industries, Ltd.), myristyl alcohol as a reducing agent, and 2,2,4-trimethyl-1,3-pentanediol mono (2 -Methyl propanoate), silver oxide powder; 80% by mass, reducing agent (myristyl alcohol); 10% by mass, solvent (2,2,4-trimethyl-1,3-pentanediol mono (2) -Methylpropanoate)); the mixture in the ratio of the remainder was prepared.

Then, the above silver oxide paste is applied on the Ag underlayer (application thickness: 10 μm), a semiconductor element having an Au film formed on the bonding surface is disposed, and the silver oxide paste is baked to form a bonding layer. Thus, a semiconductor device of Invention Example 1-8 was produced.
Here, the firing conditions of the silver oxide paste were a nitrogen atmosphere, a firing temperature of 300 ° C., a firing time of 10 minutes, and a pressing pressure of 5 MPa.

(Conventional example 1)
Without forming an Ag underlayer on the surface of the circuit layer made of a copper plate, the circuit layer and the semiconductor element were bonded by a bonding layer obtained by baking a silver oxide paste, and a semiconductor device of Conventional Example 1 was manufactured. The other conditions were the same as in Invention Example 1-8.

(Conventional example 2)
On the surface of the circuit layer made of a copper plate, an Ag underlayer is formed using a glass-containing Ag paste, and the circuit layer and the semiconductor element are bonded by a bonding layer obtained by baking a silver oxide paste, thereby manufacturing the semiconductor device of Conventional Example 2 did. The other conditions were the same as in Invention Example 1-8.
After applying the glass-containing Ag paste on the circuit layer, it was placed in a heating furnace and baked at 600 ° C. to form an Ag underlayer on the circuit layer. The glass-containing Ag paste used here was a glass-based Ag paste containing cellulose resin, Bi ₂ O ₃ —ZnO—B ₂ O ₃ lead-free glass frit, α-terpineol and Ag as solvents.

  About the obtained various semiconductor devices, shear strength, thermal resistance, and electrical resistance were evaluated by the following procedures. The evaluation results are shown in Table 1.

(Share strength)
The shear strength was measured using a shear strength evaluation tester for a semiconductor device in which 2.5 mm × 2.5 mm × 0.200 mm semiconductor elements were joined. In the measurement, the circuit layer of the semiconductor device was fixed horizontally, the position 50 μm above the surface of the circuit layer was pushed horizontally from the side with a shear tool, and the strength when the semiconductor element was broken was measured. The moving speed of the share tool was set to 0.1 mm / sec. The strength test was performed three times for one condition, and the arithmetic average value was taken as the measured value. As a shear strength evaluation tester, a bonding tester (Model: PTR-1101) manufactured by Reska Co., Ltd. was used.

(Thermal resistance)
Semiconductor devices were fabricated using heater chips (13 mm × 10 mm × 0.25 mm) as semiconductor elements, and these semiconductor devices were brazed and joined to a cooler. Next, the heater chip was heated with a power of 100 W, and the temperature of the heater chip was measured using a thermocouple. Further, the temperature of the cooling medium (ethylene glycol: water = 9: 1) flowing through the cooler was measured. And the value which divided the temperature difference of a heater chip | tip and the temperature of a cooling medium with electric power was made into thermal resistance. In addition, it set to 1 on the basis of the prior art example 1 which did not form an Ag base layer, and evaluated by the ratio with this prior art example 1.

(Electrical resistance)
About the insulated circuit board in which the Ag underlayer was formed, the electrical resistance value in the thickness direction of the Ag underlayer was measured using a tester (manufactured by KEITHLEY: 2010 MULTITIMER) by the method described in FIGS. The electrical resistance is measured on a circuit layer that is separated from the Ag base layer edge by H when the upper surface center point of the Ag base layer is a distance H from the top center point of the Ag base layer to the Ag base layer edge. And went between.

In Conventional Example 1 in which the Ag underlayer was not formed on the surface of the circuit layer, the shear strength, thermal resistance, and electrical resistance were higher than those of the example of the present invention.
In Conventional Example 2 in which an Ag underlayer was formed with a glass-containing Ag paste on the surface of the circuit layer, the electric resistance was higher than that in the inventive example.

  On the other hand, in Example 1-8 of the present invention in which the Ag underlayer was formed on the surface of the circuit layer using the Ag underlayer forming paste, a semiconductor device having high shear strength and low thermal resistance and electrical resistance was obtained. I was able to.

1, 101, 201, 301 Semiconductor device 10, 110, 210, 310 Power module substrate 11, 111, 211, 311 Ceramic substrate 12, 112, 212, 312 Circuit layer 113, 213, 313 Metal layer 22, 122, 123 Copper plate 30, 130, 230, 330 Ag underlayer 31 Ag particles 32 Intermetallic compound containing Ag and Sn 50 Ag underlayer forming paste 51 Ag powder 52 Sn or Sn alloy powder 53 Acrylic resin

Claims (6)

A metal member with an Ag underlayer comprising: a metal member to be joined to the object to be joined; and an Ag underlayer formed on the surface of the metal member,
A copper layer made of copper or a copper alloy is formed on the bonding surface of the metal member to be bonded to the object to be bonded, and the Ag underlayer is formed on the surface of the copper layer.
The Ag underlayer has a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn. An insulating circuit board comprising an insulating layer and a circuit layer disposed on one surface of the insulating layer,
The copper layer is provided in the surface on the opposite side to the surface where the said insulating layer is arrange | positioned among the said circuit layers, Ag base layer is formed in the surface of this copper layer, The said circuit layer and said Ag base layer are claimed. 1 is a metal member with an Ag underlayer according to 1,
The above-mentioned Ag underlayer has a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn. An insulating circuit board comprising: an insulating layer; a circuit layer disposed on one surface of the insulating layer; and a metal layer disposed on the other surface of the insulating layer,
A copper layer is provided on the surface of the metal layer opposite to the surface on which the insulating layer is disposed, the Ag underlayer is formed on the surface of the copper layer, and the metal layer and the Ag underlayer are claimed. It is set as the metal member with an Ag base layer of claim | item 1,
The above-mentioned Ag underlayer has a structure in which a plurality of Ag particles are bonded by an intermetallic compound containing Ag and Sn. A semiconductor device comprising: the insulating circuit board according to claim 2; and a semiconductor element bonded to the Ag underlayer of the circuit layer,
The said Ag base layer and the said semiconductor element are joined by the joining layer which consists of a sintered body of the joining material containing one or both of Ag and silver oxide, and organic substance. An insulated circuit board with a heat sink comprising: the insulated circuit board according to claim 3; and a heat sink joined to the Ag underlayer of the metal layer,
An insulating circuit board with a heat sink, wherein the Ag underlayer and the heat sink are bonded by a bonding layer made of a sintered body of a bonding material containing one or both of Ag and silver oxide and an organic substance. A method for producing a metal member with an Ag underlayer, comprising: a metal member to be joined to an object to be joined; and an Ag underlayer formed on the surface of the metal member,
A copper layer disposing step of disposing a copper layer made of copper or a copper alloy on a bonding surface to which the object to be bonded is bonded among the metal members;
By applying an Ag underlayer forming paste containing Ag powder and Sn or Sn alloy powder to the surface of the copper layer and heat-treating, a plurality of Ag particles are made of an intermetallic compound containing Ag and Sn. An Ag underlayer forming step of forming an Ag underlayer having a combined structure;
The manufacturing method of the metal member with an Ag base layer characterized by comprising.

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