JP2015033101A - Solid imaging device and electronic camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To promote space saving while reducing the effect of foreign substances, flaws, or the like on a translucent member covering an imaging region on imaging performance.SOLUTION: A solid imaging device 1 includes a semiconductor chip 2 having an imaging region 2a, a wiring board 3 which has an opening part 3a at least in a region corresponding to the imaging region 2a, and is jointed to a surface on the imaging region 2a side of the semiconductor chip 2, a translucent member 4 which is disposed to cover the opening part 3a and is fixed to a surface on the side opposite to the semiconductor chip 2 of the wiring board 3, and an electronic component 5 which is disposed between the wiring board 3 and the translucent member 4, and is connected electrically to the wiring board 3.

Description

  The present invention relates to a solid-state imaging device and an electronic camera using the same.

  As an example of the solid-state imaging device, FIG. 4 of Patent Document 1 below is bonded to a wiring board in which a light passage hole is formed and an adhesive so as to close the light passage hole on one surface of the wiring board. An imaging unit is disclosed that includes a cover glass and a solid-state imaging device (bare chip imaging device) that is bump-bonded to the other surface of the wiring board so as to close the light passage hole.

JP 2000-147346 A

  However, in the conventional solid-state imaging device, the interval between the imaging region of the bare chip imaging element and the cover glass is determined by the height of bump bonding, the thickness of the wiring board, and the thickness of the adhesive, and therefore the interval It was difficult to increase the size. Therefore, in the conventional solid-state imaging device, the influence on the imaging performance such as foreign matter and scratches on the cover glass is large.

  Needless to say, space saving is required in the solid-state imaging device.

  The present invention has been made in view of such circumstances, and solid-state imaging capable of saving space while reducing the influence on foreign matter, scratches, and other imaging performance on a translucent member covering the imaging region. An object is to provide an apparatus and an electronic camera using the same.

  The following aspects are presented as means for solving the problems. A solid-state imaging device according to a first aspect includes a semiconductor chip having an imaging region, a wiring board having an opening at least in a region corresponding to the imaging region, and bonded to a surface of the semiconductor chip on the imaging region side; A translucent member disposed to cover the opening and fixed to a surface of the wiring board opposite to the semiconductor chip, and disposed between the wiring board and the translucent member. And an electronic component electrically connected to the wiring board.

  In the solid-state imaging device according to the second aspect, in the first aspect, the electronic component is a surface-mounted component.

  In the solid-state imaging device according to the third aspect, in the first or second aspect, a conductive layer electrically connected to the electronic component is formed on the translucent member.

  The solid-state imaging device according to a fourth aspect is the solid-state imaging device according to the third aspect, wherein the conductive layer is formed of a light shielding material in a frame shape around a region corresponding to the imaging region in the translucent member. is there.

  An electronic camera according to a fifth aspect includes the solid-state imaging device according to any one of the first to fourth aspects.

  According to the present invention, a solid-state imaging device capable of saving space while reducing the influence on the imaging performance of foreign matters and scratches on a translucent member covering the imaging region, and an electronic camera using the same Can be provided.

1 is a schematic plan view schematically showing a solid-state imaging device according to a first embodiment of the present invention. It is a schematic sectional drawing in alignment with the A-A 'line in FIG. It is a schematic perspective view which shows an example of surface mount components. It is a schematic sectional drawing which shows typically the electronic camera by the 2nd Embodiment of this invention. It is a schematic plan view which shows typically the solid-state imaging device by the 3rd Embodiment of this invention. FIG. 6 is a schematic sectional view taken along line B-B ′ in FIG. 5.

  Hereinafter, a solid-state imaging device and an electronic camera according to the present invention will be described with reference to the drawings.

[First Embodiment]
FIG. 1 is a schematic plan view schematically showing the solid-state imaging device 1 according to the first embodiment of the present invention. FIG. 2 is a schematic cross-sectional view taken along the line AA ′ in FIG.

  The solid-state imaging device 1 according to the present embodiment includes a semiconductor chip 2 having an imaging region 2a, a wiring board 3, and a translucent plate 4 as a translucent member.

  In the present embodiment, the semiconductor chip 2 is an image sensor such as a CMOS or CCD configured as a chip, and a plurality of pixels (not shown) are two-dimensionally arranged in the imaging region 2a. The semiconductor chip 2 photoelectrically converts incident light incident on the imaging region 2a via the translucent plate 4 and outputs an image signal. For example, a read circuit (not shown) that reads the image signal by driving the pixel and a processing circuit (for example, an AD conversion circuit) that processes the output signal may be mounted on the semiconductor chip 2.

  In the present embodiment, the substrate material of the semiconductor chip 2 is silicon, and the semiconductor chip 2 is a so-called silicon chip. However, in the present invention, the substrate material of the semiconductor chip 2 is not necessarily limited to silicon.

  In the present embodiment, a flexible wiring board is used as the wiring board 3. The wiring board 3 has an opening 3 a formed at least in a region facing the imaging region 2 a of the semiconductor chip 2. The wiring board 3 has an external connection terminal 3b on the outer periphery. Further, wiring (not shown) and a surface mount component (SMD (Surface Mount Device)) 5 as an electronic component to be described later are mounted on the wiring board 3. In addition to the surface mount component 5, other surface mount components and other electronic components may be mounted on the wiring board 3.

  An electrode pad 2b is formed on the upper surface (surface on the imaging region 2a side) near the outer periphery of the semiconductor chip 2, and an electrode pad (not shown) is formed on the lower surface around the opening 3a in the wiring substrate 3. Are electrically connected by bumps 6 such as Au stud bumps, solder bumps or Au plated bumps. An adhesive 7 is formed between the vicinity of the outer periphery of the semiconductor chip 2 and the periphery of the opening 3a in the wiring board 3 (including the vicinity of the bump 6) over the entire periphery of the opening 3a. Are bonded together so that the airtightness of the space between the imaging region 2a and the translucent plate 4 is maintained. Further, the bonding by the bumps 6 is reinforced by the adhesive 7.

  Note that the bonding between the electrode pads is not limited to the bonding by the bumps 6. For example, instead of bonding by the bumps 6 or together with the bonding by the bumps 6, an ACF (Anisotropic Conductive Film) is formed between the electrode pads. ).

  The translucent plate 4 is disposed so as to cover the opening 3 a of the wiring substrate 3 on the upper surface (surface opposite to the wiring substrate 3) side of the wiring substrate 3, and is fixed to the upper surface of the wiring substrate 3. ing. A surface-mounted component 5 is disposed between the upper surface of the wiring board 3 around the opening 3a and the translucent plate 4, and the surface-mounted component 5 plays a role as a spacer. In the present embodiment, an adhesive 8 is formed between the upper surface around the opening 3 a in the wiring substrate 3 and the translucent plate 4 (including the vicinity of the surface mount component 5). Thereby, the translucent plate 4 is fixed to the upper surface of the wiring board 3. The adhesive 8 is provided over the entire circumference of the opening 3a in the wiring board 3, and the translucent plate 4 is maintained so that the airtightness of the space between the imaging region 2a and the translucent plate 4 is maintained. And the wiring board 3 are sealed.

  As a material of the translucent plate 4, for example, glass for measures against α rays (glass in which the amount of α rays emitted is sufficiently reduced), quartz that is an optical low-pass filter, or the like can be used.

  FIG. 3 is a schematic perspective view showing an example of the surface-mounted component 5. In this example, the surface-mounted component 5 is formed in a rectangular parallelepiped shape, and has an electrode 5a formed over five surfaces on one side and an electrode 5b formed over five surfaces on the other side. . Specific examples of the surface mount component 5 include a chip capacitor, a chip inductor, and a chip resistor. The surface mount component 5 is not limited to a component having two electrodes on both sides, but may be, for example, a three-terminal feedthrough capacitor having three electrodes.

  Although not shown in the drawing, each electrode of the surface mount component 5 is electrically connected to the wiring or the like of the wiring board 3 by solder or the like.

  For example, a capacitor may be used as the surface mount component 5, and this capacitor may be used as a bypass capacitor in order to reduce wiring noise. In this case, the capacitor as the surface mount component 5 is disposed so as to bypass the power supply line and the ground line in the vicinity of the terminal (electrode pad 2b) of the semiconductor chip 2 that is a noise generation source. Thereby, the expansion of noise to peripheral terminals can be suppressed by confining a current that becomes a noise generation source in the vicinity of the terminals. In this case, the bypass capacitor as the surface mount component 5 is preferably disposed at a position close to the semiconductor chip 2, and specifically, 5 mm from the output terminal of the semiconductor chip 2 on the external lead wiring of the wiring substrate 3. It is preferable to arrange at a position within 1 mm, more preferably at a position within 1 mm from the output terminal of the semiconductor chip 2.

  For the above reasons, the bypass capacitor is a preferred example of use of the surface mount component 5. Of course, an inductor or a resistor may be combined in addition to the capacitor for noise reduction, and an inductor or a resistor may be used as the surface mount component 5. Further, a three-terminal feed-through type bypass capacitor may be used as the surface mount component 5 so that low loss and low noise can be achieved even at high frequencies.

  By the way, when the distance between the surface of the imaging region 2a and the translucent plate 4 is small, foreign matter and scratches on the translucent plate 4 are projected on the surface of the imaging region 2a with high contrast and appear in the captured image. Therefore, the influence of foreign matter and scratches on the translucent plate 4 is increased. For this reason, the allowable foreign matter and scratch standards are severe, and as a result, the yield of the solid-state imaging device is reduced, and the cost cannot be increased.

  On the other hand, according to the present embodiment, the surface mount component 5 is disposed between the wiring board 3 and the translucent plate 4, and the surface mount component 5 functions as a spacer. The distance between the imaging region 2a of the semiconductor chip 2 can be increased. Therefore, it is possible to reduce the influence on the imaging performance such as foreign matter and scratches on the translucent plate 4, the allowable standards for foreign matters such as dust and scratches on the translucent plate 4 are relaxed, and the translucency is improved. The yield of the plate 4 and the solid-state imaging device 1 is improved, and the cost can be reduced. Further, according to the present embodiment, since the surface-mounted component 5 functions as a spacer, it is not necessary to arrange a special spacer member between the wiring board 3 and the translucent plate 4, thereby reducing the number of components. In this respect, the cost can be reduced.

  Furthermore, according to the present embodiment, the surface mount component 5 electrically connected to the wiring board 3 is disposed between the wiring board 3 and the translucent plate 4. The space between the light-sensitive plates 4 is effectively used as the arrangement space for the surface mount component 5. Therefore, according to the present embodiment, it is possible to reduce the area of the wiring board 3 and to save space as compared with the case where the surface mount component 5 is arranged elsewhere on the wiring board 3.

  In the present embodiment, a flexible wiring board is used as the wiring board 3. Therefore, since the wiring board 3 has flexibility, even if there is a difference in thermal expansion coefficient (linear thermal expansion coefficient) between the semiconductor chip 2 and the wiring board 3, it is caused by the bimetal effect due to environmental temperature change. Warpage of the imaging surface (imaging region 2a) of the semiconductor chip 2 due to stress is alleviated. In the present embodiment, similarly, a stress due to a change in environmental temperature is generated between the wiring board 3 and the translucent plate 4 due to a difference in thermal expansion coefficient. The thickness of the adhesive 8 provided between the wiring board 3 and the translucent plate 4 is increased at a location where the surface mount component 5 does not exist in a state where the distance between the translucent plate 4 is widened. . Therefore, according to the present embodiment, the stress relaxation effect by the adhesive 8 is enhanced, so that the warpage of the wiring substrate 3 and the warp of the imaging surface (imaging region 2a) of the semiconductor chip 2 are alleviated.

  However, in the present invention, the wiring board 3 may be a rigid wiring board such as a glass epoxy board or a build-up board. In that case, the material of the rigid wiring board is not particularly limited, and may be ceramic such as glass epoxy or alumina, glass, or the like.

[Second Embodiment]
FIG. 4 is a schematic cross-sectional view schematically showing an electronic camera 100 according to the second embodiment of the present invention.

  The solid-state imaging device 1 according to the first embodiment is incorporated in the body 101 of the electronic camera 100 according to the present embodiment. The electronic camera 100 according to the present embodiment is configured as a single-lens reflex type electronic still camera. However, the solid-state imaging device 1 according to the first embodiment is different from other electronic still cameras, video cameras, and mobile phones. You may incorporate in various electronic cameras, such as a camera mounted in.

  In electronic camera 100 according to the present embodiment, body 101 is provided with interchangeable photographic lens 102. The subject light that has passed through the photographing lens 102 is reflected upward by the quick return mirror 103 and forms an image on the screen 104. The subject image formed on the screen 104 is observed from the finder observation window 107 through the eyepiece lens 106 from the penta roof prism 105. When the release button (not shown) is fully pressed, the quick return mirror 103 jumps upward, and the subject image from the photographing lens 102 enters the solid-state imaging device 1 described above.

  The solid-state imaging device 1 is positioned and fixed in the body 101 by being attached to the body 101 via a bracket (not shown) and a position adjusting mechanism (not shown).

  According to the present embodiment, since the solid-state imaging device 1 according to the first embodiment is used, cost reduction, high image quality, and miniaturization can be achieved.

[Third Embodiment]
FIG. 5 is a partial schematic plan view schematically showing a solid-state imaging device 21 according to the third embodiment of the present invention, and corresponds to FIG. FIG. 6 is a schematic cross-sectional view along the line BB ′ in FIG. 5 and corresponds to FIG. 5 and FIG. 6 also show some wirings 3c to 3k. 5 and 6, elements that are the same as or correspond to those in FIGS. 1 and 2 are assigned the same reference numerals, and redundant descriptions thereof are omitted.

  This embodiment is basically different from the first embodiment in that a conductive layer 4a is formed on the lower surface of the translucent plate 4 in FIG. 6, and the translucent plate 4 serves as a wiring board. It is a point.

  Specifically, also in the present embodiment, the surface-mounted component 5 is a capacitor as shown in FIG. 3 and is used as a bypass capacitor. However, in the present embodiment, one side electrode of some of the surface mount components 5 is electrically connected to the GND wiring (ground wiring) of the wiring board 3 without passing through the conductive layer 4a on the lower surface of the translucent plate 4. However, one electrode of the remaining surface mounting component 5 is electrically connected to the GND wiring of the wiring board 3 via the conductive layer 4a on the lower surface of the translucent plate 4. . The conductive layer 4 a on the lower surface of the translucent plate 4 is a GND wiring by electrically connecting the one side electrode of the part of the surface mount component 5 to the GND wiring of the wiring board 3.

  That is, in the present embodiment, the one side electrode of each surface mount component 5 is electrically connected to the conductive layer 4a by soldering the upper surface to the conductive layer 4a on the lower surface of the translucent plate 4. ing. The GND wiring (ground wiring) 3c on the upper surface of the wiring board 3 is connected to one of the surface mount components 5 through the through via 3d, the GND wiring 3e on the lower surface, the through via 3f, and the GND wiring 3g on the upper surface. It is electrically connected to the side electrode. The GND wiring 3g on the upper surface of the wiring board 3 is soldered to the lower surface of the one side electrode of the one surface mount component 5. Similarly, a GND wiring (not shown) of the wiring board 3 is electrically connected to one side electrodes of some surface mount components 5. Note that the GND wiring 3 e on the lower surface of the wiring substrate 3 is electrically connected to one electrode pad 2 b of the semiconductor chip 2 through the bumps 6.

  The other electrode of each surface mount component 5 is electrically connected to the power supply wiring of the wiring board 3. For example, the other electrode of one surface mount component 5 is electrically connected to the power supply wiring 3 h by being soldered to the power supply wiring 3 h on the upper surface of the wiring board 3. Further, the other electrode of the other one surface-mounted component 5 is electrically connected to the power supply wiring 3 i by being soldered to the power supply wiring 3 i on the upper surface of the wiring board 3. The power supply wiring 3 i on the upper surface of the wiring substrate 3 is electrically connected to the other electrode pad 2 b of the semiconductor chip 2 through the through via 3 j, the power supply wiring 3 k on the lower surface and the bump 6.

  In the present embodiment, such an electrical connection allows each surface mount component 5 to function as a bypass capacitor.

  The conductive layer 4a on the translucent plate 4 is preferably coated with a protective film opened only in the soldering area with the surface mount component 5. In this case, the heat resistance and moisture resistance of the conductive layer 4a are improved, and the reliability is improved.

  And in this Embodiment, the conductive layer 4a is formed in the frame shape around the area | region corresponding to the imaging area 2a in the translucent board 4 with the light shielding material. Examples of the material of the conductive layer 4a include copper-plated wiring, Ag paste screen printing, and conductive layers formed by inkjet printing.

  According to the present embodiment, the same advantages as those of the first embodiment can be obtained. The solid-state imaging device 21 according to the present embodiment can be used in place of the solid-state imaging device 1 in the electronic camera 100 according to the second embodiment.

  Further, according to the present embodiment, since the conductive layer 4a electrically connected to the surface mount component 5 is formed on the translucent plate 4, the degree of freedom in wiring is improved and the electrical characteristics are improved. improves. For example, in this embodiment, the GND wiring is strengthened, the electric noise is reduced, the signal quality is improved, and the image quality is improved. In the present invention, for example, through vias may be formed in the translucent plate 4 and conductive layers may be formed on both sides of the translucent plate 4, and in this case, the degree of freedom of wiring is further improved.

  Furthermore, according to the present embodiment, the conductive layer 4a is formed of a light shielding material in the shape of a frame around the area corresponding to the imaging area 2a in the translucent plate 4, and also functions as a light shielding mask. The stray light to areas other than the second imaging region 2a is shielded, and electrical and optical noise caused by the stray light is reduced, and the image quality is improved. However, in the present invention, the conductive layer 4a may be a conductive layer having no light shielding property such as an ITO (Indium Tin Oxide) film.

  In the present embodiment, as described above, the conductive layer 4a formed on the translucent plate 4 is the GND wiring. However, in the present invention, the use of the conductive layer 4a is not limited to the GND wiring, A plurality of wirings having different functions may be formed on the insulating plate 4.

  Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments.

  For example, in the present invention, another electronic component may be disposed between the wiring board 3 and the semiconductor chip 2 instead of the surface mount component 5.

DESCRIPTION OF SYMBOLS 1,21 Solid-state imaging device 2 Semiconductor chip 2a Imaging area 3 Wiring board 3a Opening 4 Translucent board (translucent member)
5 Surface mount components (electronic components)

Claims (5)

A semiconductor chip having an imaging region;
A wiring board having an opening at least in a region corresponding to the imaging region and bonded to a surface of the semiconductor chip on the imaging region side;
A translucent member disposed so as to cover the opening and fixed to a surface of the wiring board opposite to the semiconductor chip;
An electronic component disposed between the wiring board and the translucent member and electrically connected to the wiring board;
A solid-state imaging device comprising:   The solid-state imaging device according to claim 1, wherein the electronic component is a surface mount component.   The solid-state imaging device according to claim 1, wherein a conductive layer electrically connected to the electronic component is formed on the translucent member.   The solid-state imaging device according to claim 3, wherein the conductive layer is formed of a light shielding material in a frame shape around a region corresponding to the imaging region in the translucent member.   An electronic camera comprising the solid-state imaging device according to claim 1.

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