JP2015026770A - Semiconductor laminate structure and semiconductor element using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor laminate structure which reduces warpage or has a small X-ray half bandwidth, the semiconductor laminate structure in which AlGaN semiconductor layers each having a lattice constant or a thermal expansion coefficient different from those of a substrate are sequentially provided; and provide a semiconductor element using the semiconductor laminate structure.SOLUTION: In the semiconductor laminate structure in which AlGaN-based semiconductor layers composed of a buffer layer, a distortion relaxation layer, and a device layer are sequentially provided on the substrate, the distortion relaxation layer is composed of a graded composition layer and a superlattice layer and one of the graded composition layer and the superlattice layer exists between two layers composed of the other layers.

Description

  The present invention is a semiconductor laminated structure used for semiconductor elements such as field effect transistors (FETs), light emitting diodes (LEDs), etc., and particularly a semiconductor using mainly a Si substrate that suppresses warpage and has excellent crystal quality. The present invention relates to a laminated structure and a semiconductor element using the same.

BACKGROUND ART Nitride semiconductors have been actively researched and developed in recent years as active materials for electronic devices such as field effect transistors or light receiving and emitting devices in the short wavelength band from the visible light region to the ultraviolet light region.

  Generally, the nitride semiconductor is formed on a substrate made of sapphire, SiC, Si, or the like. In particular, a Si single crystal substrate (hereinafter referred to as “Si substrate”) has a large area and is available at a low price, is excellent in crystallinity and heat dissipation, is easy to cleave and etch, and has a mature process technology. Has many advantages.

  However, since the nitride semiconductor and the Si substrate have greatly different lattice constants and thermal expansion coefficients, when the nitride semiconductor is grown on the Si substrate, the grown nitride semiconductor warps as a wafer or cracks. And pits (point defects) occur. In particular, when the warpage is large, the process becomes difficult as device processing, and the breakdown voltage as an element is low, which is a big problem.

As a means for solving the above problem, a technique for suppressing warpage or cracking by forming a buffer layer between the Si substrate and the nitride semiconductor layer is known. For example, in Patent Document 1, a buffer layer (buffer layer) made of a nitride semiconductor and made of a compositionally graded Al _x Ga _1-X N or the like is formed on a Si substrate. A semiconductor material having gallium nitride formed thereon is disclosed.

In Patent Document 2, an AlN-based superlattice composite layer formed by alternately laminating a plurality of high Al-containing layers and low Al-containing layers on a Si substrate is formed, and the AlN-based superlattice composite buffer layer is formed. A nitride semiconductor device having a nitride semiconductor layer formed thereon is disclosed.

However, none of the semiconductor materials described in Patent Documents 1 and 2 is sufficient for suppressing warpage or cracks generated in the nitride semiconductor layer.

On the other hand, in Patent Documents 3 and 4, a GaN buffer layer having a thickness of 30 nm is provided on a sapphire substrate having a diameter of 2 inches and a thickness of 330 μm in order to obtain a semiconductor multilayer substrate with little warpage. It is disclosed that the warp of a semiconductor multilayer structure in which an intermediate layer composed of an InGaN layer substituted with In is provided and an AlGaN-based film is formed with a thickness of 20 to 30 nm is 10 to 25 μm.

However, the Young's modulus of the sapphire substrate used in Patent Documents 3 and 4 is 2 to 3 times the Young's modulus of the Si substrate, so that the warpage is relatively small, and the diameter of the substrate is changed from 2 inches to 4 inches. If it is larger, the warpage is expected to be about 4 times larger. Further, the film thickness of AlGaN on the intermediate layer for strain relaxation is small, and the strain relaxation effect of the intermediate layer has not been sufficiently confirmed.

Special table 2004-524250 gazette JP 2007-67077 A JP 2008-211246 A JP 2007-60140 A

  An object of the present invention is to provide a semiconductor multilayer structure in which AlGaN-based semiconductor layers having different lattice constants or thermal expansion coefficients from those of a substrate are sequentially provided, and a semiconductor multilayer structure having a reduced X-ray half-value width and a semiconductor multilayer structure using the same It is to provide a semiconductor device.

  In the semiconductor stacked structure, the present inventors have a semiconductor stacked structure in which the strain relaxation layer is composed of a composition gradient layer and a superlattice layer, and one of the composition gradient layer and the superlattice layer exists between two layers. It has been found that the above problems can be solved. That is, according to the present invention, the following semiconductor multilayer structure and a semiconductor element using the same are provided.

[1] A semiconductor laminated structure in which an AlGaN-based semiconductor layer or an InAlN-based semiconductor layer including a buffer layer, a strain relaxation layer, and a device layer is sequentially provided on a substrate, and the strain relaxation layer includes a composition gradient layer and a superlattice layer. A semiconductor laminated structure in which one of the composition gradient layer and the superlattice layer exists in the middle of the other two layers.

[2] The semiconductor multilayer structure according to [1], wherein the superlattice layer exists in the middle of two composition gradient layers.

[3] The average composition of the superlattice layer is the final composition of one composition gradient layer Al _X1 Ga _{1 -X1} N close to the substrate and the _first composition gradient layer Al _X2 Ga _{1 -X2} N The semiconductor multilayer structure according to [2], which matches the composition to be formed.

[4] Al content ratio X1 of _one composition gradient layer Al _X1 Ga _1-X1 N close to the substrate is ₁ to 0.45 in the film growth direction, Al content ratio of the other composition gradient layer Al _X2 Ga _1-X2 N The semiconductor multilayer structure according to [3], wherein X2 is _0.45 to 0 in the film growth direction, and the average composition of the superlattice layer is Al _0.45 Ga _0.55 N.

[5] There are two superlattice layers, the average composition of which is the same, and the composition gradient layer Al _X Ga _1-X N sandwiched between the two superlattice layers is the superlattice layer X The semiconductor multilayer structure according to [1], wherein the Al content of the average composition changes from 0.

[6] The _{X of the} composition gradient layer Al _X Ga _1-X N decreases continuously in the film growth direction, or decreases stepwise every 10 to 100 nm in the film growth direction. [5] The semiconductor multilayer structure according to any one of [5].

[7] The above-described [1] to [6], wherein one composition constituting the superlattice layer is AlN, the other composition is Al _X3 Ga _1-X3 N, and X3 is 0 to 0.2. The semiconductor laminated structure in any one.

[8] When one composition constituting the superlattice is AlN, the other composition is Al _X3 Ga _1-X3 N, and X3 is 0 to 0.2, the film thickness ratio is 1: 2 The semiconductor multilayer structure according to [7], wherein the semiconductor multilayer structure is 1: 4.

[9] The semiconductor multilayer according to any one of [1] to [8], wherein the composition gradient layer has a thickness of 0.1 to 1.0 μm, and the superlattice layer has a thickness of 1.0 to 5.0 μm. Construction.

[10] The semiconductor multilayer structure according to any one of [1] to [9], wherein the device layer includes a channel layer and a barrier layer.

[11] The channel layer is i-GaN and the barrier layer is i-Al _X Ga _1-X N (0.1 ≦ X ≦ 0.3) or i-In _X Al _1-X N (0.1 ≦ The semiconductor stacked structure according to [10], wherein X ≦ 0.3).

[12] The light emitting / receiving layer, in which the device layer is formed by sequentially laminating a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer opposite to the first conductive type. The semiconductor multilayer structure according to any one of to [9].

[13] The semiconductor multilayer structure according to any one of [1] to [12], wherein the substrate is a Si single crystal.

[14] A HEMT device in which a source electrode, a gate electrode, and a drain electrode are formed on the semiconductor stacked structure according to [10] or [11].

[15] A light emitting and receiving element in which a cathode electrode and an anode electrode are formed on the semiconductor laminated structure of [12].

It is a conceptual diagram of the semiconductor laminated structure of the comparative example 1 (structure 1). It is a conceptual diagram of the semiconductor laminated structure of the comparative example 2 (structure 2). It is a conceptual diagram of the semiconductor laminated structure of the comparative example 3 (structure 3). It is a conceptual diagram of the semiconductor laminated structure of this invention Example 1 (structure 4). It is a conceptual diagram of the semiconductor laminated structure of this invention Example 2 (structure 5). It is a figure which shows the method of measuring the curvature amount of the wafer which has a semiconductor laminated structure of this invention and a comparative example. It is a figure which shows the curvature amount of the wafer which has a semiconductor laminated structure of this invention and a comparative example. It is a figure which shows the (0004) plane X-ray-diffraction half-width of the wafer which has a semiconductor laminated structure of this invention and a comparative example. It is a figure which shows the (20-24) plane X-ray-diffraction half value width of the wafer which has a semiconductor laminated structure of this invention and a comparative example. It is a figure which shows the sheet resistance of the wafer which has a semiconductor laminated structure of this invention and a comparative example. It is a figure which shows the sheet | seat carrier density of the wafer which has a semiconductor laminated structure of this invention and a comparative example. It is a figure which shows the carrier mobility of the wafer which has the semiconductor laminated structure of this invention and a comparative example.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiments, and changes, modifications, and improvements can be added without departing from the scope of the invention.

1 to 3 are conceptual diagrams of semiconductor stacked structures of Comparative Examples 1 to 3 (Structures 1 to 3) for the present invention, and FIGS. 4 and 5 are semiconductor stacked layers of Embodiments 1 and 2 of the present invention. It is a conceptual diagram of a structure. For convenience of illustration, the ratio of the thickness of each layer in FIGS. 1 to 5 does not reflect the actual ratio. The semiconductor laminated structure shown in FIGS. 1 to 5 is obtained by forming an AlN layer as a buffer layer or an AlGaN layer in addition to a Si substrate on a Si substrate, and then sequentially laminating a strain relaxation layer and a device layer. is there. Since these semiconductor multilayer structures are formed by sequentially epitaxially growing a buffer layer, a strain relaxation layer, and a device layer on a substrate, the semiconductor multilayer structure may be referred to as a semiconductor epitaxial substrate (or a semiconductor epi substrate). . FIGS. 1 to 5 show HEMT elements including a channel layer made of i-GaN and a barrier layer made of i-Al _0.20 Ga _0.80 N with different strain relaxation layer configurations. It is a thing. The strain relaxation layer is composed of at least one of a composition gradient layer or a superlattice layer, and the present invention is characterized by a combination of a composition gradient layer and a superlattice layer. Hereinafter, each of the composition gradient layer and the superlattice layer is treated as one layer.

A HEMT element can be formed by forming, for example, a source electrode, a gate electrode, and a drain electrode in the semiconductor stacked structure of FIGS. On the other hand, as a device layer, a light receiving / emitting layer formed by sequentially laminating a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type, and further receiving electrodes are provided. A light emitting element can be formed.

In the present invention, the substrate is appropriately selected according to the composition and structure of the buffer layer, strain relaxation layer, and device layer formed thereon, or the formation method of each layer. For example, as a substrate, silicon, germanium, sapphire, silicon carbide, oxide (ZnO, LiAlO ₂ , LiGaO ₂ , MgAl ₂ O ₄ , (LaSr) (AlTa) O ₃ , NdGaO ₃ , MgO, etc.), Si—Ge An alloy, a Group 3 to Group 5 compound of the periodic table (GaAs, AlN, GaN, AlGaN, AlInN), boride (such as ZrB2), and the like can be used. However, the thermal expansion coefficient of the substrate at room temperature to 1200 ° C. is preferably smaller than the thermal expansion coefficient of the film made of Al _X Ga _1-X N formed on the substrate, and in particular, the Si substrate is in terms of quality and cost. Preferably, the thickness of the Si substrate is 0.42 to 1.00 mm.

The buffer layer is formed of a single layer or a plurality of layers made of various Group 3 nitride semiconductors depending on the strain relaxation layer formed thereon, the composition and structure of the device layer, or the formation method of each layer. In the present invention, the buffer layer is made of _{Al X Ga 1-X} N, consists of one or two layers of X ≧ 0.2, 30 to 500 nm are preferred as the thickness of the total, 50 to 150 nm is more preferable. This buffer layer is formed by a known film formation method such as MOCVD method or MBE method. It is preferable that the film structure has as little strain and dislocation density as possible, and the dislocation density is preferably 1 × 10 ¹¹ / cm ³ or less in order to affect the quality of a film to be formed later.

A strain relaxation layer is formed next to the buffer layer. The strain relaxation layer is preferably composed of a composition gradient layer and a superlattice layer, and one of the composition gradient layer and the superlattice layer is preferably present between two layers composed of the other. More preferably, the superlattice layer is present in the middle of the two composition gradient layers, and the average composition of the superlattice layer is the final composition of one composition gradient layer Al _X1 Ga _{1 -X1} N close to the substrate. It is particularly preferable to match the first composition of the other composition gradient layer Al _X2 Ga _{1 -X2} N. As a good example, the Al content _{X1 of one} composition gradient layer Al _X1 Ga ₁ -X1 N close to the substrate is ₁ to 0.45 in the film growth direction, and the other composition gradient layer Al _X2 Ga ₁ -X2 N contains Al. Similarly, the rate X2 is _0.45 to 0 in the film growth direction, and the average composition of the superlattice layer is Al _0.45 Ga _0.55 N.

On the other hand, a structure in which the composition gradient layer is in the middle of the two superlattice layers may be employed. There are two superlattice layers, both of which have the same average composition, and _{X of} the composition gradient layer Al _X Ga _1-X N sandwiched between the two superlattice layers is Al of the average composition of the superlattice layer An example thereof is that the content changes from 0 to 0.

It is preferable that the composition gradient layer has a composition that continuously decreases in the film growth direction or decreases stepwise in a film growth direction every 10 nm to 100 nm. It is preferable that one composition constituting the superlattice layer is AlN, the other composition is Al _X3 Ga _{1 -X3} N, and X3 is 0 to 0.2. When the superlattice pair is AlN and Al _X3 Ga _1-X3 N, the film thickness ratio is preferably 1: 2 to 1: 4. In the case of the combination of the film thickness ratios, when the pair of superlattices is AlN and Al _0.15 Ga _0.85 N, the Al composition ratio in the average composition of the superlattice layer is 0.45 to 0.30. Furthermore, the thickness of the composition gradient layer is preferably 0.1 to 1.0 μm, and the thickness of the superlattice layer is preferably 1.0 to 5.0 μm.

When the semiconductor multilayer structure of the present invention is applied to a HEMT element, a channel layer and a barrier layer are provided after the strain relaxation layer, and a spacer layer is appropriately provided between the two layers. The channel layer is preferably made of i-GaN, and the barrier layer is preferably i-Al _X Ga _1-X N (0.1 ≦ X ≦ 0.3). In order to improve the mobility of the two-dimensional electron gas, an AlN spacer layer having a thickness of 0.5 to 1.5 nm is appropriately formed between the channel layer and the barrier layer. Incidentally, with respect to i-GaN of the channel _{layer, i-In X Al 1-} X N (0.1 ≦ X ≦ 0.3) can also be used as a barrier layer.

  On the other hand, when the semiconductor multilayer structure of the present invention is applied to a light emitting / receiving element, a light receiving / emitting layer is provided after a buffer layer and a strain relaxation layer are provided on a substrate like a HEMT element. In this case, the light emitting layer includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type. For example, an n-type semiconductor layer having a thickness of 0.1 μm to 1.0 μm, an active layer having a thickness of 2 nm to 20 nm, and a p-type semiconductor layer having a thickness of 0.1 μm to 1.0 μm are sequentially formed. Preferably, GaN can be used as the n-type semiconductor layer and p-type semiconductor layer, and InGaN can be used as the active layer. Thereafter, a cathode electrode and an anode electrode are provided on the light emitting layer, or one electrode is formed on the other surface of the substrate (opposite to the laminated film), whereby a light emitting element can be manufactured.

(Example 1: Semiconductor laminated structure in which a composition gradient layer is interposed between two superlattice layers as a strain relaxation layer)
In this example, a (111) -plane Si single crystal substrate having a diameter of 4 inches and a thickness of 525 μm was first used and placed in a reaction vessel of a predetermined MOCVD apparatus. In the MOCVD apparatus, at least H ₂ , N ₂ , TMG (trimethyl gallium), TMA (trimethyl aluminum), and NH ₃ can be supplied into the reaction tube as a carrier gas or a reaction gas. While flowing hydrogen as a carrier gas at a flow rate of 20 SLM and nitrogen at a flow rate of 10 SLM, while maintaining the pressure in the reaction tube at 100 Torr, the substrate was heated to 1210 ° C. and held for 10 minutes to perform thermal cleaning of the substrate.

Then, while maintaining the substrate temperature at 1030 ° C. while supplying TMA and hydrogen as its carrier gas, and supplying NH ₃ and hydrogen as its carrier gas, AlN having a thickness of 80 nm as a buffer layer is supplied. A layer was first formed. The molar ratio of the supplied reaction gas, that is, the ratio of Group 5 gas / Group 3 gas (NH ₃ / TMA) was 5600, and the pressure in the reaction tube was 100 Torr.

Then, the substrate temperature was set to 1130 ° C., the reaction gas molar ratio (Group 5 gas / Group 3 gas) to be supplied was 3900, and Al _0.30 Ga _0.70 N having a film thickness of 30 nm was formed. Thus, a buffer layer composed of an AlN layer and an Al _0.3 Ga _0.7 N layer was formed.

Next, the first superlattice layer was formed while maintaining the substrate temperature at 1130 ° C. As with the buffer layer, the supply amounts of TMA, TMG, and NH ₃ are adjusted as supply gases, and AlN and Al _0.15 Ga _0.85 N are alternately stacked at a thickness of 6 nm and 15 nm, respectively, and 1.25 μm. Thickness.

Next, a composition gradient layer was formed. The layer composed of Al _X3 Ga _1-X3 N as the composition gradient layer maintains the substrate temperature at 1130 ° C., the pressure is 100 Torr, and the molar ratio of reaction gas to be supplied (Group 5 gas / Group 3 gas) from 4000 Instead of 2800, the Al composition ratio X3 was decreased from 0.45 to 0, and a composition gradient layer having a thickness of 400 nm was formed. The Al composition was continuously reduced in the film growth direction.

Next, a second superlattice layer having a thickness of 1.25 μm was formed under the same conditions as the first superlattice layer while maintaining the substrate temperature at 1130 ° C. The total thickness of the strain relaxation layer including the first superlattice layer, the composition gradient layer, and the second superlattice layer is 2.9 μm.

While maintaining the substrate temperature at 1130 ° C., the pressure is 100 Torr, the supplied reactive gas molar ratio (Group 5 gas / Group 3 gas) is 2800, and the channel layer is an i − having a film thickness of 1.0 μm. A GaN layer was formed.

After forming the channel layer, the reaction gas molar ratio (Group 5 gas / Group 3 gas) to be supplied was supplied in the same manner as the AlN buffer layer while the substrate temperature was maintained at 1130 ° C. to form an AlN spacer layer having a thickness of 1 nm. . Subsequently, a barrier layer of Al _0.20 Ga _0.80 N was formed to a thickness of 20 nm. Thus, a semiconductor multilayer structure (Example 1) was obtained.

(Example 2: Semiconductor laminated structure in which a superlattice layer is interposed between two composition gradient layers as a strain relaxation layer)
As in Example 1, a (111) -plane Si single crystal substrate having a diameter of 4 inches and a thickness of 525 μm was first installed in a reaction vessel of a predetermined MOCVD apparatus, and hydrogen was flowed at 20 SLM and nitrogen was flowed at 10 SLM. The substrate was heated up to 1210 ° C. while maintaining the pressure in the reaction tube at 100 Torr while being flowed in, and then held for 10 minutes to perform thermal cleaning of the substrate.

Thereafter, while the substrate temperature is lowered and maintained at 1030 ° C., TMA and hydrogen as its carrier gas are supplied, and NH ₃ and hydrogen as its carrier gas are supplied to thereby form AlN having a film thickness of 110 nm as a buffer layer. A layer was first formed. The molar ratio of the supplied reaction gas, that is, the ratio of Group 5 gas / Group 3 gas (NH ₃ / TMA) was 5600, and the pressure in the reaction tube was 100 Torr.

Next, a first composition gradient layer was formed. The layer composed of Al _X3 Ga _1-X3 N as the composition gradient layer maintains the substrate temperature at 1130 ° C., the pressure is 100 Torr, and the reaction gas molar ratio (Group 5 gas / Group 3 gas) is increased from 5600 to 4000. In other words, the Al composition ratio X3 was decreased from 1.0 to 0.45 to form a composition gradient layer having a thickness of 400 nm. The Al composition was continuously reduced in the film growth direction.

Next, a superlattice layer was formed while maintaining the substrate temperature at 1130 ° C. Similarly to the buffer layer, the supply amounts of TMA, TMG, and NH ₃ are adjusted as supply gases, and AlN and Al _0.15 Ga _0.85 N are alternately stacked with a thickness of 6 nm and 15 nm, respectively, to 2.1 μm. Thickness.

Furthermore, a 400 nm-thick second composition gradient layer was formed under the same conditions as the first composition gradient layer. The total thickness of the strain relaxation layer including the first composition gradient layer, the superlattice layer, and the second composition gradient layer is 2.9 μm as in the first embodiment.

  The channel layer, the spacer layer, and the barrier layer were formed in the same layer under the same conditions as in Example 1.

(Comparative Examples 1-3)
The configuration of the strain relaxation layer is different from that of Example 1 and Example 2. Comparative Example 1 is a superlattice layer only, Comparative Example 2 is a superlattice layer on the composition gradient layer, and Comparative Example 3 is a composition on the superlattice layer. A gradient layer was formed. The total thickness of the strain relaxation layer was 2.9 μm as in the case of Example 1 and Example 2.

(Measures the amount of warpage of the semiconductor laminated structure)
The amount of warpage of the semiconductor epiwafers of Examples 1 and 2 and Comparative Examples 1 to 3 was measured. The amount of warpage was measured as shown in FIG. 6, and the average of the orientation flat direction of the substrate and the direction perpendicular thereto was taken. The measurement results are shown in FIG. The amount of warpage of the wafer was smallest in Example 2 (Structure 5).

(X-ray diffraction half-width measurement)
FIGS. 8 and 9 show the measurement results of the rocking curve half-value widths by X-ray diffraction of the (0004) plane and (20-24) plane of the semiconductor epiwafers of Example 1, Example 2, and Comparative Examples 1 to 3, respectively. Show. In both surfaces, Example 2 had the smallest half width, and Example 1 also had a relatively small half width.

(Dislocation density measurement)
Table 1 shows the results of measuring the screw dislocation density and the edge dislocation density of the semiconductor epiwafers of Example 1, Example 2, and Comparative Examples 1 to 3. In Example 2, both the screw dislocation density and the edge dislocation density were small, and Example 1 also had a relatively small dislocation density.

(Measurement of sheet resistance, sheet carrier concentration, and carrier mobility)
Regarding sheet resistance, Example 1 (Structure 4) was the smallest. Regarding the sheet carrier density, no significant difference was found between Example 1 and Example 2, and Comparative Examples 1 to 3. The carrier mobility has a large data width except for Comparative Example 2, but comparatively large carrier mobility was obtained in Example 1 and Example 2.

From the measurement results of the warpage of the wafer, the X-ray half width, and the dislocation density, Example 2 was the best, and Example 1 was also relatively good. In particular, Example 2 is particularly preferable because warpage of the wafer affects device fabrication. The carrier mobility was also affected by the warpage of the wafer and the X-ray half width, so that relatively preferable results were obtained in Example 1 and Example 2.

The semiconductor multilayer structure of the present invention is used for a semiconductor element such as a field effect transistor (FET, HEMT) or a light emitting / receiving element.

Claims (15)

A semiconductor laminated structure in which an AlGaN-based semiconductor layer or an InAlN-based semiconductor layer comprising a buffer layer, a strain relaxation layer, and a device layer is sequentially provided on a substrate, wherein the strain relaxation layer comprises a composition gradient layer and a superlattice layer. A semiconductor laminated structure in which one of an inclined layer and a superlattice layer exists between two layers composed of the other. The semiconductor multilayer structure according to claim 1, wherein the superlattice layer exists in the middle of two composition gradient layers. The average composition of the superlattice layer is formed at the end of _one composition gradient layer Al _X1 Ga _1-X1 N close to the substrate and the _first composition gradient layer Al _X2 Ga _1-X2 N. The semiconductor multilayer structure according to claim 2, which matches the composition. The Al content _{X1 of one} composition gradient layer Al _X1 Ga ₁ -X1 N close to the substrate is ₁ to 0.45 in the film growth direction, and the Al content _{X2 of the} other composition gradient layer Al _X2 Ga ₁ -X2 N is a film. The semiconductor multilayer structure according to claim 3, wherein _0.45 to 0 in the growth direction and the average composition of the superlattice layer is Al _0.45 Ga _0.55 N. There are two superlattice layers, both of which have the same average composition, and _{X of} the composition graded layer Al _X Ga _1-X N sandwiched between the two superlattice layers is the average composition of the superlattice layer The semiconductor multilayer structure according to claim 1, which changes from Al content to 0. The _{X in the} composition gradient layer Al _X Ga _1-X N continuously decreases in the film growth direction, or decreases stepwise in the film growth direction every 10 nm to 100 nm in film thickness. A semiconductor laminated structure according to claim 1. 7. The semiconductor according to claim 1, wherein one composition constituting the superlattice layer is AlN, the other composition is Al _X3 Ga _1-X3 N, and X3 is 0 to 0.2. Laminated structure. When one composition constituting the superlattice is AlN, the other composition is Al _X3 Ga _1-X3 N, and X3 is 0 to 0.2, the film thickness ratio is 1: 2 to 1: 4. The semiconductor laminated structure according to claim 7. The semiconductor multilayer structure according to claim 1, wherein the composition gradient layer has a thickness of 0.1 to 1.0 μm, and the superlattice layer has a thickness of 1.0 to 5.0 μm. The semiconductor multilayer structure according to claim 1, wherein the device layer includes a channel layer and a barrier layer. The channel layer is i-GaN and the barrier layer is i-Al _X Ga _1-X N (0.1 ≦ X ≦ 0.3) or i-In _X Al _1-X N (0.1 ≦ X ≦ 0) The semiconductor multilayer structure according to claim 10, which is .3). 10. The light emitting / receiving layer according to claim 1, wherein the device layer is a light emitting / receiving layer formed by sequentially laminating a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer opposite to the first conductive type. A semiconductor laminated structure according to claim 1. The semiconductor multilayer structure according to claim 1, wherein the substrate is a Si single crystal. A HEMT device in which a source electrode, a gate electrode, and a drain electrode are formed on the semiconductor multilayer structure according to claim 10. A light emitting and receiving element comprising a cathode and an anode formed on the semiconductor multilayer structure according to claim 12.