JP6654409B2 - Substrate for group III nitride semiconductor device and method of manufacturing the same - Google Patents

Description

  The present invention relates to a group III nitride semiconductor device substrate and a method for manufacturing the same, and more particularly to a group III nitride semiconductor device substrate obtained by epitaxially growing a plurality of semiconductor layers made of a group III nitride semiconductor on a Si single crystal substrate. .

Conventionally, the silicon single crystal substrate, B, Al, Ga, group III nitride is a compound of a group III element and nitrogen, such as _{In (B a Al b Ga c} In d N, a + b + c + d BACKGROUND ART There has been known a substrate for a group III nitride semiconductor device obtained by epitaxially growing a semiconductor (hereinafter, referred to as a group III nitride semiconductor) composed of = 1, 0 ≦ a, b, c, d ≦ 1). A group III nitride semiconductor device is formed using the group III nitride semiconductor device substrate. Here, as a base substrate of a group III nitride semiconductor device substrate, a silicon single crystal substrate and a sapphire substrate are generally used. However, a silicon single crystal substrate is inexpensive as compared with a sapphire substrate, and has a large size. This is advantageous in that the aperture can be easily formed. Therefore, the silicon single crystal substrate is made of various group III nitrides such as HEMT (High Electron Mobility Transistor), MESFET (Metal-Semiconductor Field Effect Transistor), SBD (Schottky Barrier Diode) and LED (Light Emitting Diode). Suitable for mass production of semiconductor devices.

  However, since silicon and the group III nitride have a large difference in lattice constant between them, problems such as distortion, dislocation, and wafer warpage due to a difference in lattice constant and a difference in thermal expansion coefficient are likely to occur. In order to solve these problems, active research has been made on a technique for providing a buffer layer made of a group III nitride in a region located between a silicon substrate and a functional laminate functioning as a group III nitride semiconductor device. Is being done.

  For example, Patent Literature 1 discloses that a gallium nitride-based compound semiconductor substrate using a Si single crystal substrate has, as a buffer layer, a repetitive structure of a superlattice structure in which AlN and GaN are alternately stacked and a GaN layer having a thickness of 200 nm or more. It is described that the dislocation prevents the occurrence of dislocation and reduces the warpage of the substrate.

  Patent Literature 2 discloses that a buffer layer has a repeating structure of a superlattice structure in which AlN and GaN are alternately stacked and a GaN layer having a thickness of 20 to 400 nm.

JP 2012-79952 JP 2008-205117 A

  Here, the thickness of the active layer disclosed in Patent Document 1 is 1000 to 3500 nm. Further, the thickness of the electron transit layer (channel layer) disclosed in Patent Document 2 is 1800 nm. In each of Patent Documents 1 and 2, the thickness of the functional laminate is relatively large. In Patent Literatures 1 and 2, it is considered that the flatness of the entire substrate is ensured to some extent by forming the functional laminate to be thick, so that the flatness due to the buffer layer is less likely to be adversely affected.

  According to studies by the present inventors, in a normally-off HEMT, when the electron transit layer is provided with a relatively small thickness of 100 nm or less, the channel can be cut off even if the depletion layer is narrow. It has been found to be preferable in that the threshold voltage can be shifted to the positive side. However, when the thickness of the functional laminate is smaller than that of Patent Literatures 1 and 2, the flatness of the substrate for a group III nitride semiconductor device is greatly affected by the buffer layer provided below the functional laminate, and the vertical It has been found by the present inventors that the leak characteristics in the direction also deteriorate. When the thickness of the functional laminate is small, the required withstand voltage cannot be obtained unless the withstand voltage in the buffer layer is high.

  Therefore, an object of the present invention is to provide a substrate for a group III nitride semiconductor device which is suitable for HEMT having a thin electron transit layer and has both good flatness and sufficient pressure resistance.

  The present inventors have diligently studied how to solve the above-described problem, and provide a buffer layer with a composite layer in which a superlattice layer and an intermediate layer satisfying a relationship of a predetermined thickness are alternately and repeatedly laminated. The present inventors have found that a substrate for a group III nitride semiconductor device having excellent flatness and sufficient pressure resistance can be obtained, and have completed the present invention.

That is, the gist configuration of the present invention is as follows.
(1) A group III nitride semiconductor device substrate having a Si single crystal substrate and a buffer layer on the Si single crystal substrate,
The buffer layer has an initial buffer layer on the Si single crystal substrate, and a composite layer on the initial buffer layer, in which a superlattice layer and an intermediate layer are alternately and repeatedly stacked,
The composite layer has a carbon concentration of 1 × 10 ¹⁹ atoms / cm ³ or more,
The superlattice layer is formed of a laminate in which a first layer made of AlN and a second layer made of Al _x Ga ₁ -xN (0.05 <x <0.20) are alternately and repeatedly laminated. The thickness of the superlattice layer is greater than the thickness of the intermediate layer,
The group III nitride semiconductor device substrate, wherein the intermediate layer is made of Al _y Ga _1-y N (0 ≦ y <0.03) and has a thickness of 130 nm or more and 170 nm or less.

(2) The substrate for a group III nitride semiconductor device according to (1), wherein the intermediate layer comprises a GaN layer.

(3) having a functional laminate made of a group III nitride semiconductor on the buffer layer,
The functional laminate is a laminate including an electron transit layer, an electron supply layer, and a cap layer in this order, and the thickness of the electron transit layer is 10 nm or more and 100 nm or less. The substrate for a group III nitride semiconductor device according to the above item 2).

(4) The group III nitride semiconductor device substrate according to (3), further including a carbon concentration gradient layer having a carbon concentration gradient between the buffer layer and the functional laminate.

(5) forming an initial buffer layer on the Si single crystal substrate;
A composite layer forming step of forming a composite layer in which a super lattice layer and an intermediate layer are alternately and repeatedly laminated on the initial buffer layer,
A functional laminate forming step of forming a functional laminate made of a group III nitride semiconductor on the composite layer,
The superlattice layer comprises a laminate in which a first layer made of AlN and a second layer made of Al _x Ga ₁ -xN (0.05 <x <0.20) are alternately and repeatedly laminated,
The intermediate layer is made of Al _y Ga _1-y N (0 ≦ y <0.03),
The composite layer has a carbon concentration of 1 × 10 ¹⁹ atoms / cm ³ or more,
In the composite layer forming step, the superlattice layer is formed to be thicker than the intermediate layer, and the intermediate layer has a thickness of 130 nm or more and 170 nm or less, for a group III nitride semiconductor device. Substrate manufacturing method.

  According to the present invention, the composite layer in which the superlattice layer and the intermediate layer satisfying the relationship of the predetermined thickness are alternately laminated is provided in the buffer layer, so that the buffer layer has both good flatness and sufficient pressure resistance III. A substrate for a group III nitride semiconductor device can be provided.

1 is a schematic cross-sectional view illustrating a group III nitride semiconductor device substrate 100 according to an embodiment of the present invention. FIG. 6 is a schematic cross-sectional view illustrating a group III nitride semiconductor device substrate 200 according to another embodiment of the present invention. 3 is a TEM cross-sectional photograph of the substrate for a group III nitride semiconductor device according to Example 1. (A) is an OM dark-field image of the group III nitride semiconductor device substrate according to Example 1, and (B) is an OM dark-field image of the group III nitride semiconductor device substrate according to Comparative Example 1. is there. (A) is an AFM image of the group III nitride semiconductor device substrate according to Example 1, and (B) is an AFM image of the group III nitride semiconductor device substrate according to Comparative Example 1. (A) is a graph showing current-voltage characteristics in the vertical direction of the group III nitride semiconductor device substrate according to Example 1, and (B) is a graph showing the group III nitride semiconductor device substrate according to Comparative Example 1. 5 is a graph showing current-voltage characteristics in a vertical direction.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same components are denoted by the same reference numerals in principle, and description thereof is omitted. In addition, in each drawing, for the sake of convenience of description, the vertical and horizontal ratios of the substrate and each layer are exaggerated from the actual ratios. The value of the composition ratio of each layer of the _{B a Al b Ga c In d} N material (a, b, c, d ) may, for example, can be measured using an energy dispersive X-ray analysis (EDS). SEM-EDS can be used for a single-layer structure having a sufficient thickness, and when the thickness of each layer is small like a superlattice structure, identification can be performed using TEM-EDS.

(Substrate for group III nitride semiconductor device)
As shown in FIG. 1, a group III nitride semiconductor device substrate 100 according to one embodiment of the present invention includes a Si single crystal substrate 10 and a buffer layer 50 on the Si single crystal substrate 10. Here, the buffer layer 50 has an initial buffer layer 20 on the Si single crystal substrate 10 and a composite layer 30 on the initial buffer layer 20 in which a superlattice layer 31 and an intermediate layer 32 are alternately and repeatedly laminated. Further, the superlattice layer 31 is formed of a laminate in which a first layer 31A made of AlN and a second layer 31B made of Al _x Ga ₁ -xN (0.05 <x <0.20) are alternately and repeatedly stacked. That is, the thickness of the superlattice layer 31 is larger than the thickness of the intermediate layer 32. The intermediate layer 32 is made of Al _y Ga _{1 -yN} (0 ≦ y <0.03), and has a thickness of 120 nm or more and 180 nm or less. Hereinafter, details of each configuration will be sequentially described.

<Si single crystal substrate>
The Si single crystal substrate 10 is a substrate made of silicon single crystal. The conductivity of the Si single crystal substrate 10 can be appropriately used depending on the application, from a high resistivity substrate having a high insulating property of 10,000 Ω · cm or more to a low resistivity substrate of about 0.001 Ω · cm, A known silicon substrate can be used as appropriate. It may be a p-type or n-type conductivity type. The plane orientation of the Si single crystal substrate 10 is not particularly specified, and any plane orientation such as the (111), (100), and (110) planes can be used. In order to grow the (0001) plane of the group III nitride with good surface flatness, it is preferable to use a substrate having a plane orientation of (111). Other specifications such as the thickness and width of the Si single crystal substrate 10 may be appropriately designed according to the use of the substrate 100 for a group III nitride semiconductor device.

  Next, the buffer layer 50 is provided on the Si single crystal substrate 10 as described above. The buffer layer 50 has the initial buffer layer 20 and the composite layer 30 on the initial buffer layer 20 in which the superlattice layer 31 and the intermediate layer 32 are alternately and repeatedly laminated.

<Initial buffer layer>
The initial buffer layer 20 is provided to reduce a difference in lattice constant between silicon and group III nitride. For this purpose, it is preferable that the initial buffer layer 20 be a layer made of AlN single crystal. In addition, a layer made of SiN may be provided between the Si single crystal substrate 10 and the initial buffer layer 20.

  Further, as shown in FIG. 2, it is preferable that the initial buffer layer 20 has a first initial buffer layer 21 and a second initial buffer layer 22 in this order. When the initial buffer layer 20 includes a layer made of an AlN single crystal, a large number of dislocations are likely to be included. Therefore, a layer made of an AlN single crystal is used as the first initial buffer layer 21, and a second initial buffer layer 22 such as AlGaN or It is also preferable to use a composition gradient layer in which the Al composition ratio in AlGaN is gradient. Note that the Al composition ratio of the composition gradient layer decreases in a direction away from the Si single crystal substrate 10.

  Here, when AlN is used for the first initial buffer layer 21 and a composition gradient layer of AlGaN or AlGaN is used for the second initial buffer layer 22, the thickness of the first initial buffer layer 21 is set to 50 to 300 nm, The buffer layer 22 preferably has a thickness of 200 to 300 nm. In this case, the Al composition ratio of the second initial buffer layer 22 can be set to, for example, 0.1 to 0.3 (in the case of a composition gradient, the composition is gradient within this range). It is also preferable that the thickness of the second initial buffer layer 22 be larger than the thickness of the first initial buffer layer 21. Further, although not shown, the initial buffer layer 20 may have a laminated structure of three or more layers.

<Composite layer>
The composite layer 30 has a laminated structure in which a superlattice layer 31 having a superlattice structure and an intermediate layer 32 are alternately and repeatedly laminated. That is, the composite layer 30 has a stacked structure in which a combination of the superlattice layer 31 and the intermediate layer 32 is set as one set and a plurality of sets are stacked. It is preferable to provide a stacked structure in which n sets of the above combinations (where n is an integer of 2 or more) are provided immediately above the initial buffer layer 20 and one superlattice layer 31 is provided last. By doing so, the pressure resistance can be further improved, and the defect density of the layers after the carbon concentration gradient layer can be reduced. In such a case, the composite layer 30 is referred to as having “n.5 sets” of the combination of the superlattice layer 31 and the intermediate layer 32. Although details will be described later, it is important in the present embodiment that the thickness of the superlattice layer 31 be larger than the thickness of the intermediate layer 32.

The superlattice layer 31 is preferably a stacked body in which first layers 31A made of AlN and second layers 31B made of Al _x Ga ₁ -xN are alternately stacked. The thickness of the first layer 31A is preferably 4 to 6 nm, and the thickness of the second layer 31B is preferably 20 to 30 nm. The number of superlattice pairs of both the first layer 31A and the second layer 31B is 6 to 10 pairs. Is preferred. The thickness of the superlattice layer 31 is preferably 150 nm or more and 360 nm or less, and more preferably 180 nm or more in order to improve the pressure resistance.

Here, the Al composition ratio x of the second layer 31B made of Al _x Ga ₁ -xN in the superlattice layer 31 is set to 0.05 <x <0.20. It is more preferable that the Al composition ratio x be 0.06 or more and 0.12 or less. When the Al composition ratio x is less than 0.05, the effect of the superlattice layer 31 to improve the pressure resistance becomes insufficient. On the other hand, when the Al composition ratio x is 0.2 or more, the deterioration in flatness due to the superlattice layer 31 increases.

The intermediate layer 32 is made of Al _y Ga _1-y N (0 ≦ y <0.03). In order to maximize the difference between the Al composition ratio x of the second layer 31B of the superlattice layer 31 and the Al composition ratio, it is more preferable that the intermediate layer 32 be a GaN layer (that is, y = 0). Here, in the present embodiment, the thickness of the intermediate layer 32 is from 120 nm to 180 nm, more preferably from 130 nm to 170 nm, and even more preferably from 140 nm to 160 nm. If the thickness of the intermediate layer 32 exceeds 180 nm, the withstand voltage in the vertical direction deteriorates. If the thickness is less than 120 nm, the effect of improving crystallinity and flatness becomes insufficient.

  It should be noted that increasing the thickness of the intermediate layer 32 also increases the thickness of the entire buffer layer 50, and is generally considered to contribute to an improvement in the withstand voltage in the vertical direction. However, as a result of intensive studies by the present inventors, when the thickness of the intermediate layer 32 exceeds a specific size, carriers are supplied from the intermediate layer 32 in the buffer layer 50, and the vertical breakdown voltage deteriorates. It turned out to be the cause.

Here, in the combination structure of the superlattice layer 31 and the intermediate layer 32, it is important that the thickness of the superlattice layer 31 is larger than the thickness of the intermediate layer 32. When the thickness T _S of the superlattice layer 31 is smaller than the thickness T _M of the intermediate layer 32, the inventors have found that the effect of improving the withstand voltage by the superlattice layer 31 decreases and the withstand voltage in the vertical direction deteriorates. Was confirmed. In order to more reliably obtain the withstand voltage improving effect, it is more preferable that the thickness T _S of the superlattice layer 31 is larger than the thickness T _M of the intermediate layer 32 by 10 nm or more.

Further, the number of combinations of the superlattice layer 31 and the intermediate layer 32 in the composite layer 30 is preferably 4 to 5.5, and the total thickness of the composite layer 30 is preferably 1380 to 2700 nm. Further, in order to improve the pressure resistance, the carbon concentration in the composite layer 30 is preferably set to 1 × 10 ¹⁹ atoms / cm ³ or more. Note that the carbon concentration does not need to be constant in the composite layer 30 as long as the concentration is within this range. For example, the carbon concentration of the superlattice layer 31 may be higher than the carbon concentration of the intermediate layer 32, or vice versa.

  As described above, the substrate 100 for a group III nitride semiconductor device according to the present embodiment is provided with a composite layer 30 in which a superlattice layer 31 and an intermediate layer 32 satisfying a predetermined thickness relationship are alternately and repeatedly laminated on a buffer layer 50. Therefore, it is possible to provide a group III nitride semiconductor device substrate having both good flatness and sufficient pressure resistance. The substrate 100 for a III-nitride semiconductor device according to the present embodiment is particularly suitable for a III-nitride semiconductor device having a thin functional laminate, such as a HEMT having a thin electron transit layer, and having a lateral electron transit direction. It is suitable.

  Further, as shown in FIG. 2, in the group III nitride semiconductor device substrate 200 according to another embodiment of the present invention, in addition to the above-described Si single crystal substrate 10 and buffer layer 50, It is preferable to have the functional laminate 70 made of a group III nitride semiconductor. Here, in the group III nitride semiconductor device substrate 200, the functional laminate 70 can be a laminate including an electron transit layer 71, an electron supply layer 72, and a cap layer 73 in this order. The thickness of the layer 71 is preferably greater than or equal to 10 nm and less than or equal to 100 nm.

<Functional laminate>
Here, the functional laminate 70 is a region that functions as a semiconductor device when the substrate 200 for a group III nitride semiconductor device is used as a group III nitride semiconductor device. In a semiconductor device in which current mainly flows in the lateral direction such as a HEMT, the functional stacked body 70 includes, for example, an electron transit layer 71 (also called a channel layer), an electron supply layer 72, and a cap layer 73 in this order. It is composed of a laminate.

The electron transit layer 71 is preferably made of undoped GaN to which no impurity is intentionally added. Note that in this specification, a state in which "impurities are not intentionally added", that is, "undoped" is ideally a semiconductor containing no impurities at all. Any semiconductor that does not function as either a p-type or an n-type may be used, and a semiconductor having a low carrier density (for example, a semiconductor having a carrier density of less than 5 × 10 ¹⁶ / cm ³ ) is undoped. It is not excluded.

  The electron supply layer 72 is preferably a layer formed by vapor-growing undoped or n-type AlGaN doped with an n-type impurity to which no impurity is intentionally added. In the functional laminate 70, a two-dimensional electron gas layer (2DEG layer) is generated near the interface between the electron transit layer 71 and the electron supply layer 72. Further, the cap layer 73 is a layer for reducing ohmic resistance to the electrode when the electrode is provided in the group III nitride semiconductor device, and for example, GaN can be used.

  The group III nitride semiconductor device substrate 200 according to the present invention is particularly suitable for use in a normally-off type HEMT, and a remarkable effect can be obtained when the thickness of the electron transit layer 71 is 10 to 100 nm. This is because, when the thickness of the electron transit layer 71 is 100 nm or less, the effect of improving the flatness due to the thickness of the electron transit layer 71 itself is poor, so that the buffer layer 50 serving as a base for forming the electron transit layer 71 is formed. This is because a flatness improving effect due to the above is required. In order to reliably obtain the function as the electron transit layer, the thickness of the electron transit layer 71 is set to 10 nm or more. In the functional laminate 70, the thickness of each layer other than the electron transit layer 71 can be appropriately set according to the purpose.

<Carbon concentration gradient layer>
In addition, as shown in FIG. 2, it is preferable that the group III nitride semiconductor device substrate 200 has a carbon concentration gradient layer 60 having a carbon concentration gradient between the buffer layer 50 and the functional laminate 70. The carbon concentration gradient layer 60 is made of AlGaN, and can be a layer in which the carbon concentration is inclined in the growth direction. Here, the expression “incline the carbon concentration in the growth direction” means that the carbon concentration may be changed continuously or intermittently (stepwise). It is preferable to make the height higher and to incline so that the carbon concentration gradually decreases toward the functional laminate 70 side. As shown in FIG. 2, a carbon concentration gradient layer 60 having a high carbon concentration layer 61, a medium carbon concentration layer 62, and a low carbon concentration layer 63 in this order from the buffer layer 50 can be exemplified as such a carbon concentration gradient layer. The carbon concentration in each layer may be continuously changed, may be constant, or may be any. It should be noted that the carbon concentration gradient of the three-layer structure of the carbon concentration gradient layer 60 shown in FIG. 2 is merely an example, and that the carbon concentration may be inclined stepwise in a two-layer structure, or may be reduced in four or more layers. Needless to say, the concentration may be inclined stepwise.

  As described above, the carbon concentration gradient layer 60 having a structure in which the carbon concentration is inclined blocks the flow of current in the vertical direction from the functional stacked body 70 to the Si single crystal substrate 10, and the group III nitride semiconductor device substrate In addition to improving the vertical pressure resistance of the functional laminate 200, the crystallinity of the functional laminate 70 can be improved. As a method of changing the carbon concentration, which will be described later, the temperature, pressure, source gas flow rate, and the like, which are one of the conditions for forming a group III nitride semiconductor layer made of AlN, GaN, or AlGaN, can be changed. Just fine.

Here, when the carbon concentration gradient layer 60 is made of Al _z Ga ₁ -zN, it is preferable that the Al composition ratio z be 0.06 or more and 0.12 or less. This is because if the Al composition ratio z is larger than 0.12, the warp of the group III nitride semiconductor device substrate 200 increases, and if the Al composition ratio z is smaller than 0.06, the pressure resistance in the vertical direction decreases. When the carbon concentration gradient layer 60 has a multi-layer structure, the Al composition ratio of each layer may be different as long as the Al composition ratio z is within the above range, but it is more preferable that the Al composition ratio is the same. By making the Al composition ratio of each layer the same, generation of a two-dimensional electron gas due to a composition difference can be suppressed, and leakage current can be reduced.

Further, it is preferable that the thickness of the carbon concentration gradient layer 60 be 800 nm or more and 2000 nm or less in total. When the carbon concentration gradient layer 60 includes the high carbon concentration layer 61, the medium carbon concentration layer 62, and the low carbon concentration layer 63, the thickness of each layer is not particularly limited as long as the total thickness is satisfied. The carbon concentration of the carbon concentration gradient layer 60 on the side of the Si single crystal substrate 10 is preferably 1 × 10 ¹⁸ atoms / cm ³ or more. It is preferably at most 10 ¹⁶ atoms / cm ³ .

(Method of Manufacturing Substrate for Group III Nitride Semiconductor Device)
Next, the method for manufacturing the group III nitride semiconductor device substrate 200 according to the present invention includes a step of forming the initial buffer layer 20 on the Si single crystal substrate 10 and a step of forming the super lattice layer 31 and the intermediate layer on the initial buffer layer 20. The method includes a composite layer forming step of forming a composite layer 30 in which the layers 32 are alternately and repeatedly laminated, and a functional laminate forming step of forming a functional laminated body 70 made of a group III nitride semiconductor on the composite layer 30. Here, the superlattice layer 31 is a stacked body in which a first layer 31A made of AlN and a second layer 31B made of Al _x Ga ₁ -xN (0.05 <x <0.20) are alternately and repeatedly stacked. , And the intermediate layer 32 is made of Al _y Ga _1-y N (0 ≦ y <0.03). Then, in the composite layer forming step, the superlattice layer 31 is formed thicker than the intermediate layer 32, and the intermediate layer 32 has a thickness of 120 nm or more and 180 nm or less. A description overlapping with the above-described embodiment will be omitted.

Each layer made of a group III nitride semiconductor can be formed by vapor phase epitaxial growth. For example, a metal organic chemical vapor deposition (MOCVD) method can be used. In addition, it can be formed by a known thin film growth method such as a molecular beam epitaxy (MBE) method or a sputtering method. When using the MOCVD method, trimethylaluminum (TMA) can be used as an Al source for each layer, trimethylgallium (TMG) can be used as a Ga source, and a group III nitride semiconductor layer can be used according to the Al composition ratio. May be formed. Note that an ammonia (NH ₃ ) gas can be used as the N source. Generally, hydrogen gas is used as a carrier gas.

Also, the molar ratio of the group V element to the group III element calculated based on the growth gas flow rate of the group V element gas such as NH ₃ gas and the group III element gas such as TMA gas (hereinafter referred to as V / III ratio) ) Can be in a general range. Since an optimum V / III ratio exists depending on the growth temperature and the growth pressure, it is preferable to appropriately set the growth gas flow rate.

  The manufacturing method according to the present embodiment also preferably includes a carbon concentration gradient layer forming step of forming a carbon concentration gradient layer 60 having a carbon concentration gradient between the composite layer forming step and the functional laminate forming step. In addition, when C (carbon) is added to one or both of the composite layer 30 and the carbon concentration gradient layer 60, and when the growth is performed using the CVD method, the following several methods can be used.

First method: A source gas containing C is separately added during the growth of the group III nitride. Examples include methane / ethane / ethylene / acetylene / benzene / cyclopentane.
Second method: A methyl group, an ethyl group, and the like in the organic metal are mixed into the epitaxial growth layer under the growth group III nitride growth conditions. The concentration of C added to the epitaxial growth layer can be adjusted by appropriately setting the growth temperature, growth pressure, growth rate, ammonia flow rate during growth, hydrogen flow rate, nitrogen flow rate, etc. so as to suppress decomposition of the organic metal. It is possible.
In this specification, the C concentration in each of the composite layer 30 and the carbon concentration gradient layer 60 is determined by SIMS at the center of the thickness of each layer (for example, a point where １ ／ of the thickness is removed in the depth direction). The measured values will be used.

  Hereinafter, the present invention will be described in more detail with reference to Examples, but the present invention is not limited to the following Examples.

(Example 1)
A silicon single crystal substrate (diameter 6 inches, thickness 625 μm, dopant: boron (B), specific resistance 0.006 Ω · cm, plane orientation (111)) is prepared, and a mixed atmosphere of hydrogen and nitrogen is set in a MOCVD apparatus. After heating to 1050 ° C. under the above conditions, an ammonia gas and a TMA (trimethylaluminum) gas are flowed, the flow rate is set so that the V / III ratio becomes 4700, and the Si single crystal substrate is heated at a furnace pressure of 60 Torr (8 KPa). A first initial buffer layer made of AlN having a center thickness of 200 nm was formed thereon. Subsequently, an undoped second initial buffer layer having a center thickness of 300 nm and made of Al _0.23 Ga _0.77 N is formed on the first initial buffer layer by changing the flow ratio of ammonia gas, TMA gas, and TMG (trimethylgallium) gas. It was formed and used as an initial buffer layer.

Subsequently, a composite layer having a repeating structure of a superlattice layer and an intermediate layer was formed on the initial buffer layer using the MOCVD method as follows. The superlattice layer is composed of a pair of a first layer (24 nm) made of Al _0.09 Ga _0.91 N and a second layer (6 nm) made of AlN. It was a lattice layer. The first layer is a layer on the Si single crystal substrate side, and the total thickness of the superlattice layer is 240 nm. An intermediate layer (150 nm thick) made of GaN was formed on the superlattice layer. The combination of the superlattice layer and the intermediate layer was repeatedly set as one set, and a total of 5.5 sets (starting at the superlattice layer and ending at the superlattice layer) were formed to form a composite layer (2190 nm in total thickness). Here, as a result of SIMS analysis, the carbon concentration in the composite layer is in the range of 1 × 10 ^{19 to} 7 × 10 ¹⁹ atoms / cm ³ , the carbon concentration in the superlattice layer is high in the composite layer, and the carbon concentration in the intermediate layer is It was confirmed that the carbon concentration was low.

Subsequently, a carbon concentration gradient layer made of Al _0.08 Ga _0.92 N was formed on the composite layer by MOCVD. By utilizing the fact that the carbon concentration increases as the growth temperature decreases and that the carbon concentration increases as the growth pressure decreases, the growth temperature when forming the carbon concentration gradient layer is in the range of 1050 to 1100 ° C. While changing the growth pressure stepwise within the range of 10 to 30 kPa, a carbon concentration gradient layer having a total thickness of 1100 nm was formed. That is, in order from the side of the Si single crystal substrate, a high carbon concentration layer having a thickness of 300 nm (carbon concentration at the center in the thickness direction: 4 × 10 ¹⁸ atoms / cm ³ , carbon concentration 5 × 10 ^{18 to} 3 × 10 ¹⁸ atoms) / Cm ³ ), a medium carbon concentration layer having a thickness of 600 nm (carbon concentration at the center in the thickness direction: 7.5 × 10 ¹⁸ atoms / cm ³ , carbon concentration 1 × 10 ^{17 to} 5 × 10 ¹⁶⁾ atoms / cm ³ continuously decreases in), the carbon concentration in the low carbon concentration layer (the thickness direction center of the thickness of ^{200nm: 3 × 10 18 atoms /} cm 3, a carbon concentration ^{5 × 10 16 ~1 × 10 16} atoms / Cm ³ ).

Subsequently, an electron transit layer, an electron supply layer, and a cap layer were sequentially formed on the gradient carbon concentration layer by MOCVD to obtain a functional laminate. That is, a layer made of undoped GaN having a thickness of 40 nm is formed as an electron transit layer, a layer made of undoped Al _0.22 Ga _0.78 N having a thickness of 17 nm is formed as an electron supply layer, and finally a GaN layer having a thickness of 3 nm is formed. Was formed as a cap layer.

  As described above, the substrate for a group III nitride semiconductor device according to Example 1 was manufactured. Table 1 summarizes the constitution of each layer.

  The thickness of each layer of the substrate for a III-nitride semiconductor device according to Example 1 was measured by a cross section using an SEM or a TEM. Further, the Al composition of each layer was adjusted based on information obtained by PL measurement at the time of forming a thick film, and the Al composition of each layer after production was confirmed using SEM-EDS or TEM-EDS. FIG. 3 shows a TEM cross-sectional photograph of Example 1. In FIG. 3, the left side is the Si single crystal substrate, and the right side is the functional laminate side. The carbon concentration in the composite layer and the carbon concentration gradient layer was measured using SIMS.

(Example 2)
A substrate for a III-nitride semiconductor device according to Example 2 was formed in the same manner as in Example 1, except that the thickness of the intermediate layer was changed from 150 nm to 130 nm.

(Example 3)
Example 3 Example 3 is performed in the same manner as Example 1 except that the thickness of the intermediate layer is changed from 150 nm to 170 nm, and the number of pairs of the superlattice layer is changed from 8 pairs (total 240 nm) to 11 pairs (total 330 nm). A substrate for a group III nitride semiconductor device was formed.

(Comparative Example 1)
A substrate for a group III nitride semiconductor device according to Comparative Example 1 was formed in the same manner as in Example 1, except that the thickness of the intermediate layer was changed from 150 nm to 200 nm.

(Comparative Example 2)
A group III nitride semiconductor device substrate according to Comparative Example 1 was formed in the same manner as in Example 1 except that the number of pairs of the superlattice layer was changed from 8 pairs (total 240 nm) to 5 pairs (total 150 nm).

<Evaluation of crystallinity>
Using a XRD diffractometer (manufactured by Bulker) for each of the group III nitride semiconductor device substrates according to Examples 1 to 3 and Comparative Examples 1 and 2 (after forming the cap layer, the same applies hereinafter), X-ray diffraction peaks of the {002} direction and the {102} direction at the center of the substrate were obtained, and the value of FWHM (half width) was measured. Table 2 shows the results.

<Evaluation of SORI>
The warpage amount (SORI: SEMI M1-) of each of the III-nitride semiconductor device substrates according to Examples 1 to 3 and Comparative Examples 1 and 2 was measured using a grazing incidence interference type flatness tester (manufactured by NIDEK). 0302 standard). Table 2 shows the results.

<Evaluation of surface flatness>
An OM dark field image (Optical Microscope Dark field) was applied to each cap layer surface of the group III nitride semiconductor device substrates according to Examples 1 to 3 and Comparative Examples 1 and 2 using an optical microscope (Olympus). ) Was observed. As a representative example, the measurement results of Example 1 and Comparative Example 1 are shown in FIGS. 4A and 4B, respectively. In addition, the flatness of the surface was evaluated using an AFM device (manufactured by Veeco). As a representative example, the measurement results of Example 1 and Comparative Example 1 are shown in FIGS. 5A and 5B, respectively. The surface flatness of each of Examples 1 to 3 and Comparative Examples 1 and 2 was classified according to the following evaluation criteria. Table 2 shows the results.
：: No protrusion having a diameter of 1 μm or more is observed from any of the OM dark field image and the AFM image.
×: A convex portion having a diameter of 1 μm or more is observed from both the OM dark field image and the AFM image.

<Evaluation of pressure resistance>
On each of the cap layers of the group III nitride semiconductor device substrates according to Examples 1 to 3 and Comparative Examples 1 and 2, Ti / Al was vapor-deposited to form electrodes spaced apart by 10 μm, thereby simplifying the process. A HEMT device was formed. The current-voltage characteristics in the vertical direction were measured using a semiconductor parameter alanizer. As representative examples, the evaluation results of Example 1 and Comparative Example 1 are shown in FIGS. 6A and 6B, respectively. The pressure resistance of each of Examples 1 to 3 and Comparative Examples 1 and 2 was classified according to the following evaluation criteria. Table 2 shows the results.
：: When a voltage is applied in the vertical direction, the current density in the vertical direction is 1 × 10 ⁻⁴ A / cm ² or less at an applied voltage of 600 V.
×: When a voltage is applied in the vertical direction, the current density in the vertical direction exceeds 1 × 10 ⁻⁴ A / cm ² at an applied voltage of 600 V.

  From the above results, the group III nitride semiconductor device substrates according to Examples 1 to 3 having a composite layer in which an intermediate layer having a thickness of 120 to 180 nm and a superlattice layer thicker than the intermediate layer are repeatedly laminated, It turned out that it has good flatness and sufficient pressure resistance. On the other hand, in Comparative Example 1 where the thickness of the intermediate layer exceeds 200 nm, both the surface flatness and the pressure resistance are insufficient, and in Comparative Example 2 where the thickness of the intermediate layer is equal to the thickness of the superlattice layer, the pressure resistance is low. Was inadequate.

  The group III nitride semiconductor device substrate of the present invention is suitable for use in group III nitride semiconductor electronic devices such as HEMT, MESFET, and SBD.

Reference Signs List 10 Si single crystal substrate 20 Initial buffer layer 30 Composite layer 30 n-type semiconductor layer 31 Superlattice layer 31A First layer 31B Second layer 32 Intermediate layer 50 Buffer 60 Carbon concentration gradient layer 70 Functional laminate 71 Electron transit layer 72 Electron supply Layer 73 Cap layer 100, 200 Group III nitride semiconductor device

Claims (5)

In a substrate for a III-nitride semiconductor device having a Si single crystal substrate and a buffer layer on the Si single crystal substrate,
The buffer layer has an initial buffer layer on the Si single crystal substrate, and a composite layer on the initial buffer layer, in which a superlattice layer and an intermediate layer are alternately and repeatedly stacked,
The composite layer has a carbon concentration of 1 × 10 ¹⁹ atoms / cm ³ or more,
The superlattice layer is formed of a laminate in which a first layer made of AlN and a second layer made of Al _x Ga ₁ -xN (0.05 <x <0.20) are alternately and repeatedly laminated. The thickness of the superlattice layer is greater than the thickness of the intermediate layer,
The group III nitride semiconductor device substrate, wherein the intermediate layer is made of Al _y Ga _1-y N (0 ≦ y <0.03) and has a thickness of 130 nm or more and 170 nm or less.   The substrate for a group III nitride semiconductor device according to claim 1, wherein the intermediate layer is made of GaN. Having a functional laminate made of a group III nitride semiconductor on the buffer layer,
The said functional laminated body is a laminated body containing an electron transit layer, an electron supply layer, and a cap layer in this order, The thickness of the said electron transit layer is 10 nm or more and 100 nm or less, The Claims 1 or 2 characterized by the above-mentioned. III-nitride semiconductor device substrate.   The group III nitride semiconductor device substrate according to claim 3, further comprising a carbon concentration gradient layer having a carbon concentration gradient between the buffer layer and the functional laminate. Forming an initial buffer layer on the Si single crystal substrate;
A composite layer forming step of forming a composite layer in which a super lattice layer and an intermediate layer are alternately and repeatedly laminated on the initial buffer layer,
A functional laminate forming step of forming a functional laminate made of a group III nitride semiconductor on the composite layer,
The superlattice layer comprises a laminate in which a first layer made of AlN and a second layer made of Al _x Ga _1-x N (0.05 <x <0.20) are alternately and repeatedly laminated,
The composite layer has a carbon concentration of 1 × 10 ¹⁹ atoms / cm ³ or more,
The intermediate layer is made of Al _y Ga _1-y N (0 ≦ y <0.03),
In the composite layer forming step, the superlattice layer is formed to be thicker than the intermediate layer, and the intermediate layer has a thickness of 130 nm or more and 170 nm or less, for a group III nitride semiconductor device. Substrate manufacturing method.