JP2008072029A - Manufacturing method of semiconductor epitaxial crystal substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor epitaxial crystal substrate with a dielectric film for manufacturing a high performance nitride gallium transistor. <P>SOLUTION: The method of manufacturing a semiconductor epitaxial crystal substrate comprises steps for forming a nitride gallium semiconductor crystal layer composed of a buffer layer 2, a channel layer 3 and an electron supply layer 4 on a base substrate 1 by an epitaxial method, laminating AlN continuously in an epitaxial growth furnace on the electron supply layer 4 as a precursor of a dielectric film, and then performing oxidation treatment to the laminated precursor to form a dielectric film 5. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor epitaxial crystal substrate.

  Conventionally, when manufacturing a gallium nitride-based transistor, a semiconductor epitaxial crystal substrate, which is a functional member therefor, is processed by a lithography process to produce a required transistor. At this time, a gate is formed on the semiconductor epitaxial crystal substrate according to the purpose. A device configuration provided with members such as an insulating film and a passivation film is employed.

  The gate insulating film is a protective film provided between the gate metal and the semiconductor crystal for the purpose of preventing leakage current of the gate electrode. On the other hand, the passivation film is a protective film provided on the surface of the semiconductor crystal for the purpose of stabilizing the surface so that the electrical properties of the semiconductor surface do not change. When such a protective film is provided, the passivation film and the gate insulating film are often made of the same material for the purpose of simplifying the manufacturing process and reducing the manufacturing cost.

As gate insulating film materials and passivation materials studied so far, as disclosed in Non-Patent Documents 1 and ₂ , it is known to use Al ₂ O ₃ and SiO ₂ which are dielectric materials. .
P. D, Ye et al., Applied Physics letters 86, 063501 (2005) P. Kordos et al., Applied Physics letters 87, 143501 (2005)

  These dielectric materials disclosed in Non-Patent Documents 1 and 2 both have a potential position in the valence band larger than the potential in the valence band of the gallium nitride material and are high as a gate insulating film of the gallium nitride material. Although the effect can be expected, when the field effect transistor provided with these dielectric films is manufactured, the gate leakage reduction effect as expected from the difference in the valence band potential is not obtained. It is a fact.

  Further, in a field effect transistor having a structure provided with these dielectric films, a phase difference between gate signal and drain current output (gate lag) or a phase difference between drain voltage and drain current (drain lag) is generated. The device configuration in which members such as a gate insulating film and a passivation film are added to the semiconductor epitaxial crystal substrate has yet to be put into practical use. There wasn't.

  An object of the present invention is to provide a method for manufacturing a semiconductor epitaxial crystal substrate in a form provided with a dielectric film and a semiconductor epitaxial crystal substrate capable of solving the above-mentioned problems in the prior art.

  Another object of the present invention is to provide a method for manufacturing a gallium nitride based semiconductor epitaxial crystal substrate having a low gate leakage current and a negligibly small gate lag, drain lag, and current collapse characteristics, and a semiconductor epitaxial crystal substrate.

In order to solve the above problems, the method for producing a semiconductor epitaxial crystal substrate according to the present invention becomes, for example, a precursor of Al ₂ O ₃ or SiO ₂ continuously with the growth of the semiconductor crystal layer formed on the base substrate. AlN or Si ₃ N ₄ is laminated by MOCVD or thermal CVD, and then a part or all of AlN or Si ₃ N ₄ is oxidized to obtain Al ₂ O ₃ or Al ₂ O ₃ : N (N By including Al ₂ O ₃ ), SiO ₂ or SiO ₂ : N (SiO ₂ containing N), a dielectric film is provided on the semiconductor crystal layer.

  According to the first aspect of the present invention, a gallium nitride based semiconductor epitaxial crystal for manufacturing a transistor, wherein a dielectric film serving as a passivation film or a gate insulating film is provided on the surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method. A method for manufacturing a substrate, wherein AlN is laminated continuously in the epitaxial growth furnace after the growth of the gallium nitride semiconductor crystal layer, and the dielectric film is formed by oxidizing the laminated AlN. A method for manufacturing a semiconductor epitaxial crystal substrate is proposed.

According to the invention of claim 2, a gallium nitride semiconductor for manufacturing a field effect transistor, wherein a dielectric film serving as a passivation film or a gate insulating film is provided on the surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method. A method of manufacturing an epitaxial crystal substrate, comprising: stacking Si ₃ N ₄ in succession to the growth of the gallium nitride semiconductor crystal layer in an epitaxial growth furnace; and oxidizing the stacked Si ₃ N ₄ A method of manufacturing a semiconductor epitaxial crystal substrate characterized by forming a film is proposed.

  According to a third aspect of the present invention, there is proposed a method for manufacturing a semiconductor epitaxial crystal substrate according to the first or second aspect, wherein the oxidation treatment is an oxygen plasma treatment.

  According to a fourth aspect of the present invention, there is proposed a method for manufacturing a semiconductor epitaxial crystal substrate according to the first, second or third aspect, wherein the epitaxial growth method is an organometallic vapor phase growth method.

  According to the invention of claim 5, a gallium nitride-based semiconductor epitaxial crystal for manufacturing a transistor, wherein a dielectric film serving as a passivation film or a gate insulating film is provided on the surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method. Proposed semiconductor epitaxial crystal substrate characterized in that the dielectric film is formed by oxidizing AlN stacked continuously in the epitaxial growth furnace in the growth of the gallium nitride semiconductor crystal layer. Is done.

According to the invention of claim 6, a gallium nitride semiconductor for manufacturing a field effect transistor, wherein a dielectric film serving as a passivation film or a gate insulating film is provided on the surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method. An epitaxial crystal substrate, wherein the dielectric is formed by oxidizing Si ₃ N ₄ laminated successively in the growth of the gallium nitride semiconductor crystal layer in an epitaxial growth furnace. A substrate is proposed.

  According to a seventh aspect of the invention, there is proposed a semiconductor epitaxial crystal substrate according to the fifth or sixth aspect, wherein the oxidation treatment is an oxygen plasma treatment.

  According to an eighth aspect of the present invention, there is proposed a semiconductor epitaxial crystal substrate according to the fifth, sixth or seventh aspect, wherein the epitaxial growth method is an organometallic vapor phase growth method.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor epitaxial crystal substrate which enables manufacture of the field effect transistor which has a favorable gate leak characteristic and a negligibly small drain lug, gate lug, and current collapse can be provided, The industrial significance Is extremely large.

  Hereinafter, an example of an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor epitaxial crystal substrate according to the present invention. The semiconductor epitaxial crystal substrate 10 is a gallium nitride semiconductor epitaxial crystal substrate for manufacturing transistors, and a gallium nitride semiconductor crystal layer grown by an epitaxial method is formed on the base substrate 1. In this embodiment, the gallium nitride semiconductor crystal layer is formed by laminating a buffer layer 2 made of AlN, a channel layer 3 made of GaN, and an electron supply layer 4 made of AlGaN in this order.

  A dielectric film 5 is formed on the surface of the gallium nitride semiconductor crystal layer, that is, on the surface 4a of the electron supply layer 4 in this case. The dielectric film 5 is provided as a protective layer for the gallium nitride semiconductor crystal layer, and the dielectric film 5 is a passivation film or a gate insulating film in a transistor manufactured using the semiconductor epitaxial crystal substrate 10. It is.

  The dielectric film 5 is formed by sequentially growing the buffer layer 2, the channel layer 3 and the electron supply layer 4 on the base substrate 1 in the epitaxial growth furnace, and subsequently, forming AlN on the electron supply layer 4 in the epitaxial growth furnace. It is formed by laminating as a precursor of the dielectric film, and then subjecting the laminated precursor to oxidation treatment.

In this way, a gallium nitride semiconductor crystal layer is grown, and subsequently AlN is stacked in the epitaxial growth furnace in which the gallium nitride semiconductor crystal layer is grown, and Al ₂ O ₃ or Al obtained by oxidizing the stacked AlN. _The dielectric film 5 utilizing ₂ O ₃ : N (N ₂ containing Al ₂ O ₃ ) is good when it acts as a passivation film or a gate insulating film without degrading the electrical characteristics of the transistor. Gate leakage characteristics can be achieved. That is, a semiconductor epitaxial crystal substrate having good gate leakage characteristics and a negligibly small drain lag, gate lag, and current collapse can be obtained.

In place of the method for forming the dielectric film 5 using AlN described in the above embodiment, Si ₃ N ₄ is used as a precursor on the surface 4a of the electron supply layer 4 by the same layering method as the layering of AlN. Lamination is performed, and an oxidation treatment is performed on the laminated Si ₃ N ₄ precursor, and the dielectric film 5 is formed using SiO ₂ or SiO ₂ : N (SiO ₂ containing N) generated thereby. You can also. In this case, the same effect as that of the precursor using AlN can be obtained.

  Here, in any case, the oxidation treatment is preferably oxygen plasma treatment. However, the present invention is not limited to this oxidation treatment, and the oxidation treatment may be performed by any means.

  Next, an embodiment of the manufacturing method of the present invention will be described with reference to FIG.

  FIG. 2 is a diagram schematically showing an example of an organic metal vapor deposition apparatus used for manufacturing a semiconductor epitaxial crystal substrate according to the present invention. Since the configuration of the organometallic vapor phase growth apparatus shown in FIG. 2 is known per se, a general description of each component will be omitted here. In FIG. 2, 100, 101 and 106 are mass flow controllers (MFC), 102 is a constant temperature layer, 103 is a raw material container, 104 and 118 are high pressure gas cylinders, 105 and 119 are pressure reducing valves, 107 is a reaction furnace, and 108 is a resistance heater. 110 are substrate folders. The raw material container 103 is filled with a Group 3 raw material, the high pressure gas cylinder 104 is filled with ammonia, and the high pressure gas cylinder 118 is filled with a carrier gas.

  The carrier gas from the high-pressure gas cylinder 118 whose flow rate is controlled by the mass flow controller (MFC) 101 is introduced into the raw material container 103 controlled to a desired temperature by the constant temperature layer 102, and the Group 3 raw material put in the raw material container 103. It is bubbled in. By this bubbling, the gap in the raw material container 103 is filled with a Group 3 material having a vapor pressure determined by the temperature of the thermostatic layer 102, and an amount of Group 3 material gas corresponding to the vapor pressure and the carrier gas flow rate is introduced into the reactor 107. The The flow rate of the Group 3 raw material thus controlled is usually 10E-3 to 10E-5 mol / min. Range.

  On the other hand, ammonia, which is a Group 5 raw material, is filled in a high-pressure gas cylinder 104, is decompressed by a decompression valve 105, and is then flow-controlled by the MFC 106 and introduced into the reaction furnace 107. The amount of ammonia gas introduced is generally 1 to 10000 times that of Group 3 source gas. The carrier gas filled in the high-pressure gas cylinder 118 is depressurized by the pressure reducing valve 119, then the flow rate is controlled by the MFC 101 and introduced into the reaction furnace 107. The flow rate of the carrier gas is generally in the range of 10 SLM to 200 SLM. Silane which becomes dopan is introduced into the reaction furnace 107 in the same manner as the Group 5 raw material.

  The base substrate 1 prepared in advance is held by a graphite substrate holder 110 provided in the reaction furnace 107. The substrate holder 110 has a rotation mechanism, and a resistance heater 108 is disposed close to the back surface of the substrate holder 110 so that the base substrate 1 can be heated from the back surface through the substrate holder 110. This heating is generally controlled to about 900 ° C. to 1300 ° C. when the surface temperature of the base substrate 1 is a GaN-based semiconductor crystal.

  When the raw material gas vapor is introduced into the reaction furnace 107, the introduced raw material gas vapor is thermally decomposed in the vicinity of the surface of the base substrate 1 and grows on the base substrate 1 as crystals. Residual gas and undecomposed gas are discharged from the exhaust port 112. In this way, by introducing a necessary source gas into the reaction furnace 107, a GaN-based crystal doped or not doped with silicon can be grown on the base substrate 1.

  As group 3 materials used for crystal growth, alkylgallium such as trimethylgallium (TMG) and triethylgallium (TEG), alkylaluminum such as trimethylaluminum (TMA) and triethylaluminum (TEA), and trimethylindium (TMI) are desired. It is used alone or in combination so as to have a composition. Since these raw materials for MOCVD are commercially available, these can be used.

Disilane or monosilane is used as a dopant and a raw material of silicon that becomes Si ₃ N ₄ . Disilane and monosilane are commercially available in high purity necessary for crystal growth and can be used. As the carrier gas, hydrogen gas or nitrogen gas is used alone or in combination. A high purity material necessary for crystal growth of hydrogen gas or nitrogen gas is commercially available and can be used.

  As the base substrate 1, a single crystal substrate such as GaAs, GaN, sapphire, SiC, Si or the like can be used. The base substrate 1 is preferably insulative, but it is not impossible to use a conductive one. Since the base substrate 1 having few defects necessary for crystal growth is commercially available, these can be used.

  Next, a specific manufacturing method of the manufacturing method of the epitaxial crystal substrate for GaN-MISSHFET shown in FIG. 1 will be described.

  First, the cleaned semi-insulating SiC base substrate 1 is set on the substrate holder 110, AlN is laminated on the base substrate 1, and the buffer layer 2 is grown to a predetermined thickness. Thereafter, the temperature of the base substrate 1 is changed to a predetermined temperature, the group 3 source gas is switched, and the SI-type GaN channel layer 3 is grown to a predetermined thickness. Next, by supplying or not supplying the silicon dopant gas, the electron supply layer 4 which is Si-doped or not Si-doped is grown to a predetermined thickness.

  The thickness of the AlN buffer layer 2 is generally 500 to 5000 mm, but is preferably 200 to 40000 mm, more preferably 200 to 3000 mm in terms of the balance between productivity and effect. In place of the AlN buffer layer 2, a buffer layer made of AlGaN having the same thickness can be used. In this case, the raw material gas is changed so as to have a desired composition, and other than that, growth can be performed by the same method as in the buffer layer 2. Note that Fe, Mn, C, or the like may be doped for the purpose of increasing the insulation of the buffer layer 2.

  The thickness of the channel layer 3 may be determined within a range in which good crystallinity is given to a site where the 2DEG channel near the interface with the electron supply layer 4 is formed. Crystallinity can be determined by XRD rocking curve measurement. For example, the (0001) plane can be used as the crystal plane to be measured. When this surface is measured, as a guideline for obtaining good characteristics, the half width of the peak is 300 seconds or less.

  The thickness of the channel layer 3 is remarkably dependent on the growth conditions, but is generally 3000 mm or more. Although there is no upper limit in particular, from the viewpoint of industrial productivity, it is generally from 5000 to 50000, preferably from 7000 to 40000, and most preferably from 8000 to 30000.

  The thickness of the electron supply layer 4 and its Al composition are determined so that the desired channel carrier concentration, mutual conductance, and pinch-off voltage can be obtained within a range in which the crystal does not deteriorate due to lattice mismatch with the channel layer 3. At this time, if the Al composition is increased, the lattice mismatch with the channel layer 3 is increased, so that the thickness is reduced. Such thickness ranges are generally in the range of 50 to 500 inches, more preferably in the range of 70 to 450 inches, and most preferably in the range of 90 to 400 inches. The range of the Al composition is generally in the range of 0.1 to 0.4, more preferably 0.15 to 0.35, and most preferably 0.18 to 0.30.

In this way, after the growth of the electron supply layer 4 which is the uppermost layer of the GaN-based crystal, the growth substrate obtained thereby is directly exposed on the electron supply layer 4 in the reaction furnace 107 without being exposed to the atmosphere. Then, AlN as a precursor of the dielectric film 5 and SiO ₂ are successively laminated in the same reactor. In this precursor lamination process, MOCVD or thermal CVD is used. The difference between the two is whether an organic metal material or an inorganic metal material is used as the metal raw material. As described above, instead of continuously laminating AlN and SiO ₂ as precursors of the dielectric film 5 in the same reaction furnace, the same is used with Si ₃ N ₄ as a precursor. You may make it laminate | stack continuously in a reaction furnace.

  In the precursor lamination step, first, the surface temperature of the base substrate 1 is adjusted to a temperature suitable for a desired dielectric film. Next, a material necessary for the growth of the precursor is introduced into the reaction furnace, and the metal for the precursor constituting the dielectric film or the dielectric thin film is placed on the semiconductor epitaxial crystal, that is, on the electron supply layer 4. Laminate. When the lamination of the precursor is completed, the temperature of the base substrate 1 is lowered to room temperature, and then the base substrate 1 is taken out from the reaction furnace.

Next, the base substrate 1 on which the precursor is laminated is transferred to oxygen plasma or a thermal oxidation furnace, and the precursor (AlN or Si ₃ N ₄ ) is oxidized at a desired temperature. At this time, all of AlN and Si ₃ N ₄ are not oxidized, and AlN / Al ₂ O ₃ or AlN / Al ₂ O ₃ : N (Al ₂ O ₃ containing N), Si ₃ N ₄ / SiO ₂ or Si It is also possible to have a two-layer structure of ₃ N ₄ / SiO ₂ : N (SiO ₂ containing N). Using the Al ₂ O ₃ , Al ₂ O ₃ : N (N ₂ containing Al ₂ O ₃ ), SiO ₂ , SiO ₂ : N (N ₂ containing SiO ₂ ) thus obtained, dielectric A gallium nitride semiconductor epitaxial crystal substrate provided with the body film 5 is obtained.

For the thermal oxidation, a commercially available thermal oxidation furnace can be used. Oxygen can be used as the oxygen source. The temperature of the underlying substrate 1 is usually in the range of 100 ° C. to 1000 ° C., more preferably in the range of 300 ° C. to 900 ° C., most preferably, regardless of whether the precursor is AlN or Si ₃ N _4. It is in the range of 500 ° C to 800 ° C.

Oxidation by oxygen plasma and nitridation by nitrogen plasma generate oxygen plasma using plasma sources such as ICP and ECR while supplying oxygen, nitrogen, ammonia, etc. as plasma gases, and treat the precursor surface with these plasmas. To implement. In this case, the temperature of the base substrate 1 is generally in the range of room temperature to 700 ° C., more preferably in the range of 100 ° C. to 600 ° C., regardless of whether the precursor is AlN or Si ₃ N ₄ . Most preferably, it is in the range of 150 ° C to 500 ° C.

  In the case of stacking AlN as a precursor, in the MOCVD method, the Al material is supplied by the same method using a Group 3 material in GaN crystal growth. The nitrogen source is supplied in the same manner using a Group 5 source for GaN crystal growth. The substrate growth temperature is generally in the range of 800 ° C to 1300 ° C, preferably in the range of 850 ° C to 1200 ° C, and most preferably in the range of 900 ° C to 1100 ° C.

When Si ₃ N ₄ is laminated as a precursor, an organic metal material such as trisdimethylaminosilane or trisdiethylaminosilane is used as a raw material in the MOCVD method. The organometallic raw material is supplied in the same manner as the Group 3 raw material supply. In the case of forming by the thermal CVD method, disilane, monosilane or the like is used as the Si raw material.

  The nitrogen source is supplied in the same manner using a Group 5 source in GaN crystal growth. The substrate growth temperature is generally in the range of 300 ° C. to 1300 ° C., preferably in the range of 400 ° C. to 1100 ° C., and most preferably in the range of 500 ° C. to 900 ° C.

The thickness of the dielectric film 5 layer using Al ₂ O ₃ is determined within a range in which the gate leakage current can be suppressed within a range where desired mutual conductance and pinch-off voltage are obtained. Such a range is generally 1 nm to 30 nm.

The embodiment of the present invention has been described with reference to the example of the semiconductor epitaxial crystal substrate for GaN-MISFET to which the dielectric film 5 made of Al ₂ O ₃ is added. The main point of the present invention is the semiconductor epitaxial crystal layer. On top of that, the dielectric film can be formed by the MOCVD method because it can be formed by the above-described steps, that is, by the continuous lamination of precursors and the subsequent oxidation treatment. All semiconductor crystal systems are applicable.

  Examples of such a crystal system include a silicon germane system (SiGe system), a gallium nitride system (GaN system), an indium phosphide system (InP system), and a silicon carbide system (SiC system).

  Although an example of a MISFET is described here, by changing the structure of the semiconductor crystal layer, other FET structures such as MODFET, MESFET epitaxial crystal substrate, and various diode epitaxial crystal substrates can be manufactured. It is.

  Hereinafter, the present invention will be described in more detail with reference to one embodiment of the present invention. However, the embodiment described below is merely an example, and the present invention is not limited thereto.

  First, a semiconductor epitaxial substrate having the layer structure shown in FIG. 1 was prepared using the apparatus shown in FIG. A semi-insulating SiC substrate was used as the base substrate 1. The semi-insulating SiC substrate was heated to 1000 ° C., TMA was flowed at 40 sccm from a container set with hydrogen as a carrier gas at 60 SLM, ammonia at 40 SLM, and a constant-temperature bath temperature at 30 ° C., and an AlN buffer layer 2 was grown to 1000 mm. Next, the substrate temperature was changed to 1150 ° C., the TMA flow rate was changed to 0 sccm, TMG was flowed 40 sccm from a container set to a constant temperature bath temperature of 30 ° C., and 20000 cm of GaN channel layer 3 was laminated. Then, 40 sccm of TMA was flowed from the container set at a constant temperature bath temperature of 30 ° C., and the AlGaN electron supply layer 4 was grown to 300 mm.

  Subsequently, the TMG flow rate was set to 0 sccm, and an AlN layer as a precursor of the dielectric film 5 was grown to 20 cm. After cooling the substrate temperature to near room temperature, the obtained epitaxial substrate was taken out from the reactor. After the substrate was set in a vacuum chamber equipped with a high frequency plasma generation function, the AlN layer was oxidized for 30 minutes under the conditions of a high frequency output of 100 W and an oxygen flow rate of 200 sccm. Thereby, the dielectric film 5 was formed.

After the substrate was taken out, it was confirmed by X-ray photoelectron spectroscopy that the peak of Al2p oxide appeared and the nitrided Al2p peak decreased due to the oxygen plasma treatment. As a result, a dielectric of Al ₂ O ₃ or Al ₂ O ₃ : N (N ₂ containing Al ₂ O ₃ ) is formed on the precursor AlN layer, and the desired dielectric film 5 is formed. I confirmed. Thus, an epitaxial substrate with a dielectric film having the layer structure shown in FIG. 1 was obtained.

Thereafter, a GaN-MISSHFET having the structure shown in FIG. 3 was fabricated as follows using the thus obtained epitaxial substrate with a dielectric film. First, a resist pattern was formed on the obtained epitaxial substrate with a dielectric film by photolithography, and then an element isolation 9 was formed to a depth of 3000 mm by ion implantation of N ⁺ ions. Next, a resist opening is formed in the shape of the source electrode and the drain electrode by the same photolithography method, and the dielectric film 5 in the opening is removed by ICP plasma etching using a mixed gas of Ar, CH ₂ CL, and Cl _2. The AlGaN layer 4 was exposed.

  Next, a Ti / Al / Ni / Au metal film was laminated on the entire surface to a thickness of 200 / 1,500 / 250/500 by vapor deposition, and this metal film was processed into an electrode shape by lift-off. Next, RTA treatment was performed at 800 ° C. for 30 seconds in a nitrogen atmosphere, and the source electrode 8 and the drain electrode 6 were formed. Next, an opening in the shape of a gate electrode is formed by the same photolithography method, a Ni / Au metal film is formed on the front surface by a vapor deposition method to a thickness of 200 mm / 1000 mm, and the metal film is processed into an electrode shape by a lift-off method. 7 was formed.

Then, annealing was performed at 500 ° C. for 30 minutes in a nitrogen atmosphere. In this manner, a GaN-MISFET having a gate length of 2 μm and a gate width of 30 μm having an Al ₂ O ₃ or AlN dielectric film as a layer serving as a gate insulating film and a passivation film was fabricated.

  In order to evaluate the gate leakage characteristics of the fabricated GaN-MISSHFET, the source electrode was grounded, a voltage from +1 V to −20 V was applied to the gate electrode, and the current value flowing through the gate electrode was measured.

  FIG. 4 shows the gate voltage-gate current characteristics measured in this way. The gate current when a negative gate voltage was applied showed a low leakage current value of 1E-2 mA / mm or less, and it was found that the fabricated GaN-MISSHFET had excellent gate leakage characteristics. The gate lag characteristics of the fabricated GaN-MISSHFET were evaluated. The current recovery time from the + 1V application start time was measured when the source electrode and the gate electrode were grounded and the drain voltage was suddenly changed from + 8V to + 1V.

  FIG. 4 shows the drain voltage-drain current-time characteristics measured in this way. The fabricated GaN-MISSHFET had a drain voltage with a fast current recovery time and a small change in current value. From this, it was found that the produced GaN-MISSHFET has excellent drain lug characteristics.

1 is a schematic cross-sectional view showing an embodiment of a semiconductor epitaxial crystal substrate according to the present invention. The figure which shows roughly an example of the organometallic vapor phase growth apparatus used for manufacture of the semiconductor epitaxial crystal substrate by this invention. The typical sectional view of GaN-MISSHFET used in order to explain one example of the present invention. The graph which shows the drain voltage-drain current-time characteristic measured for evaluation of the gate leakage characteristic of GaN-MISSHFET by one Example of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 Channel layer 4 Electron supply layer 5 Dielectric film 6 Drain electrode 7 Gate electrode 8 Source electrode 9 Element isolation 10 Semiconductor epitaxial crystal substrate 100, 101, 106 Mass flow controller (MFC)
102 Constant temperature layer 103 Raw material container 104, 118 High pressure gas cylinder 105, 119 Pressure reducing valve 107 Reactor 108 Resistance heater 110 Substrate folder 112 Exhaust port

Claims (8)

A method for manufacturing a gallium nitride based semiconductor epitaxial crystal substrate for manufacturing a transistor, wherein a dielectric film to be a passivation film or a gate insulating film is provided on the surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method,
Laminating AlN in succession to the growth of the gallium nitride semiconductor crystal layer in an epitaxial growth furnace;
A method of manufacturing a semiconductor epitaxial crystal substrate, wherein the dielectric film is formed by oxidizing a laminated AlN. A method of manufacturing a gallium nitride semiconductor epitaxial crystal substrate for manufacturing a field effect transistor, wherein a dielectric film serving as a passivation film or a gate insulating film is provided on a surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method. ,
Laminating Si ₃ N ₄ in succession to the growth of the gallium nitride semiconductor crystal layer in an epitaxial growth furnace,
A method of manufacturing a semiconductor epitaxial crystal substrate, wherein the dielectric film is formed by oxidizing a laminated Si ₃ N ₄ .   The method for manufacturing a semiconductor epitaxial crystal substrate according to claim 1, wherein the oxidation treatment is an oxygen plasma treatment.   4. The method for producing a semiconductor epitaxial crystal substrate according to claim 1, wherein the epitaxial growth method is an organometallic vapor phase growth method. A gallium nitride-based semiconductor epitaxial crystal substrate for manufacturing a transistor, wherein a dielectric film serving as a passivation film or a gate insulating film is provided on the surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method,
The semiconductor epitaxial crystal substrate, wherein the dielectric film is formed by oxidizing AlN laminated successively in the growth of the gallium nitride semiconductor crystal layer in an epitaxial growth furnace. A gallium nitride based semiconductor epitaxial crystal substrate for manufacturing a field effect transistor, wherein a dielectric film serving as a passivation film or a gate insulating film is provided on the surface of a gallium nitride semiconductor crystal layer grown by an epitaxial method,
A semiconductor epitaxial crystal substrate characterized in that the dielectric is formed by oxidizing Si ₃ N ₄ laminated successively to the growth of the gallium nitride semiconductor crystal layer in an epitaxial growth furnace.   The semiconductor epitaxial crystal substrate according to claim 5 or 6, wherein the oxidation treatment is an oxygen plasma treatment.   The semiconductor epitaxial crystal substrate according to claim 5, 6 or 7, wherein the epitaxial growth method is an organic metal gas layer growth method.

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