JP2015026210A - Serial communication device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To generate a reset signal having high accuracy without deterioration in quality of a reception signal.SOLUTION: The serial communication device comprises: a serial reception unit 1 for receiving a signal on a serial communication line to output a serial signal; a serial/parallel conversion unit 2 for converting the serial signal into a parallel signal and also generating a timing pulse signal; a parallel data accumulation unit 3 for accumulating the parallel signal; a processor 4 for reading the parallel signal from the parallel data accumulation unit 3; and a pulse monitoring unit 5 for monitoring a change of the timing pulse signal and, when the timing pulse signal has not been changed for a predetermined time or longer, outputting a reset signal to the serial reception unit 1, the serial/parallel conversion unit 2, and the processor 4.

Description

  The present invention relates to a serial communication device that determines a communication abnormality.

  In a system that performs serial communication at a constant cycle, there is a system that determines a communication error when a signal is not received for a certain period of time due to disconnection of a communication cable or power-off of a communication partner.

  As a method for detecting such a communication abnormality, a method may be considered in which the time interval at which the processor receives a signal is measured, and when the signal is not received for a certain period of time, the receiving device is initialized. It becomes complicated.

  Therefore, there is known a serial communication device that monitors a change in a signal on a serial communication line by a monitoring unit such as a watchdog timer, detects a communication abnormality without processing by a processor, and generates a reset signal (Patent Document 1). reference).

JP 2006-172173 A

  In the serial communication device described in Patent Document 1, signals input to the monitoring unit are a reception signal or a clock signal on a serial communication line connected to a communication partner and a strobe signal. Although these signal lines are branched and used as input to the monitoring means, it causes signal distortion, attenuation, reflection, etc., which is not preferable in terms of signal quality. Further, since the signal line is strongly affected by noise on the transmission path, the monitoring unit may malfunction. In the case of a bit synchronous communication system that does not use a clock signal and a strobe signal, such as an HDLC (High-Level Data Link Control) procedure, the received signal must be used as an input to the monitoring means.

  An object of the present invention made in view of such circumstances is to provide a serial communication device capable of generating a highly accurate reset signal without deteriorating the quality of a received signal.

  In order to solve the above problems, a serial communication device according to the present invention receives a signal on a serial communication line and outputs a serial signal, converts the serial signal into a parallel signal, and generates a timing pulse signal A serial / parallel converter that performs parallel processing, a parallel data storage that stores the parallel signal, a processor that reads the parallel signal from the parallel data storage, and a change in the timing pulse signal is monitored. And a pulse monitoring unit that outputs a reset signal to the processor when the time does not change for more than a predetermined time.

  In the serial communication apparatus according to the present invention, the processor makes the reset signal an interrupt request.

  According to the present invention, the signal on the serial communication line is not directly monitored, but the timing pulse output from the serial / parallel converter is monitored, so that the quality of the received signal is not deteriorated and the reset signal is highly accurate. Can be generated.

It is a block diagram which shows the structural example of the serial communication apparatus which concerns on one Embodiment of this invention. It is a figure which shows an example of the timing chart of the signal used with the serial communication apparatus which concerns on one Embodiment of this invention.

  Embodiments of a serial communication device according to the present invention will be described below in detail with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration example of a serial communication apparatus according to the present invention. As shown in FIG. 1, the serial communication device includes a serial reception unit 1, a serial / parallel conversion unit 2, a parallel data storage unit 3, a processor 4, and a pulse monitoring unit 5.

  FIG. 2 is a diagram illustrating an example of a timing chart of signals used in the serial communication device according to the embodiment of the present invention.

  The serial receiver 1 converts a physical signal change of the received signal 100 on the serial communication line into a serial signal 11 that is logical data, and outputs the serial signal 11 to the serial / parallel converter 2. The received signal 100 and the serial signal 11 may be the same signal.

  The serial / parallel converter 2 converts the serial signal 11 input from the serial receiver 1 into an n-bit (n ≧ 2) parallel signal 21 and outputs the parallel signal 21 to the parallel data storage unit 3. In FIG. 2, n = 8. The serial / parallel converter 2 generates a timing pulse signal 22 that forms one pulse for each n-bit parallel signal and outputs the timing pulse signal 22 to the parallel data storage unit 3 and the pulse monitoring unit 5.

  The parallel data storage unit 3 stores the parallel signal 21 at the timing when the timing pulse signal 22 changes.

  The processor 4 reads the parallel signal 31 from the parallel data storage unit 3 and performs predetermined processing.

  The pulse monitoring unit 5 monitors the timing pulse signal 22 and detects a time during which the timing pulse signal 22 does not change. When the timing pulse signal 22 does not change for a predetermined time or longer, the pulse monitoring unit 5 generates a reset signal 51 and outputs the reset signal 51 to the serial reception unit 1, the serial / parallel conversion unit 2, and the processor 4. When the reset signal 51 is input, the serial reception unit 1, the serial / parallel conversion unit 2, and the processor 4 perform initialization (reset) processing.

  As described above, in the serial communication device according to the present invention, the pulse monitoring unit 5 monitors the timing pulse signal 22 output from the serial / parallel conversion unit 2, not the signal obtained by branching the received signal 100 on the communication line. . Therefore, the problem that the quality of the received signal is deteriorated due to the branching of the received signal 100 does not occur. Further, the pulse monitoring unit 5 is not directly affected by the noise of the received signal 100, and is not affected by the detection of the pulse signal even if the timing pulse signal 22 is slightly deviated. Therefore, the possibility of malfunction can be reduced and a highly accurate reset signal can be generated. Furthermore, the serial communication device according to the present invention is configured by a simple digital circuit, and can reduce the processing load of the system.

  Here, the processor 4 may input the reset signal 51 as an interrupt request to itself. The processor 4 activates interrupt processing in response to an interrupt request, performs communication abnormality processing, and becomes ready to receive again after the processing ends. By doing so, the initialization process of the processor 4 can be omitted when a communication abnormality occurs, and it is possible to quickly return to a receivable state.

  Although the above embodiments have been described as representative examples, it will be apparent to those skilled in the art that many changes and substitutions can be made within the spirit and scope of the invention. Therefore, the present invention should not be construed as being limited by the above-described embodiments, and various modifications and changes can be made without departing from the scope of the claims. For example, a plurality of constituent blocks described in the embodiments can be combined into one, or one constituent block can be divided.

  The present invention can generate a highly accurate reset signal without degrading the quality of a received signal, and is therefore useful for any application for initializing a device when a serial communication error occurs.

DESCRIPTION OF SYMBOLS 1 Serial reception part 2 Serial / parallel conversion part 3 Parallel data storage part 4 Processor 5 Pulse monitoring part 11 Serial signal 21,31 Parallel signal 22 Timing pulse signal 51 Reset signal 100 Reception signal

Claims (2)

A serial receiver that receives a signal on the serial communication line and outputs a serial signal;
A serial / parallel converter that converts the serial signal into a parallel signal and generates a timing pulse signal;
A parallel data storage unit for storing the parallel signals;
A processor for reading out the parallel signal from the parallel data storage unit;
A pulse monitoring unit that monitors a change in the timing pulse signal and outputs a reset signal to the serial reception unit, the serial / parallel conversion unit, and the processor when the timing pulse signal does not change over a predetermined time;
A serial communication device comprising: The serial communication device according to claim 1, wherein the processor uses the reset signal as an interrupt request.

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