JP2014212240A - Electronic device for vehicle - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic device for a vehicle capable of electrically connecting a solder-joint portion of a device mounted on an electronic substrate as successfully as possible by relaxing the stress concentration applied to an electronic substrate by screw fastening in the device.SOLUTION: A slit 4yb is provided between an arrangement position of a through hole 4y of a main substrate 4 and a semiconductor package 30. Crack occurrence in a soldering part of the semiconductor package 30 can be suppressed by suppressing distortion of the main substrate 4. This suppression makes it possible to improve resistance to a temperature cycle test which assumes a severe environment in a vehicle.

Description

  The present invention relates to a vehicular electronic device that can be mounted on a vehicle.

  This type of vehicle electronic device is equipped with a microcomputer and controls various devices (sensors, actuators). In recent years, electronic control devices for vehicles have been digitized, and for example, not only the conventional navigation function but also various services such as cooperation with a center device outside the vehicle and behavior control have been realized. In order to realize such various controls, the number of components mounted on the board increases. On the other hand, since the vehicular electronic device is mounted in a limited space in the vehicle, it is required to be downsized and has physical limitations. As a technique related to the present application, an electronic device that can suppress the concentration of stress on a fixed portion of a circuit board is provided (for example, see Patent Document 1).

JP 2007-329413 A

  When many devices are mounted on a printed wiring board, it is difficult to optimally arrange all device components in consideration of heat dissipation, environmental resistance, and the like in consideration of various restrictions. When the device is disposed in the vicinity of the screw placement position and the printed wiring board is fixed using the screw, a tensile stress is generated on the board. When a temperature cycle test is performed assuming a harsh environment in the vehicle, cracks are likely to occur in the solder joints. In the worst case, the solder joint of the device may cause an electrical connection failure and the function of the product may be lost.

  It is an object of the present invention to suppress distortion applied to a printed wiring board by screwing a device mounted on the printed wiring board and to make a reliable electrical connection at a solder joint portion of the device. To provide equipment.

  According to the first aspect of the present invention, the printed wiring board is provided with a through hole for inserting a screw. The printed wiring board is fixed to the metal member by inserting the screw into the through hole of the printed wiring board. In the printed wiring board, a slit is provided between the arrangement position of the through hole for inserting the screw and the arrangement position of the first semiconductor package. For this reason, when the screw is fastened through the through hole, distortion generated around the through hole can be suppressed by the slit. As a result, stress concentration can be alleviated and reliable electrical connection can be achieved at the solder joint of the device.

1 is an exploded perspective view schematically showing an electronic device for a vehicle from one front side according to an embodiment of the present invention. Layout of parts on the back side of the multilayer wiring board Layout of parts on the front side of the multilayer wiring board Cross-sectional view showing substrate arrangement after assembly (cross-sectional view along line AA in FIG. 5) Rear view schematically showing the multilayer wiring board from the back side Simulation result of strain distribution of multilayer wiring board Enlarged view of simulation result of stress concentration distribution of multilayer wiring board Simulation result of strain distribution without slit (Fig. 6 equivalent) Enlarged view of the simulation result of stress concentration distribution when there is no slit (Fig. 7 equivalent) Simulation result of strain distribution when slit is extended to the periphery of positioning hole (equivalent to FIG. 6) Enlarged view of the stress concentration distribution simulation result when the slit extends to the periphery of the positioning hole (equivalent to FIG. 7)

Hereinafter, an embodiment of the present invention will be described with reference to FIGS.
As shown in FIG. 1, the vehicular electronic device 1 includes a metal back cover 3 with a centrifugal fan unit 2 mounted on the backmost part, and is mounted on the front side of the back cover 3 with a CPU and the like. Printed wiring board (hereinafter referred to as main board) 4, inter-board frame 5, printed circuit board (hereinafter referred to as interface board) 6 for mounting an interface circuit, top frame 7, LCD 8, intermediate presser frame 9, touch panel 10, outer frame 11 are assembled using screws 12 in this order. Moreover, the side plate 13 is assembled | attached to the side of each members 4-6 among these using the screw 12. FIG.

  Among these components, the touch panel 10, the LCD 8, the top frame 7, the interface board 6, the inter-board frame 5, and the main board 4 are formed in a flat plate shape, and are face-to-face in an appropriate distance from each other in the order described above. Are stacked while being separated from each other.

  The outer frame 11 on the front side is formed in a rectangular frame shape, and the inside of the outer frame 11 becomes a display display area of the LCD 8 and is provided as an operation area of the touch panel 10. The touch panel 10 has a rectangular shape, and is disposed on the inner back side of the outer frame 11 with the user operation surface as the front side. The intermediate presser frame 9 is configured as a rectangular frame outside the touch panel 10, and the LCD 8 is disposed on the back side of the touch panel 10. The top frame 7 is molded into a predetermined shape using a metal member and disposed on the back side of the LCD 8.

  An interface board 6 is disposed on the back side of the top frame 7. The interface board 6 mainly interfaces with various other in-vehicle devices (not shown), and further includes a power supply component (not shown), and is also used as a power board.

  The interface board 6 is not provided with an opening in the same plane area as the opening provided on the right side of the inter-board frame 5 and the main board 4 (swing: see 4a and 5e in FIG. 1). The interface board 6 is formed of a multilayer printed wiring board. The interface board 6 is mounted with electronic components such as various semiconductor packages 6a (see FIG. 1) for performing various control specialized for the power control function and vehicle control.

  The interface board 6 includes a Bluetooth (registered trademark) communication unit that interfaces with various in-vehicle devices (not shown), an interface unit (IF), a CAN driver, a microcomputer that performs input / output control with the in-vehicle devices, NOR flash memory, A / A D converter (ADC), a D / A converter (DAC), a video decoder, an LED driver for driving a backlight LED, an analog selector, etc. (all not shown) are mounted. Although not shown, the interface board 6 is electrically connected to a battery, an external camera (R camera, S camera), DVD / DTV / etc, DCM (Data Communication Module), Bluetooth antenna, vehicle network (CAN), microphone, and the like. The interface function is realized by this.

  As shown in FIG. 1, a connector (board-to-board connector) 14 is mounted on the back surface of the interface board 6. A connector 14 is also mounted on the main board 4 so as to face the connector 14 of the interface board 6. These connectors 14 structurally connect the electrical wiring of the interface board 6 and the electrical wiring of the main board 4, and electrically connect the components mounted on the boards 4 and 6.

  As shown in FIG. 1, a plurality of connectors 15 are arranged along the inner side of the upper end side of the interface board 6. The plurality of connectors 15 are provided by projecting the connection end to the back side through the opening 3c of the metal back cover 3, and other in-vehicle devices (not shown) provided behind the vehicle electronic device 1. Connect the electrical wiring to An inter-board frame 5 is disposed on the back surface of the interface board 6. The inter-board frame 5 is formed by molding a metal member.

  As shown in FIG. 1, the inter-substrate frame 5 is provided with openings 5c, 5d, and 5e on the upper edge, the left edge, and the right edge, respectively. The opening 5c on the upper end side is provided to pass through the plurality of connectors 15 mounted on the interface board 6. An opening 5d on the left end side is provided to pass through the connector 14. Further, the opening 5 e on the right side is provided in substantially the same area as the opening 4 a on the right side of the main substrate 4. The opening 5e on the right end side is slightly larger than the other openings 5c and 5d.

  A main substrate 4 is disposed on the back surface of the inter-substrate frame 5. The main board 4 and the interface board 6 are arranged so as to be separated from each other substantially in parallel. The main board 4 is a multilayer (for example, 10 layers) printed wiring board. The main board 4 has a smaller component mounting area in the vertical direction and the horizontal direction than the interface board 6.

  When the arrangement position in the vertical direction is described relatively, the connector 16 arranged on the back surface of the main board 4 is arranged so as to be located immediately below the connector 15 attached to the interface board 6. The connector 16 is provided for electrical connection of the main board 4 and wiring connection with various electrical blocks (not shown) such as a navigation device, an audio device, and an external connection box (AUXBox).

  A back cover 3 is disposed on the back side of the main substrate 4. The back cover 3 is molded so that the upper and lower sides of a rectangular flat plate are bent forward (see the bent portion 3a). A suction port 3 b is provided in the bent portion 3 a at the lower end side of the back cover 3. The suction port 3b is provided at the left end of the bent portion 3a on the lower end side of the back cover 3, and is provided in a plurality of slit shapes with the front-back direction (front-rear direction) as the longitudinal direction. The wind flows from the suction port 3b between the substrates 4 and 6 and the inter-substrate frame 5.

  The back cover 3 is provided with an opening (not shown) through which the wind of the centrifugal fan unit 2 flows, and the centrifugal fan unit 2 is fixed to the back side of the opening of the back cover 3. The centrifugal fan unit 2 protrudes rearward from the rear surface of the back plate of the back cover 3.

  The centrifugal fan unit 2 has a structure in which blades are installed in a cylindrical portion having a substantially square flange. The air inlet 2a of the centrifugal fan unit 2 is disposed so as to straddle the right end side 4f of the main board 4 in the vertical and horizontal directions. The centrifugal fan unit 2 can flow in the wind along the component mounting surface of the main board 4, and can flow in the wind along the component mounting surface of the interface board 6 through the opening 4 a and exhaust to the rear side of the back cover 3. It has become.

  Further, the back cover 3 is provided with an opening 3c along the upper end side of the back plate, and further provided with an independent opening 3d along the lower side of the opening 3c. These openings 3c and 3d are provided so as to be longitudinal in the left-right direction.

  The opening 3 c along the upper end side of the back plate of the back cover 3 is provided as an opening for allowing the connector 15 mounted on the interface board 6 to pass therethrough. The opening 3d provided independently along the lower side of the opening 3c is provided as an opening for allowing the connector 16 mounted on the main board 4 to pass therethrough. The connectors 16 and 15 attached to the interface board 6 and the main board 4 are taller than other semiconductor parts (IC package such as CPU).

  FIG. 2 shows the mounted components on the back side of the main board 4, and FIG. 3 shows the mounted parts on the front side of the main board 4. As shown in FIG. 2, various components such as a semiconductor package for multimedia and digital data processing are mainly mounted on the back side of the main substrate 4.

  These components include a power management integrated circuit (PMIC) 30, a main CPU 31, a plurality of SDRAMs 32, a flash memory 33, a video processing ASIC 34, an external memory connector 35, and an LVDS (Low Voltage Differential Signaling) circuit 36. And various input / output interface connectors 16 including a USB-Hub circuit 39, a transmission / reception connector of the LVDS circuit 36, and a USB (Universal Serial Bus) input / output connector.

  As shown in FIGS. 2 and 3, the PMIC 30, the main CPU 31, the SDRAM 32, the flash memory 33, the video processing ASIC 34, the LVDS circuit 36, and the USB-Hub circuit 39 are incorporated in separate semiconductor packages. . Therefore, in the following description, when the electrical description is made, the above-mentioned names are attached with the reference numerals, and when the mechanical and thermal description is made, the same reference numerals as those of the electrical functional parts are given as the semiconductor packages 30, 31. A part layout explanation of the semiconductor package will be given.

  Since the main CPU 31 performs high-speed data processing, the semiconductor package 31 generates heat. Further, since the PMIC 30 has a function of saving power of the main CPU 31 and monitors the power source, the semiconductor package 30 also generates heat. Two or more main devices 30 and 31 are mounted on the main board 4.

  In addition, since the SDRAM 32 frequently performs high-speed communication processing with the main CPU 31, a plurality of semiconductor packages 32 (4 × 2: total of 8 on the front and back sides) are arranged along the immediate vicinity of the semiconductor package 31. .

  The flash memory 33 is a storage medium for storing a startup program for the vehicle electronic device 1, and the semiconductor package 33 is arranged close to the semiconductor package 31 containing the main CPU. These semiconductor packages 32 and 33 are arranged within a first predetermined distance with the semiconductor package 31 as the center.

  As shown in FIGS. 2 and 3, the main board 4 is provided with an opening 4a on the right side thereof. The opening 4a serves as a ventilation opening for the wind by the centrifugal fan unit 2 provided on the backmost side, and is an opening necessary for efficiently cooling the two substrates 4 and 6.

  Two SDRAMs 32 shown in FIG. 2 are provided side by side along the upper side of the main CPU 31, and two are provided side by side along the right side of the main CPU 31. As a result, four semiconductor packages 32 are soldered to the back surface of the main substrate 4.

  In addition, a semiconductor package 33 containing a flash memory is disposed at the lower side of the right side of the main CPU 31. Further, as shown in FIG. 2, an LVDS circuit 36 is disposed on the SDRAM 32 provided along the upper side of the main CPU 31.

  As shown in FIG. 3, on the front side of the main substrate 4, semiconductor packages of an SDRAM 32, an LVDS circuit 36, an input / output interface circuit (IOH) 37, and an oscillation IC (CGIC: Clock Generate Integrated Circuit) 38 are arranged. It is installed.

  On the front surface side of the main substrate 4, four SDRAM semiconductor packages 32 are arranged opposite to the semiconductor package 32 disposed on the back surface of the main substrate 4 with the substrate 4 interposed therebetween. That is, a total of eight semiconductor packages 32 are provided on the front and back surfaces.

The main CPU 31 disposed on the back surface of the main substrate 4 communicates with the SDRAM 32 disposed on the front surface side of the main substrate 4 through multilayer wiring in the main substrate 4.
The LVDS circuit 36 on the front surface side of the main substrate 4 is also disposed opposite to the LVDS circuit 36 on the rear surface side with the main substrate 4 interposed therebetween. These front and back LVDS circuits 36 constitute a receiver and a transmitter, respectively, and are arranged close to the connector 16.

  The CGIC 38 supplies a clock signal to electronic components (for example, the main CPU 31 and the input / output interface circuit 37) that require a clock. The CGIC semiconductor package 38 is disposed beside the right side of the semiconductor package 31 and below the semiconductor package 37 of the input / output interface circuit, and is disposed close to the main CPU 31 and the input / output interface circuit 37. The The input / output interface circuit (IOH) 37 is connected to the main CPU 31 by a bus. For this reason, these semiconductor packages 31 and 37 are arranged close to each other with the main substrate 4 interposed therebetween.

  The semiconductor package 37 is disposed on the upper right side of the semiconductor package 31 of the main CPU, and these packages 31 and 37 are arranged close to each other so that noise emission generated during data communication can be suppressed as much as possible. The input / output interface circuit 37 is also electrically connected to the peripheral circuit 34 and the LVDS circuit 36.

  In addition, although not shown, electronic components such as various transistors, resistor components, and chip capacitors are also arranged on the front and back sides of the main substrate 4. These semiconductor packages 30 to 34, 36 to 38, other electronic components 35, and the like are arranged apart from the through holes 4z and 4y for screw tightening by a predetermined distance or more (see predetermined ranges 4za and 4ya). ). A space in which components can be arranged is embedded on both the front and back surfaces of the main board 4. Reference numerals 4y and 4ya denote a through hole 4y and a predetermined range 4ya close to the PMIC 30, and reference numerals 4z and 4za denote other through holes and a predetermined range thereof.

  That is, if the soldering pads of the electrodes of various electronic components are arranged close to the through holes 4z and 4y, a tensile stress is applied to the soldering portion during assembly. For this reason, it is not desirable to solder components near the through holes 4z and 4y, and no electronic components are arranged within the predetermined ranges 4za and 4ya from the through holes 4z and 4y.

  FIG. 5 schematically shows a cross section of the component arrangement in front of the main board 4, and FIG. 4 shows a cross section taken along the line AA of FIG. As shown in FIG. 4, the inter-board frame 5 includes a leg portion 5 a that partially stands in the front-rear direction between the main board 4 and the interface board 6.

  When the inter-board frame 5 is mounted between the main board 4 and the interface board 6, the inter-board frame 5 and the inter-board frame 5 and the main board 4 are interposed. Space is secured, and the wind of the centrifugal fan unit 2 can pass through. Thus, the interface board 6 and the main board 4 are arranged with a predetermined height in the front and back direction.

  The inter-substrate frame 5 is provided with a screw hole 5b. On the other hand, the main substrate 4 is also provided with a through hole 4y. The main board 4 is fixed to the inter-board frame 5 by fastening the screw 12 to the screw hole 5 b through the through hole 4 y of the main board 4. The screw head 12a of the screw 12 is formed in a plate shape, for example, and when the screw 12 is fastened, the entire periphery of the through holes 4y, 4z of the main board 4 is pressed toward the inter-board frame 5 side (front side).

  A through hole 4x is formed on the right side of the through hole 4y of the main substrate 4 with a predetermined distance therebetween. The through hole 4x is used for easily assembling the main board 4 and the inter-board frame 5, and is provided as a positioning hole.

  As shown in FIG. 3, the through hole 4x is provided between the CGIC semiconductor package 38 and the through hole 4y. The through hole 4x also has an effect of suppressing distortion generated in the main board 4 when the screw 12 is fastened to the through hole 4y. By providing the through hole 4x, it is possible to prevent stress from being generated particularly in the soldering portion 38a of the CGIC semiconductor package 38.

  As shown in FIG. 4, positioning protrusions 5 f are provided on the back side of the inter-substrate frame 5. The protrusion 5f is shaped such that its tip side can be fitted into the hole diameter of the through hole 4x, and protrudes to the back side (rear side) through the through hole 4y of the main board 4 when assembled. Accordingly, the inter-board frame 5 is positioned in the board surface direction (up / down / left / right plane direction) of the main board 4. The screw 12 is disposed close to the center position of the protrusion 5f, for example, about 6.5 mm in consideration of the relationship with the arrangement position of other electronic components.

  As shown in FIGS. 2 and 3, a slit 4yb is provided between the PMIC semiconductor package 30 and the through hole 4y. The slit 4yb is provided in order to reduce the distortion of the substrate 4 and the stress on the soldering portion 30a due to the screw 12 being tightened.

  The slit 4yb is provided in a circular arc shape at a position spaced apart from the through hole 4y by a predetermined distance. The slit 4yb is formed, for example, from right above to a right 30 degree arc and a left 60 degree arc, for a total of 90 degrees, and the inner end of the slit 4yb is located 1.5 mm away from the outer end of the through hole 4y. The arc width of is, for example, 1 mm.

  The semiconductor packages 30 to 34 and 36 to 38 are disposed at positions (see ranges 4za and 4ya) that are spaced apart from each other by a predetermined distance or more from the tightening position of the screw 12, and FIG. The semiconductor package 30 shown is constituted by a QFN package having low solder joint resistance and is disposed at a position considerably close to the through hole 4y (tightening position of the screw 12). The soldered portion of the semiconductor package 30 is easily subjected to stress when the screw 12 is tightened, and cracks are likely to occur.

  The inventor verified the contradiction, strain distribution, and stress distribution generated in the main board 4 according to the tightening of the screws 12. The inventor then performs a temperature cycle acceleration test (several hundreds to thousands of cycles from minus tens of degrees to plus tens of degrees), thereby causing solder cracks in each of the semiconductor packages 30 to 32, 34, 36, and 39. The existence / non-existence and OK / NG of electrical operation were verified.

  6 and 7 show the simulation results of the strain distribution and the stress concentration distribution when the slit 4yb is provided as shown in FIGS. 8 and 9 show simulation results of strain distribution and stress concentration distribution when the slit 4yb is not provided. FIGS. 10 and 11 show simulation results of strain distribution and stress concentration distribution when the slit 4yb extends to the periphery of the positioning through hole 4x. The slit 4yb shown in FIGS. 10 and 11 is formed in an arc shape with a left rotation angle of 60 degrees and a right rotation angle of 60 degrees from right above the through hole 4y with the through hole 4y as a center.

  In FIG. 6, FIG. 8, and FIG. 10, regions where the amounts of distortion are equal are indicated by iso-strain lines. In FIG. 7, FIG. 9, and FIG. 11, regions where stresses are equal are indicated by iso-stress lines. In FIGS. 6, 8, and 10, the regions X <b> 1 to X <b> 4 indicate isodistortion lines, and regions denoted by the same reference numerals have substantially the same amount of distortion. The relationship between the distortion amounts of these regions is X4> X3> X2> X1. In FIGS. 7, 9, and 11, the regions Y <b> 1 to Y <b> 4 indicate isostress lines, and regions denoted by the same reference numerals are regions to which substantially the same tensile stress is applied. The relationship between the stresses in these regions is Y4> Y3> Y2> Y1.

  As shown in FIGS. 8 and 9, it has been found that if the slit 4yb is not formed, distortion and stress are greatly generated on the center side of the substrate 4 with respect to the positions of the through holes 4z and 4y. If the slit 4yb is not formed, it has been found that the range of the region X4 showing the largest strain amount extends through the through holes 4y and 4x as shown in FIG. If the strain region X4 is large, the soldering portion 30a is affected, and a solder crack occurs in the soldering portion 30a.

  As shown in FIGS. 10 and 11, even if the slit 4yb is formed, if the slit 4yb is formed up to the vicinity of the positioning through hole 4x, the distortion of the main substrate 4 is suppressed as shown in FIG. Although the effect can be improved, it has been found that stress concentration (Y4 region: about twice) occurs between the slit 4yb and the through hole 4x as shown in FIG.

  Therefore, in order to increase the effect of suppressing the distortion of the main board 4, it is preferable to increase the arc length of the arc-shaped slit 4yb as much as possible. Conversely, in order to increase the strength of the main board 4, the slit 4yb is used for positioning. In order not to approach the through hole 4x, the arc length of the slit 4yb may be shortened.

  Although it is desirable to set the arc length of the arc-shaped slit in this trade-off, the inventors have found that it is best to set the arc angle to 90 degrees as a whole as shown in FIGS. As shown in FIG. 6, the expansion of the region X4 having the largest distortion amount can be suppressed. The soldering part 30a of the semiconductor package 30 is not positioned at least in the region X4 where the amount of distortion is the largest. Further, the inventor confirmed that by adding the slit 4yb as shown in FIGS. 6 and 7, the amount of distortion can be reduced by 35% compared to before adding the slit 4yb.

  According to this embodiment, there are the following characteristic operational effects. Since the slit 4yb is provided between the arrangement position of the through hole 4y of the main substrate 4 and the semiconductor package 30, distortion of the main substrate 4 can be suppressed. The occurrence of cracks in the soldering part 30a of the semiconductor package 30 can be suppressed, and the electrical connection of the PMIC 30 can be made favorable.

  In particular, the semiconductor package 30 is composed of a QFN package. However, the QFN package has a relatively weak solder joint resistance. Therefore, when the semiconductor package 30 is disposed in the vicinity of the screw 12, a crack is generated in the soldering portion 30a. Prone to poor electrical connection. Therefore, the generation of solder cracks can be particularly effectively prevented by providing the slit 4yb in the vicinity of the semiconductor package 30.

  The main board 4 is provided with positioning through-holes 4x that suppress the blur in the plane direction of the main board 4 in a plane rotation angle direction different from the formation direction side of the slits 4yb from the through-holes 4y. Since the through hole 4x is formed between the arrangement position of the semiconductor package 38 and the arrangement position of the through hole 4y, the distortion of the main substrate 4 can be suppressed, and particularly the stress applied to the semiconductor package 38 of CGIC can be reduced. The occurrence of cracks in the soldering portion 38a of the semiconductor package 38 can be suppressed as much as possible, and the electrical connection of the CGIC 38 can be improved.

(Other embodiments)
The present invention is not limited to the above-described embodiment. For example, the following modifications or expansions are possible. If the semiconductor package 30 is constituted by a QFN package in particular, the above-described influence is likely to occur. By providing the slit 4yb, the distortion suppressing effect can be improved and the generation of cracks can be suppressed. However, BGA (Ball Grid Array), LGA (LGA) Even when a package structure such as a Land Grid Array is adopted, the occurrence of cracks in the soldered portion can be suppressed. Although the main substrate 4 is composed of a multilayer substrate, a double-sided substrate or a single-sided substrate can also be applied.

  In the drawings, 1 is an electronic device for a vehicle, 4 is a main board (printed wiring board), 5 is an inter-board frame (metal member), 12 is a screw, 30 is a power supply control IC (device, first semiconductor package), Reference numeral 38 denotes an oscillation IC (second semiconductor package).

Claims (4)

A metal member (5);
A printed wiring board (4) provided with a first through-hole (4y) that is fixed to the metal member (5) by a screw (12) and through which the screw (12) is inserted;
A first semiconductor package (30) of a device solder-bonded to the printed wiring board (4),
The printed wiring board (4) is characterized in that a slit (4yb) is provided between an arrangement position of the first through hole (4y) and an arrangement position of the first semiconductor package (30). Vehicle electronics. The vehicle electronic device according to claim 1,
The first electronic package (30) is constituted by a QFN package (Quad For Non-Lead Package). The vehicle electronic device according to claim 1 or 2,
A second semiconductor package (38) which is soldered to the printed wiring board (4) and incorporates an oscillation IC;
The printed wiring board (4) suppresses the blur in the planar direction of the printed wiring board (4) in a plane rotation angle direction different from the formation direction side of the slit (4yb) from the first through hole (4y). A second through-hole (4x) for positioning is provided, and the second through-hole (4x) is defined by an arrangement position of the second semiconductor package (38) and an arrangement position of the first through-hole (4y). A vehicular electronic device characterized by being configured between. In the vehicle electronic device according to any one of claims 1 to 3,
The said electronic device for vehicles characterized by the said slit (4yb) being formed in circular arc shape of the predetermined rotation angle centering on the said 1st through-hole (4y).

Images