JP2014165184A - Chip type positive characteristics thermistor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a chip type positive characteristics thermistor element having an element volume of 0.12 (mm) or less, in which chattering is less likely to occur.SOLUTION: A chip type positive characteristics thermistor element 1 includes a ceramic substrate 2 having end faces Sa, Sb facing each other in the X axis direction, and a side face Sc connecting the end faces Sa, Sb, where the internal resistance value changes by temperature variation, and a low heat conduction layer 3 covering the side face Sc at least partially. The low heat conduction layer 3 has a thermal conductivity of 4.0 (W/m K) or less, and a thickness of 0.1 (μm) or more in the normal direction of the side face.

Description

The present invention relates to a chip type positive temperature coefficient thermistor element having a volume of 0.12 mm ³ or less.

  An example of a conventional chip-type positive characteristic thermistor element (hereinafter simply referred to as a thermistor element) is disclosed in Patent Document 1, for example. This thermistor element includes a ceramic base having a substantially rectangular parallelepiped shape, and external electrodes provided on both end faces of the thermistor element. Each external electrode has a structure in which a conductive metal layer, a conductive resin layer, and a metal plating layer are laminated. Here, the conductive metal layer is formed immediately above both end faces of the ceramic substrate, and the metal plating layer is the outermost layer. In addition, a glass layer is formed on the four side surfaces of the ceramic substrate on which no external electrode is provided in order to improve mechanical strength and the like.

  The conventional thermistor element is not limited to that described in Patent Document 1, and is typically used for overheating detection of a heat source. Specifically, the thermistor element is mounted in the vicinity of the heat source. When the temperature of the heat source (that is, the ambient temperature) increases, the temperature of the ceramic substrate increases and the resistance value increases. A power supply voltage is supplied to the thermistor element. Then, a voltage representing the ambient temperature is output between the output terminals of the thermistor element and supplied to the IC. The IC determines whether the heat source is in an overheated state based on the input voltage.

Japanese Patent Laid-Open No. 10-092606

  When the heat source temperature exceeds the reference temperature, the IC needs to determine that the heat source is in an overheated state. However, in reality, the temperature represented by the output voltage of the thermistor element is due to the heat conduction relationship from the heat source to the thermistor element and other factors (for example, wind) even though the reference temperature exceeds the reference temperature. There was a problem that the reference temperature was exceeded or not exceeded. This problem is known as so-called chattering (or latching).

  Here, if the volume of the ceramic substrate is large, the heat capacity is sufficiently large. Therefore, once the temperature of the substrate exceeds the reference temperature, it takes time until the temperature again falls below the reference temperature. In this case, chattering is unlikely to occur.

On the other hand, if the ceramic substrate is 0603 or less (in other words, the substrate volume is 0.12 [mm ³ ] or less) according to the EIAJ standard, the heat capacity becomes small. In this case, even if the substrate temperature exceeds the reference temperature once, it easily falls below the reference temperature immediately due to factors such as heat conduction. Therefore, chattering is likely to occur when the substrate volume is 0.12 [mm ³ ] or less.

Therefore, an object of the present invention is to provide a chip-type positive temperature coefficient thermistor element in which the volume of the element is 0.12 [mm ³ ] or less and chattering hardly occurs.

In order to achieve the above object, one aspect of the present invention is a chip-type positive temperature coefficient thermistor element having a volume of 0.12 [mm ³ ] or less, wherein the first end surface and the second end surface are opposed to each other in a predetermined direction. A ceramic substrate having a side surface connecting between the first end surface and the second end surface, wherein the internal resistance value changes due to a temperature change, and a low thermal conductive layer covering at least a part of the side surface; It has. The low thermal conductive layer has a thermal conductivity of 4.0 [W / m · K] or less and a thickness of 0.1 [μm] or more in the normal direction of the side surface.

According to the above aspect, even if the thermistor element has a volume of 0.12 [mm ³ ] or less and a small heat capacity, the heat once accumulated in the ceramic base is difficult to escape to the outside due to the action of the low thermal conductive layer. As a result, chattering is less likely to occur.

It is a longitudinal section showing a chip side positive characteristic thermistor element concerning one embodiment of the present invention. It is a figure which illustrates the circuit structure for measuring the characteristic of each sample of a chip | tip type | mold positive characteristic thermistor element. It is a figure which shows the temperature change of FET shown in FIG. 2, and IC.

  Hereinafter, a chip type positive temperature coefficient thermistor element (hereinafter simply referred to as a thermistor element) according to an embodiment of the present invention will be described with reference to the drawings.

(Introduction)
First, for the convenience of the following description, the X axis, the Y axis, and the Z axis shown in FIG. 1 are defined. The X axis, Y axis, and Z axis indicate the left-right direction, the front-rear direction, and the vertical direction of the thermistor element 1.

(Configuration of thermistor element)
In FIG. 1, the thermistor element 1 includes a ceramic substrate 2, a low thermal conductive layer 3, and a pair of external electrodes 4a and 4b.

The ceramic substrate 2 is made of, for example, a ceramic material in which a predetermined additive is added to BaTiO ₃ (barium titanate). Here, the additive is a rare earth, typically Sm (samarium). In addition to this, Nd (neodymium), La (lanthanum), or the like can be used as an additive.

  The ceramic substrate 2 may have either a single plate structure or a laminated structure. FIG. 1 illustrates a single plate structure. The ceramic base 2 has, for example, a substantially rectangular parallelepiped shape that is long in the left-right direction. The first end surface Sa and the second end surface Sb that oppose each other in the left-right direction, and the first end surface Sa and the second end surface. And at least one side surface Sc connecting Sb. Here, in this embodiment, both end surfaces Sa and Sb have a rectangular shape. In this case, the side surface Sc includes a first side surface Sc1 to a fourth side surface Sc4 each having a substantially rectangular shape.

Next, an example of the size of the ceramic substrate 2 will be described. The length L (hereinafter referred to as L dimension) of the ceramic substrate 2 is, for example, 600 [μm], the width W in the front-rear direction is, for example, 300 [μm], and the thickness T in the height direction is, for example, 300 [μm]. ]. However, the present invention is not limited to this, and the size of the ceramic substrate 2 may be appropriately determined so that the whole volume of the thermistor element 1 is 0.12 [mm ³ ] or less.

  In the present embodiment, the low thermal conductive layer 3 is formed on the side surfaces Sc1 to Sc4 of the surface of the ceramic substrate 2 excluding both end surfaces Sa and Sb. The low thermal conductive layer 3 is provided to make it difficult for the heat accumulated in the ceramic base 2 to be released to the outside of the ceramic base 2.

  The low thermal conductive layer 3 is made of glass having a thermal conductivity of 4.0 [W / m · K] or less, high thermal conductive glass, or a composite material of glass and resin, and the normal direction of the side surfaces Sc1 to Sc4. Is formed so as to have a thickness of 0.1 [μm] or more.

Here, as described above, the thermistor element 1 has a volume of 0.12 [mm ³ ] or less. If the thickness of the low thermal conductive layer 3 is set to 200 [μm] or more under these conditions, the volume of the ceramic substrate 2 becomes extremely small. As a result, the thermistor element 1 becomes extremely high in resistance, and the resistance value change with respect to the temperature change becomes small, which is not preferable from the viewpoint of overheat detection. From this viewpoint, the upper limit of the thickness of the low thermal conductive layer 3 is preferably set to 200 [μm].

  In the present embodiment, the low thermal conductive layer 3 is described as covering the entire side surface Sc. However, the present invention is not limited to this, and the surface of at least a part (for example, about half) of the ceramic substrate 2 may not be exposed to air.

  The external electrodes 4a and 4b are formed on the end surfaces Sa and Sb, and have base electrodes 5a and 5b, first plating films 6a and 6b, and second plating films 7a and 7b.

  The base electrodes 5a and 5b are made of, for example, an Ag—Zn (silver / zinc) alloy and Ag (silver). Specifically, an Ag—Zn alloy layer is in ohmic contact with each of the end faces Sa and Sb, and an Ag (silver) layer is formed on the Ag—Zn alloy layer.

  The first plating films 6a and 6b are made of, for example, Ni and are formed on the base electrodes 5a and 5b. The second plating films 7a and 7b are made of, for example, Sn (tin) and are formed on the first plating films 6a and 6b.

(Example of thermistor element manufacturing method)
An example of the manufacturing process of the thermistor element 1 generally includes the following processes.

First, a BaTiO ₃ ceramic powder capable of obtaining desired characteristics is press-molded to a size of 150 [mm] × 150 [mm]. Thereafter, a predetermined degreasing / firing process is performed on the press-molded ceramic powder. As a result, a mother substrate is obtained. This mother substrate is lapped until its thickness (corresponding to the thickness T) reaches 300 [μm]. Thereafter, a strip-shaped substrate having a width of 300 [μm] (corresponding to the width W in the front-rear direction) is obtained by dicing cut.

  The strip-shaped substrate is dip coated. Specifically, it is immersed in a liquid glass having a thermal conductivity of 0.6 [W / m · K], whereby the liquid glass is applied in layers on the substrate surface. At this time, the film thickness is adjusted so that the thickness of the glass layer is about 30 [μm].

  Thereafter, the strip-shaped substrate on which the glass layer is formed is diced again so that its L dimension is 600 [μm].

  Through the above steps, a large number of ceramic substrates 2 having the low thermal conductive layer 3 are produced.

  Next, an Ag—Zn paste that provides an ohmic contact with the ceramic is applied to each of the end surfaces Sa and Sb of the ceramic substrate 2. Thereafter, the ceramic substrate 2 coated with the Ag—Zn-based paste is baked. Then, after a thermosetting Ag paste is applied on the Ag—Zn alloy layer, the Ag paste is heated and cured. Thereby, the base electrodes 5a and 5b are formed. Finally, first plating films 6a and 6b of Ni are formed on the surfaces of the base electrodes 5a and 5b by electroplating, and then a second plating film 7a of Sn is formed on the first plating films 6a and 6b. , 7b are formed. The thermistor element 1 is completed through the above steps.

(Relationship between low thermal conductive layer and chattering)
The inventor changes the material (in other words, thermal conductivity) and thickness of the low thermal conductive layer 3 to change the thermistor elements of sample numbers 1 to 24 (hereinafter simply referred to as samples 1 to 24) shown in Table 1 below. ) And the presence or absence of chattering was confirmed using a measurement system as shown in FIG.

  As shown in Table 1, the samples 1 to 5 are provided with glasses having different thicknesses of 0.1, 10, 30, 50, and 200 [μm] as the low thermal conductive layer. Samples 6 to 10 are high thermal conductive glasses having a thickness of 0.1, 10, 30, 50, and 200 [μm], and samples 11 to 15 are 0.1, 10, 30, 50, and 200 having a thickness of 0.1, 10, 30, 50, and 200. [Μm] glass / resin composite material A is provided as a low thermal conductive layer.

  Sample 16 is a thermistor element without a low thermal conductive layer. Samples 17, 18, and 19 include 0.05 μm-thick glass, high thermal conductivity glass, and glass / resin composite material A as a low thermal conductivity layer. Samples 20 to 24 are a composite material B of glass and resin having a thermal conductivity of 6.0 [W / m · K] and have a thickness of 0.1, 10, 30, 50, 200. A low thermal conductive layer made of the composite material B of [μm] is provided.

  Here, the measurement system M shown in FIG. 2 will be described. The measurement system M includes an FET 2, samples 1 to 24, and IC3. The FET 2 is a heat source that is an object of overheating detection by the samples 1 to 24, and is mounted on a substrate (not shown). A constant power supply voltage Vcc1 is supplied to the FET2, and the FET2 is switched by the input voltage Vin1. By changing the switching voltage Vin1, the temperature Tfet of the FET 2 is alternately switched every second between Tth + 3 [° C.] and Tth−3 [° C.] as illustrated in the upper part of FIG. Here, the temperature Tth is a reference temperature at which the samples 1 to 24 are determined to be in an overheated state. As described above, in order to confirm the presence or absence of chattering in the samples 1 to 24, an environment is intentionally created in which the temperature of the heat source (that is, the FET 2) exceeds or does not exceed the reference temperature Tth in a short time.

  Each of the samples 1 to 24 is mounted on the substrate at a position separated from the FET 2 by 1 [mm]. When the actual temperature Tfet of the FET 2 increases, the resistance value of the ceramic substrate of each of the samples 1 to 24 increases. A constant power supply voltage Vcc2 is supplied to each sample 1-24. Accordingly, a voltage Vout indicating the temperature of the FET 2 is output between the output terminals of the samples 1 to 24 and supplied to the IC 3. The IC 3 determines whether or not the temperature of the FET 2 exceeds the reference temperature Tth based on the input voltage Vout.

  The applicant of the present application observed time variation of the input voltage Vout indicating the temperature of the FET 2 in the measurement system M as described above, and determined whether chattering occurred for each of the samples 1 to 24. In this measurement, chattering means the following. That is, in the measurement system M, the actual temperature Tfet of the FET 2 fluctuates up and down with the reference temperature Tth as the boundary as described above. The occurrence of chattering follows the change in the temperature Tfet sensitively, and the input voltage Vout (in other words, the temperature of the FET 2 detected by the samples 1 to 24) is shown as the temperature Tdet1 in the middle stage of FIG. As described above, it means a state where the actual temperature Tfet is tracked and fluctuates up and down with the reference temperature Tth as a boundary. On the other hand, chattering does not occur when the input voltage Vout (in other words, the temperature of the FET 2 detected by the samples 1 to 24) slowly changes in response to the change in the temperature Tfet. As shown as Tdet2, it means a state that fluctuates slowly over the reference temperature Tth

  According to the measurement results of the present inventors, the temperature of the FET 2 detected using the samples 1 to 15 has a time waveform as shown in the lower part of FIG. That is, the low thermal conductive layer 3 is made of a material having a thermal conductivity of 4.0 [W / m · K] or less and has a thickness of 0.1 [μm] or more in the normal direction of the side surfaces Sc1 to Sc4. There was no chattering. Therefore, regarding the samples 1 to 15, even if the size is small, once the heat from the FET 2 is accumulated, the heat radiation from the ceramic substrate 2 is suppressed by the action of the low thermal conductive layer 3. Thereby, once the temperature of the overheat detection target by the thermistor element 1 exceeds the reference temperature Tth, even if the temperature of the ceramic substrate 2 moves up and down with respect to the reference temperature Tth due to various factors, it is shown in the lower part of FIG. As described above, it gradually varies in the temperature range exceeding the reference temperature Tth. From the above, if the heat source temperature exceeds the reference temperature Tth, the overheating state of the object can be accurately detected regardless of the heat conduction relationship from the heat source to the thermistor element 1 and other factors (for example, wind). A possible thermistor element 1 can be provided.

  Conversely, the temperature of the FET 2 detected using the samples 16 to 24 has a time waveform as shown in the middle stage of FIG. That is, the low thermal conductive layer 3 is not a material having a thermal conductivity of 4.0 [W / m · K] or less, or has a thickness of less than 0.1 [μm] in the normal direction of the side surfaces Sc1 to Sc4. In some cases, chattering occurs. Therefore, regarding the samples 16 to 24, the heat source temperature from the heat source to the thermistor element 1 and other factors (for example, wind) although the heat source temperature exceeds the reference temperature Tth as in the past. As a result, the overheated state of the object may not be detected accurately.

  The thermistor element according to the present invention hardly causes chattering and is useful for detecting overheating of a heat source.

1 Thermistor element
2 Ceramic substrate
3 Low thermal conductive layer 4a, 4b External electrode

Claims (3)

A chip-type positive temperature coefficient thermistor element having a volume of 0.12 [mm ³ ] or less,
A ceramic base having a first end face and a second end face opposed to each other in a predetermined direction, and a side face connecting the first end face and the second end face, wherein the internal resistance changes with temperature;
A low thermal conductive layer covering at least a part of the side surface,
The low thermal conductive layer is a chip-type positive temperature coefficient thermistor element having a thermal conductivity of 4.0 [W / m · K] or less and a thickness of 0.1 [μm] or more in the normal direction of the side surface.   The chip-type positive temperature coefficient thermistor element according to claim 1, wherein the low thermal conductive layer covers the entire side surface.   2. The chip-type positive temperature coefficient thermistor device according to claim 1, wherein a thickness of the low thermal conductive layer is less than 200 μm.

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