200933658 九、發明說明： 【發明所屬之技術領域】 本發明係有關一種具有導熱層結構之晶片電阻，特指 一種藉由絕緣基板及其上、下方設置之導熱層、導電層，且 由二端電極包覆連接該絕緣基板、導熱層及導電層之晶片電 阻，該以銅箔、金屬薄膜或合金箔為材料之導熱層設有一蝕 刻之隔離槽縫，另，該以合金為材料之導電層具特定寬度以 符合所需之阻抗大小值。 ❹ 【先前技術】 按，習用之晶片電阻，是利用導電層之設計，以達到 導電之單一效果，但其在散熱之效能表現上多所不足，故具 有創新及改善的空間。 第1圖係顯示一習用晶片電阻整體結構剖視圖，為中 華民國公告第200523955號「表面黏合金屬箔晶片電阻器之 〇 製造方法」一案中所揭露的技術，其中載明：該表面黏合金 屬箔晶片電阻器之製造方法，首先提供一絕緣基板A，再於 這絕緣基板A上形成作為端電極C之用的導體層圖形，然 後在這上貼合具特定電阻係數的金屬箔，接著把利用抗蝕劑 以將電子線路圖形塗佈在金屬箔上，然後再以化學蝕刻方式 將電子線路成型，接著將抗蝕劑去除，然後，利用鐳射或類 似方法將該金屬箔電阻層B切割出鐳射切割線B1或其他方 式的處理，以達先前所預定的電阻值。接著，進行其他後續 5 200933658 步驟而完成金屬箔晶片電阻器之製程。 第2圖係顯示另一習用晶片電阻整體結構剖視圖，為 中華民國公告第1220164號「新穎之電流感測元件及其製造 方法」一案中所揭露的技術，其中載明·一種新穎之電流感 測元件及其製造方法：主要係以鎳銅合金或錳銅合金或鎳鉻 合金等低溫度電阻係數（TCR)合金之薄膜D1，作為基板 D表層，藉由熱壓貼合方式，緊密附著於陶瓷、氧化鋁、氮 化鋁或氧化鈹（BeO)薄板D2上、下表面上，而形成之發 明基板；其次，利用光罩蝕刻，於基板表層上形成電流感測 器之佈局圖案；再於感測器單元之兩側電極E部份利用電 鍍，於底面形成覆晶F，並將正面之電極G鍍厚；然後以雷 射修整，得到具有精確阻值之感測器圖形；又於感測器圖形 上被覆一保護層Η ;並與切條，以濺鍍法被覆端面電極E ’ G ;最後進行切粒、滚鍍，而得微小之晶片型.電流感測元件 者。 習用晶片電阻之缺點如下： 1. 電阻内部結構複雜，製程時間及設備成本耗費較大。 2. 僅依靠導電層散熱，散熱效果隨寬度改變致不穩定。 3. 無導熱層設計致散熱不佳，易影響電阻壽命與性能。 綜上所述，前述所提及關於習用之晶片電阻，儘管能 夠達成在提供電路特定阻抗上所具備之基本要求，但在簡化 結構及提升散熱效率上之性能，皆存在諸多缺點與不足的情 況下，無法發择更具體之產業應用性。 由於習用之晶片電阻，存在上述之缺失與不足，基於 200933658 產業進步之未來趨勢前提下，實在有必要提出具體的改善方 案，以符合產業進步之所需，更進一步提供業界更多的技術 性選擇。 【發明内容】 本發明係以解決習用晶片電阻在簡化結構及提升散熱 效率等方面不足之缺點，以及在實用化技術等方面受到限制 之問題，一方面在達成簡化結構及提升散熱效率為目的，另 一方面在於將導電與導熱分工處理，增加電路效能與散熱性 能之個別表現，以達成所應具備之基本功能外，並使其兼具 產業應用性之實際發展與競爭要求。 為了達成上述目的及功能，其具體採行的技術手段及 方案包括： 一種具有導熱層結構之晶片電阻，該晶片電阻包含： 一絕緣基板，係以一具絕緣特性之材料為基底之板片。 一導熱層，係為一設置於絕緣基板上方之金屬層，該導熱 層#刻一隔離槽縫。 一導電層，係為一設置於絕緣基板下方且具特定寬度之金 屬層。 二端電極，係為一包覆於該絕緣基板及導熱層二側且連接 導電層二側呈u型槽體之金屬鍍覆外殼。 前述該導熱層之材料為銅箔、金屬薄膜或合金箔等之任一 種。 前述該導電層之材料為合金材料。 200933658 前述該導電層之特定寬度係由阻抗大小決定。 本發明之具體優點在於： 件精簡’製程簡單成本耗費較低。 有效增進電路效能之整體表現。 …曰°又。’提升散熱率，增加電阻性能與壽命。 、止=本發㈣達職明目㈣運狀技術手段及其構 &錄謹再配合圖式所示之實施例，詳細說明如下： G 【實施方式】 —第3圖係顯示本發明—實施例整體結構正面立體圖， 而第6圖係顯示本發明—實施例整體結構正面平面視圖。如 圖所不’其中’―種具有導熱層結構之晶片電阻，該晶片電 阻1包含： /絕緣基板11，仙H緣特性之材料為基底之板 片，係作為晶片電阻1内部絕緣之用。 Q —導熱層仏、12b，係為-設置於絕緣基板11上方之 盈屬層°亥V熱層12a、12b餘刻一隔離槽縫121 ;該導熱 層12a、12b之材料為鋼箔、金屬薄膜或合金箔等之任一種， 而該隔離槽縫121之斷路絕緣作用，使得具金屬材質之導熱 層12a、12b不具有傳統導電之效用，純粹作為熱量傳導散 逸之用。 一導電層13(如第4圖、第5圖或第7圖所示），係為 一设置於絕緣基板U下方（即背面）且具特定寬度之金屬 200933658 層^亥特定寬度係由阻抗、決定，t導電層13之厚度為 二定時’寬度的大小決定導電通路之面積，阻抗值之大小與 V電層13之寬度成反比，亦即較寬之導電| 擁有較小之 阻抗值，而較窄之導電層13則擁有較大之阻抗值，阻抗值 大小可由導電層U之寬度加以設計及控制；另，該導電層 13之材料為合金材料。 二端電極14a、14b，係為一包覆於該絕緣基板11及導 ❹，’’、層12a 12b -侧且連接導電層13(如第4圖、第5圖或第 7圖所示）二側之終端金料殼，該端電極具有鍍錫或錄等 之鑛覆層；亦即在結構上，絕緣基板11及導熱層12a、12b 係包覆於端電極14a、Mb之U型槽體之金屬外殼内，而導 電層13之一側則與§亥端電極14a、〗4b之U型槽體之金屬 外/λ作接觸連結，$二端電極14a、14b在電路本質上係作 為該晶片電阻1之二極。 —第4圖係顯示本發明一實施例整體結構背面立體圖， ❹ 而第7圖係顯示本發明—實施例裝置結構背面平面視圖。如 圖所不其中，晶片電阻j之導電層13係為一設置於絕緣 基板11下方且具特定寬度之金屬層，導電層13之二側與該 端電極14a、14b之u型槽體之金屬外殼作接觸連結，在電 性連結上為導通之㈣；*設置於絕緣基板11上方（即正面） 之導熱層12a、12b (如第3圖、第6圖或第7圖所示)，因 蝕刻之隔離槽縫121而產生斷路絕緣作用，在内部多層結構 之分工上，導熱層12a、12b與導電層13分別作為傳熱與導 電之用，另，絕緣基板u則隔離導熱層12a、12b與導電層 200933658 13兩者為獨立之二區域，彼此間為絕緣狀態。 第5圖係顯示本發明一實施例整體結構局部剖視 圖，如圖所示，甘 a曰_ 其中，晶片電阻1之結構層，由上而下依序 =隔離槽縫121之導熱層12a、12b、絕緣基板11及導電 二3_，言亥具隔離槽、縫121之導熱層12及絕緣餘㈣包 於-側iW電極i4a、141)之u型槽體之金屬外殼内，導電 〇200933658 IX. Description of the Invention: [Technical Field] The present invention relates to a wafer resistor having a thermally conductive layer structure, in particular, an insulating substrate and a heat conducting layer and a conductive layer disposed thereon and below, and having two ends The electrode is coated with the chip resistor of the insulating substrate, the heat conducting layer and the conductive layer, and the heat conducting layer made of copper foil, metal film or alloy foil is provided with an etched isolation slot, and the conductive layer is made of alloy. A specific width to match the desired impedance magnitude. ❹ [Prior Art] According to the conventional chip resistor, the design of the conductive layer is used to achieve a single effect of conduction, but its performance in heat dissipation is insufficient, so there is room for innovation and improvement. Fig. 1 is a cross-sectional view showing the overall structure of a conventional wafer resistor, which is disclosed in the case of the Republic of China Announcement No. 200523955 "Method for manufacturing a surface-bonded metal foil chip resistor", which shows that the surface-bonded metal foil In the method of manufacturing a chip resistor, first, an insulating substrate A is provided, and a conductor layer pattern for the terminal electrode C is formed on the insulating substrate A, and then a metal foil having a specific resistivity is attached thereto, and then utilized. The resist is applied to the electronic circuit pattern on the metal foil, and then the electronic circuit is formed by chemical etching, and then the resist is removed, and then the metal foil resistive layer B is cut out of the laser by laser or the like. The line B1 or other means of processing is cut to achieve the previously predetermined resistance value. Then, other subsequent 5 200933658 steps are performed to complete the process of the metal foil chip resistor. Figure 2 is a cross-sectional view showing the overall structure of another conventional chip resistor, which is a technique disclosed in the case of the Republic of China Announcement No. 1220164 "Innovative Current Sensing Element and Method of Manufacturing the Same", which shows a novel sense of current The measuring element and the manufacturing method thereof are mainly made of a film D1 of a low temperature resistivity (TCR) alloy such as a nickel-copper alloy or a manganese-copper alloy or a nickel-chromium alloy, which is used as a surface layer of the substrate D, and is closely adhered thereto by a thermocompression bonding method. a substrate formed of ceramic, alumina, aluminum nitride or beryllium oxide (BeO) thin plate D2 on the upper and lower surfaces; secondly, using a mask etching to form a layout pattern of the current sensor on the surface layer of the substrate; The electrodes E on both sides of the sensor unit are plated to form a flip-chip F on the bottom surface, and the electrode G on the front side is plated thick; then the laser is trimmed to obtain a sensor pattern with precise resistance; The detector pattern is covered with a protective layer Η; and the strip electrode is coated with the end surface electrode E ' G by sputtering; finally, the pelletizing and barrel plating are performed, and the chip type current sensing element is obtained. The disadvantages of the conventional chip resistor are as follows: 1. The internal structure of the resistor is complicated, and the process time and equipment cost are relatively large. 2. Only rely on the conductive layer to dissipate heat, and the heat dissipation effect is unstable with the width change. 3. No heat conduction layer design leads to poor heat dissipation, which easily affects the life and performance of the resistor. In summary, the above-mentioned conventional wafer resistors, although capable of achieving the basic requirements for providing a specific impedance of the circuit, have many disadvantages and disadvantages in terms of simplifying the structure and improving the heat dissipation efficiency. Under, it is impossible to choose more specific industrial applicability. Due to the above-mentioned chip defects, there are some shortcomings and shortcomings. Based on the future trend of 200933658 industry progress, it is necessary to propose specific improvement plans to meet the needs of industrial progress and further provide more technical choices in the industry. . SUMMARY OF THE INVENTION The present invention is directed to solving the shortcomings of the conventional wafer resistor in terms of simplifying the structure and improving the heat dissipation efficiency, and the problem of being limited in practical technology, and the like, on the one hand, in order to achieve a simplified structure and improve heat dissipation efficiency, On the other hand, it divides the conductive and thermal conduction processes to increase the individual performance of the circuit performance and heat dissipation performance, in order to achieve the basic functions that should be possessed, and to make it have practical development and competition requirements for industrial application. In order to achieve the above objects and functions, the specific technical means and solutions adopted include: a chip resistor having a heat conductive layer structure, the chip resistor comprising: an insulating substrate, which is a substrate based on a material having insulating properties. A heat conducting layer is a metal layer disposed above the insulating substrate, and the heat conducting layer is engraved with an isolation slot. A conductive layer is a metal layer having a specific width disposed under the insulating substrate. The two-terminal electrode is a metal-plated outer casing which is coated on both sides of the insulating substrate and the heat-conducting layer and has a u-shaped groove on both sides of the conductive layer. The material of the heat conducting layer is any one of a copper foil, a metal film or an alloy foil. The material of the foregoing conductive layer is an alloy material. 200933658 The specific width of the aforementioned conductive layer is determined by the magnitude of the impedance. A particular advantage of the present invention is that the process of streamlining is simple and less costly. Effectively improve the overall performance of circuit performance. ...曰° again. 'Improve heat dissipation rate and increase resistance performance and life. (1) The present invention (4) The technical means and the structure of the invention are described in detail with reference to the embodiment shown in the figure: G [Embodiment] - Figure 3 shows the invention - The front view of the overall structure of the embodiment, and the sixth figure shows a front plan view of the overall structure of the present invention. As shown in the figure, there is a wafer resistor having a heat conductive layer structure, and the wafer resistor 1 comprises: / an insulating substrate 11, and the material of the material of the edge is a substrate, which is used for internal insulation of the chip resistor 1. Q—the thermal conductive layer 仏, 12b is a surplus layer disposed above the insulating substrate 11 and a thermal insulating layer 12a, 12b, and an isolation slot 121; the material of the thermal conductive layer 12a, 12b is steel foil, metal Any one of a film or an alloy foil, and the breaking insulation of the isolating slot 121 makes the thermally conductive layer 12a, 12b having a metal material have no effect of conventional conduction, and is purely used as heat conduction dissipation. A conductive layer 13 (as shown in FIG. 4, FIG. 5 or FIG. 7) is a metal layer having a specific width disposed under the insulating substrate U (ie, the back surface), and the specific width of the layer is determined by impedance, It is determined that the thickness of the t-conducting layer 13 is two timings. The width of the width determines the area of the conductive path. The magnitude of the impedance is inversely proportional to the width of the V-electrode layer 13, that is, the wider conductive | has a smaller impedance value. The narrower conductive layer 13 has a larger impedance value, and the magnitude of the impedance value can be designed and controlled by the width of the conductive layer U. In addition, the material of the conductive layer 13 is an alloy material. The two end electrodes 14a, 14b are coated on the insulating substrate 11 and the guide, "', the layer 12a 12b - side and connected to the conductive layer 13 (as shown in Fig. 4, Fig. 5 or Fig. 7) The terminal gold shell on the two sides, the terminal electrode has a tin coating or a recorded ore coating; that is, in the structure, the insulating substrate 11 and the heat conducting layers 12a, 12b are coated on the U-shaped grooves of the terminal electrodes 14a and Mb. In the metal casing of the body, one side of the conductive layer 13 is in contact with the metal outer / λ of the U-shaped groove body of the sigma electrode 14a, 4b, and the two terminal electrodes 14a, 14b are essentially used as a circuit. The second pole of the chip resistor 1. - Figure 4 is a rear perspective view showing the entire structure of an embodiment of the present invention, and Figure 7 is a rear plan view showing the structure of the apparatus of the present invention. As shown in the figure, the conductive layer 13 of the chip resistor j is a metal layer having a specific width disposed under the insulating substrate 11, and the metal of the u-shaped groove of the two sides of the conductive layer 13 and the terminal electrodes 14a and 14b. The outer casing is contact-connected and electrically connected to the electrical connection (4); * the heat-conducting layers 12a, 12b disposed above the insulating substrate 11 (ie, the front surface) (as shown in FIG. 3, FIG. 6, or FIG. 7), The isolation slot 121 is etched to generate an open circuit insulation. In the division of the internal multilayer structure, the heat conductive layers 12a, 12b and the conductive layer 13 serve as heat transfer and conduction, respectively, and the insulating substrate u isolates the heat conductive layers 12a, 12b. Both of the conductive layers 200933658 13 are independent regions, and are insulated from each other. Figure 5 is a partial cross-sectional view showing the entire structure of an embodiment of the present invention. As shown in the figure, the structural layer of the chip resistor 1 is sequentially arranged from top to bottom = the thermally conductive layers 12a, 12b of the isolation slot 121. The insulating substrate 11 and the conductive layer 3_, the heat insulating layer 12 of the insulating groove, the slit 121, and the insulating outer layer (4) are wrapped in the metal casing of the u-shaped groove body of the - side iW electrode i4a, 141), and the conductive 〇
本身係與—側之端電極、14b接觸，導電層13亦 可製成包覆於端電極Ma、Hb内。 在整個晶片電阻1之主體結構之製程上，導熱層12a、 ⑽可與導電層13同時形成，再對導熱層12a、12b進行姓 刻以產生-隔離槽縫12卜亦可以採分別形成者。 第8圖係顯示本發明一實施例裝置結構散熱路徑示意 圖士圖所7F，其中，由於晶片電阻J具有電阻發熱之運作 特性’故必須將多餘的熱量予以散逸，以防止過多的熱量蓄 積造成晶片電阻1之工作性能降低，或甚至因高溫而燒毀， 在散熱的機制上採用主動式之散熱設計。 晶電阻1之導電層13在導電的同時由於阻抗作用而 產生熱篁，該熱量有極小比例自導電層13直接散至空氣 中’但因為空氣熱對流效果遠不如固體之高熱料率所具有 ，散熱效果，故熱量會自下方之高溫區（即指導電層13)將熱 夏經由絕緣基板11分兩側傳遞至被隔離槽縫121分為兩區 域之導熱層12a、12b之低溫區，再傳遞至二側端鍍覆金屬 之電極14a、14b最後傳遞至空氣中，或由焊接承座2傳遞 至大面積之印刷電路板3(即PCB) ’有效將熱量散逸排除。 200933658 本發月具有良好導熱效果，及使同尺寸的電阻器能提升使 用功率。 綜合上述，本發明係針對晶片電阻之應用技術，特指 一種藉由絕緣基板及其上、下方設置之導熱層、導電層，且 由二端電極包覆連接該絕緣基板、導熱層及導電層之晶片電 阻，該以mi、金屬薄膜或合金箱為材料之導熱層設有一姓 刻之隔離槽縫，另，該以合金為材料之導電層具特定寬度以 〇 符合所f之阻抗大小值，作-最佳之改良與設計，為本發明 對於晶片電阻所作最具體之改良。 本發明在晶片電阻的應用技術上，確實有且 性之精進，纽法提出發明專利之中請；惟上述發明說明之 所有内容，僅止涵蓋本發明之較佳實施例，舉凡依本發明之 技術手段及設計概念或方案等所延伸之任化 本發明之專利範目，特在此註明。 心 ❹ 【圖式簡單說明】 第1圓係顯示一習用晶片電阻整體結構剖視圖； ^ 2圖係顯示另—習用晶片t阻整體結構剖視圖。 第3圖係顯示本發明一實施例整體結構正面立體圖； $ 4圖係顯示本發明一實施例整體結構背面立體圖； 圖係顯示本發明—實施㈣體結構局部剖視立體圖； 6圖係顯示本發明—實施例整體結構正面平面視圖； 第7圖係顯示本發明—實施例裳置結構背面平面視圖； 第8圖係顯示本發明一實施例結構散熱路徑示意圖。 11 200933658 ❹ ❹ 主要元件符號說明】 1 晶片電阻 11 絕緣基板 12a 導熱層 12b 導熱層 121 隔離槽縫 13 導電層 14a 端電極 14b 端電極 2 焊接承座 3 印刷電路板 4 散熱方向 A 絕緣基板 B 金屬箔電阻層 B1 鐳射切割線 C 端電極 D 基板 D1 薄膜 D2 薄板 E 兩側電極 F 覆晶 G 電極 H 保護層 12The self-contact layer is in contact with the terminal electrode 14b, and the conductive layer 13 can also be formed in the terminal electrodes Ma, Hb. The thermal conductive layers 12a, (10) may be formed simultaneously with the conductive layer 13 over the entire structure of the main structure of the wafer resistor 1, and the thermal conductive layers 12a, 12b may be surnamed to produce - isolated slits 12, which may also be formed separately. Fig. 8 is a view showing a heat dissipation path of the device structure according to an embodiment of the present invention, wherein the wafer resistor J has an operational characteristic of resistance heat generation, so excess heat must be dissipated to prevent excessive heat accumulation. The performance of the resistor 1 is reduced, or even burned due to high temperatures, and an active heat dissipation design is employed in the heat dissipation mechanism. The conductive layer 13 of the crystal resistor 1 generates heat due to the impedance while being electrically conductive, and the heat is directly dispersed into the air from the conductive layer 13 by a small proportion. However, since the heat convection effect of the air is far less than the high hot material rate of the solid, the heat dissipation is performed. The effect is that the heat is transferred from the lower temperature zone (ie, the guiding electrical layer 13) to the low temperature zone of the heat conducting layers 12a, 12b separated into two regions by the insulating slot 11 via the insulating substrate 11 and then transferred. The metal-plated electrodes 14a, 14b to the two side ends are finally transferred to the air or transferred by the solder socket 2 to the large-area printed circuit board 3 (ie, PCB) 'effectively dissipating heat dissipation. 200933658 This month has a good thermal conductivity and enables the same size resistor to boost the power. In summary, the present invention is directed to the application technology of the chip resistor, and specifically refers to an insulating substrate, a heat conducting layer and a conductive layer disposed above and below, and the insulating substrate, the heat conducting layer and the conductive layer are covered by the two end electrodes. The chip resistance, the heat conducting layer made of mi, the metal film or the alloy box is provided with a surnamed slot, and the conductive layer of the alloy material has a specific width to meet the impedance value of the f. The best improvement and design is the most specific improvement of the wafer resistance of the present invention. The invention has the advantages and advantages of the application technology of the chip resistor, and the invention claims the invention patent; however, all the contents of the above invention description only cover the preferred embodiment of the invention, and the invention is The technical examples and design concepts or schemes are extended to the patent specifications of the present invention, which are hereby noted. Heart ❹ [Simple diagram of the drawing] The first circle shows a cross-sectional view of the overall structure of a conventional wafer resistor; ^ 2 shows a cross-sectional view of the overall structure of the conventional wafer t-resistance. 3 is a front perspective view showing the entire structure of an embodiment of the present invention; FIG. 4 is a perspective view showing the entire structure of an embodiment of the present invention; FIG. 4 is a perspective view showing a partial cross-sectional view of the body structure of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 7 is a plan view showing the rear side of the present invention as an embodiment of the present invention; and FIG. 8 is a schematic view showing a heat dissipation path of an embodiment of the present invention. 11 200933658 ❹ ❹ Explanation of main component symbols】 1 Chip resistor 11 Insulating substrate 12a Thermally conductive layer 12b Thermally conductive layer 121 Isolation slot 13 Conductive layer 14a Terminal electrode 14b Terminal electrode 2 Soldering socket 3 Printed circuit board 4 Heat dissipation direction A Insulating substrate B Metal Foil resistor layer B1 laser cutting line C terminal electrode D substrate D1 film D2 thin plate E side electrode F flip chip G electrode H protective layer 12