JP2014158157A - Piezoelectric device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a piezoelectric device having less influence from parasitic impedance and having stable frequency.SOLUTION: A piezoelectric device comprises: a piezoelectric vibration piece 1 having one end portion 1a cantilevered with a predetermined space with respect to a substrate 50; a circuit section 51 formed in an inner surface of the substrate 50 and continually vibrating the piezoelectric vibration piece 1 by a specific frequency; a ground pad 85 provided on the substrate 50 and electrically connected to a ground GND of the circuit section 51; a lid 20 attached to the substrate 50 and having conductivity; a frame-shaped wiring pattern 80 provided along the junction surface of the substrate 50 and the lid 20; and a conductive bonding member 3b bonding the lid 20 and the frame-shaped wiring pattern 80. The ground pad 85 and the frame-shaped wiring pattern 80 are electrically connected by a linear and short-distance wiring pattern.

Description

  The present invention relates to a piezoelectric device such as a crystal oscillator, and more particularly to a piezoelectric device formed on a silicon wafer and covered with a silicon or glass lid.

  In recent years, with the reduction in size and weight of semiconductors, a technique capable of processing a substrate to be mounted with high accuracy is required. Also, “W-CSP (Wafer Level Chip Size Package) technology” is known as a manufacturing technology for the purpose of reducing the size and weight in the manufacturing process of a semiconductor package. This W-CSP technology is a processing technology for performing rewiring on a semiconductor wafer. After forming circuits on a large number of chips on a silicon wafer, electrode formation, rewiring, and resin sealing are performed on the wafer. Finally, it is a technology that separates each chip. The feature of this W-CSP technology is that the size of the cut semiconductor chip itself becomes the size of the package, so that it can be reduced in size and weight, and the manufacturing cost can be reduced by performing all the manufacturing processes in units of wafers. It is in.

  Conventionally, a method using sputtering, which is a dry film forming method, has been mainly used in the electrode formation / rewiring process of the W-CSP technology. On the other hand, a plating method which is a wet film forming method suitable for mass processing is also known. Further, for example, the device described in Patent Document 1 relates to a piezoelectric device in which a substantial mounting area is reduced in terms of reducing the size and weight of a semiconductor. In this piezoelectric device, a piezoelectric vibrating piece is accommodated in a package. This piezoelectric vibrating piece has a pair of connection electrodes connected to excitation electrodes. Each connection electrode is joined to a mount electrode formed on the package. This piezoelectric device also includes four external electrodes on the outer surface of the bottom of the package. Of the four, the external electrode provided along the short side of the package in the longitudinal direction is configured to be electrically connected to the mount electrode to which each connection electrode of the piezoelectric vibrating piece is connected.

  Further, for example, the one described in Patent Document 2 is a piezoelectric material that is bonded to a ceramic package using a face-down bonding technique, stabilizes characteristics so as to suppress frequency fluctuations, and suppresses current consumption. It is about the device. The face-down bonding is a method of attaching a component or a chip to a substrate, and is a method in which the chip is turned over and the chip contact is bonded to a contact on a substrate on which a mirror image is arranged. The piezoelectric oscillator includes a ceramic package which is a package for electronic components, an integrated circuit element and a crystal diaphragm housed in the ceramic package, and a lid for hermetically sealing the ceramic package.

  Further, for example, the device described in Patent Document 3 relates to a piezoelectric device in which a lid is electrically connected to a ground electrode and radiation of electromagnetic waves can be significantly suppressed. In this piezoelectric device, a crystal resonator is mounted on the upper surface of a substantially rectangular substrate, and a metal lid is attached to the upper surface side of the substrate so as to hermetically seal the crystal resonator. In a high-frequency oscillator including an input electrode and an output electrode that are electrically connected to a crystal resonator and a ground electrode that is connected to a ground potential, a lid is electrically connected to the ground electrode. Further, a ground wiring layer electrically connected to the ground electrode is deposited on the side surface of the substrate, and the area of the ground wiring layer applied to the substrate side surface is 30% or more of the total area of the substrate side surface. .

JP 2005-198227 A JP 2005-295249 A JP 2006-295985 A

  The piezoelectric device described in Patent Document 1 is a piezoelectric device having a substantial mounting area reduced in order to reduce the size and weight. However, the defect that the oscillation frequency may deviate from the expected value depending on the external mounting state, that is, the relationship with the mounting substrate on which the piezoelectric device is mounted, has not necessarily been eradicated. And there is room to improve the oscillation characteristics by minimizing the influence of the parasitic impedance due to the external mounting state and making it possible to accurately measure the temperature of the piezoelectric vibrating piece with a temperature sensor arranged in the immediate vicinity. Was left.

  In addition, the piezoelectric device described in Patent Document 2 is bonded to a ceramic package using a face-down bonding technique, stabilizes characteristics so as to suppress frequency fluctuations, and suppresses current consumption. It is. However, there is room to improve the oscillation characteristics by minimizing the influence of the parasitic impedance due to the external mounting state and allowing the temperature of the piezoelectric vibrating piece to be accurately measured by the temperature sensor disposed in the immediate vicinity. Was left.

In addition, the piezoelectric device described in Patent Document 3 is a piezoelectric device in which a lid is electrically connected to a ground electrode and radiation of electromagnetic waves can be significantly suppressed. However, there is no description regarding the connection between the lid and the ground electrode of the IC (semiconductor chip), and due to the influence of the parasitic impedance generated between the lid and the ground electrode of the IC (semiconductor chip), there is no gap between the IC ground and the lid. There is a problem that a large potential difference occurs. If a large potential difference occurs between the ground of the IC and the lid, it becomes difficult to realize a stable frequency no matter how stable the lid potential is.
The present invention has been made in view of such a problem, and an object of the present invention is to provide a piezoelectric device having a stable frequency with little influence of parasitic impedance.

  The present invention was made in order to achieve such an object, and the invention according to claim 1 is a piezoelectric vibrating piece in which one end is cantilevered while maintaining a predetermined gap with respect to the substrate, A circuit unit that is formed on the inner surface of the substrate and continuously vibrates the piezoelectric vibrating piece at a specific frequency; a ground pad that is provided on the substrate and is electrically connected to a ground of the circuit unit; A conductive lid attached to the frame, a frame-shaped wiring pattern provided along a bonding surface between the substrate and the lid, and a conductive bonding member for bonding the lid and the frame-shaped wiring pattern The ground pad and the frame-like wiring pattern are electrically connected by a wiring pattern.

The invention according to claim 2 is characterized in that, in the invention according to claim 1, the ground pad and the frame-like wiring pattern are electrically connected by a linear wiring pattern.
According to a third aspect of the present invention, in the first or second aspect of the present invention, the ground pad and the frame-shaped wiring pattern are electrically connected by a wiring pattern having the shortest distance.

  According to the present invention, it is possible to provide a piezoelectric device having a stable frequency with little influence of parasitic impedance.

1 is a schematic plan view of a state in which a lid is removed to describe an embodiment of a piezoelectric device according to the present invention. It is the sectional view on the AA line of the piezoelectric device of FIG.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a schematic plan view of a state in which a lid is removed to describe an embodiment of a piezoelectric device according to the present invention. In the piezoelectric device 100 of the present invention, in the state where the flaky piezoelectric vibrating reed 1 faces the insulating film 7 on the surface layer of the IC substrate 50, one end 1a in the long side direction is maintained while maintaining a predetermined gap d. Cantilevered. Excitation electrodes 2a and 2b by gold plating are formed on both surfaces of the piezoelectric vibrating reed 1 over more than half from one end 1a to the other end 1b. The excitation electrodes 2a and 2b are electrically connected to the circuit portion 51 via a bump 4 and an electrode 6a arranged on the surface layer of the IC substrate 50 by a conductive adhesive (hereinafter referred to as silver paste) 3a. . As described above, the piezoelectric device 100 is cantilevered between the excitation electrode 2 a of the piezoelectric vibrating piece 1 and the insulating film 7 on the surface layer of the IC substrate 50 with a generally defined gap d.

  The piezoelectric vibrating reed 1 in the completed piezoelectric device 100 can continuously vibrate at a specific frequency by applying an appropriate electrical signal from the circuit unit 51 to the excitation electrodes 2a and 2b. As the piezoelectric vibrating piece 1, a flaky crystal vibrating element is used. The circuit unit 51 of the IC substrate 50 constituting the piezoelectric device 100 includes an oscillation circuit, a temperature compensation circuit, a temperature sensor, and other circuit elements, and as a whole, a TCXO (temperature-compensated crystal oscillator: temperature compensation). Type crystal oscillator). A thermistor or the like is used for the temperature sensor.

  FIG. 2 is a cross-sectional view of the piezoelectric device of FIG. The AA line is bent in an unequal side trapezoidal shape. The piezoelectric vibrating reed 1 is disposed substantially at the center of the piezoelectric device 100 in plan view. As described in detail with reference to FIG. 1, in this piezoelectric vibrating piece 1, one end portion 1a in the long side direction including the excitation electrodes 2a and 2b is disposed on the surface layer of the IC substrate 50 by the silver paste 3a. It is electrically connected to the circuit unit 51 via the bump 4 and the electrode 6a. On the other hand, the electrode 6b located on the opposite side to the electrode 6a on the long side of the IC substrate 50 is not directly connected to the excitation electrodes 2a and 2b, but is electrically connected to the oscillation circuit or the like of the circuit unit 51. In addition, it is connected to the ground pattern 31 of the wiring board 30 with low impedance.

The electrodes 6 a and 6 b are penetrated from the front surface to the back surface of the IC substrate 50 by a through-silicon via (hereinafter referred to as TSV) and wired to a circuit unit 51 provided on another wiring substrate 30. . TSV is an electrode that vertically penetrates the inside of a silicon semiconductor chip.
The upper layer of the circuit unit 51 is covered with an insulating film (Passivation film) 7. Over the insulating film 7, electrodes 6a and 6b are formed by rewiring. Of these electrodes 6a and 6b, the electrode 6a has a reduced parasitic impedance by connecting the piezoelectric vibrating reed 1 and the pads 82 and 83 at the shortest distance, as shown by the ellipse J in FIG. 1 and the corresponding portion in FIG. . If the parasitic impedance is reduced, the factor that makes the oscillation frequency of the piezoelectric device 100 unstable is reduced, so that the oscillation characteristics can be improved.

On the surface of the IC substrate 50, a frame-like wiring pattern 80 (hereinafter also referred to as a lid bonding pattern 80) is provided along the bonding surface between the lid 20 and the IC substrate 50. In the present embodiment, the lid bonding pattern 80 is provided as a frame-like wiring pattern between the edge portion 21 of the lid 20 and the edge portion 52 of the IC substrate 50.
A ground pad 85 that is electrically connected to a reference potential (hereinafter also referred to as a substrate potential) of the IC substrate 50 is provided on the surface of the IC substrate 50.

  As shown by the ellipse K in FIG. 1 and the corresponding portion in FIG. 2, the ground pad 85 is electrically connected to the lid bonding pattern 80 by the shortest distance by a linear wiring pattern 81. Therefore, the lid bonding pattern 80 which is a frame-like wiring pattern forms a reference potential of the IC substrate 50. Here, the wiring pattern 81 is formed by rewiring on the surface of the IC substrate 50, but may be formed by a semiconductor process in the IC substrate 50.

  And the conductive junction part 3b is formed in the upper layer of the lid | cover joint pattern 80, and the edge part 21 of the lid | cover 20 is joined via this junction part 3b. The lid 20 and its edge 21 are made of semiconductor silicon and have conductivity. Therefore, the lid 20, the wiring pattern 81 of the IC substrate 50, the lid bonding pattern 80, the ground pad 85, the electrode 6 d (TSV), and the ground pattern 31 of the wiring substrate 30 have a one-point radial shape centered on the ground pad 85. A ground GND is formed.

  Since the lid bonding pattern 80 is a frame-like wiring pattern, the lid bonding pattern 80 and the ground pad 85 can be electrically connected at the shortest distance regardless of the position of the ground pad 85. It becomes possible. That is, it is possible to electrically connect the wiring pattern 81 of the IC substrate 50, the lid bonding pattern 80, the ground pattern 31 of the wiring substrate 30, and the lid 20 from the same ground pad 85 with a low impedance in one point. It becomes possible. Therefore, the potential difference generated between the lid potential and the substrate potential becomes small, the shielding effect becomes very high, and the frequency of the piezoelectric vibrating piece 1 is stabilized. The resistivity of the lid 20 is preferably 0.02 Ωcm or more and 0.2 Ωcm or less. Moreover, it is preferable that all the wiring patterns used in this embodiment are made of metal.

Hereinafter, the manufacturing process of the piezoelectric device 100 will be briefly described.
First, the IC substrate 50 is created. Next, the electrodes 6a and 6b and the lid bonding pattern 80 are formed on the surface of the insulating film 7 on the surface of the IC substrate 50 by rewiring. Next, bumps 4 for height adjustment are formed on the electrodes 6a and 6b. Next, a silver paste 3 a is applied on the bumps 4. Next, the piezoelectric vibrating piece 1 is mounted. Next, the probe of the IC tester is brought into contact with the electrodes 6a and 6b, and the actual oscillation frequency is measured. Incidentally, the frequency can be increased as the piezoelectric vibrating reed 1 is sharpened. For example, when the measured value deviates from the set frequency to the lower side, the surface of the piezoelectric vibrating piece 1 is shaved by argon ion etching that irradiates the piezoelectric vibrating piece 1 with argon ions, and the frequency is adjusted to the higher side. Since the piezoelectric device 100 of the present invention is configured to reduce the parasitic impedance, the deviation from the set frequency is small, and the burden of frequency adjustment can be reduced.

  After the frequency adjustment is completed, the lid 20 is put on the IC substrate 50 and joined so that the edge 21 of the lid 20 on which the joint 3b is formed coincides with the lid joining pattern 80. The lid 20 maintains a non-contact state with respect to the piezoelectric vibrating piece 1. Next, the IC substrate 50 (wafer) is thinned by adjusting grinding. Next, through silicon vias (TSV) 6c and 6d are formed. When a plurality of chips and the like are housed in one package, the TSVs 6c and 6d are used for wiring connection between different chips separated by a hierarchy. Electrodes 6c and 6d are formed on the back side of the IC substrate 50 by rewiring so as to be connected to the TSV formed in this way.

  Then, the lid (also referred to as a cap) 20 is polished to reduce the cap thickness. Next, solder balls (not shown) are attached to the electrodes 6c and 6d formed by rewiring on the back side of the IC substrate 50 so as to be electrically connected to each other. Next, a probe inspection is performed on the semi-finished piezoelectric device 100. Next, a large number of piezoelectric devices 100 that are mass-produced in a connected state on the wafer are individually separated and completed. The completed piezoelectric device 100 is assembled so that the back surface of the IC substrate 50 is aligned with the surface of another wiring substrate 30 as shown in FIG.

In the piezoelectric device 100 manufactured by the above-described procedure, the ground patterns 81 and 80 of the IC substrate 50, the ground pattern 31 of the wiring substrate 30, and the lid 20 have a one-point radial ground centered on the same ground pad 85. A GND is formed. Since the ground GND is connected in a one-point radial pattern with low impedance, a potential difference is unlikely to occur between the lid potential with respect to the ground GND and the substrate potential. As a result, the piezoelectric device 100 has a very high shielding effect on the inside and outside surrounded by the lid 20 and the IC substrate 50.
As described above, according to the present invention, since the potential difference between the lid potential and the substrate potential can be minimized, it is possible to provide a piezoelectric device having a very high shielding effect and a stable frequency. It becomes.

DESCRIPTION OF SYMBOLS 1 Piezoelectric vibration piece 1a One edge part 1b The other edge part 2a, 2b Excitation electrode 3a Conductive adhesive material (silver paste)
3b Conductive bonding portion 4 Bumps 6a, 6b, 6c, 6d Electrode 7 Insulating film 8 Pad 20 Lid 30 Wiring substrate 31 Wiring substrate ground pattern 50 IC substrate 51 Circuit portion 80, Wiring pattern (lid bonding pattern)
81, wiring patterns 82, 83, 84, pad 85, ground pad

Claims (3)

A piezoelectric vibrating piece in which one end is cantilevered while maintaining a predetermined gap with respect to the substrate;
A circuit part formed on the inner surface of the substrate to continuously vibrate the piezoelectric vibrating piece at a specific frequency;
A ground pad provided on the substrate and electrically connected to the ground of the circuit unit;
A lid attached to the substrate and having conductivity;
A frame-like wiring pattern provided along the joint surface between the substrate and the lid;
A conductive bonding member for bonding the lid and the frame-shaped wiring pattern;
With
The piezoelectric device, wherein the ground pad and the frame-like wiring pattern are electrically connected by a wiring pattern.   The piezoelectric device according to claim 1, wherein the ground pad and the frame-like wiring pattern are electrically connected by a linear wiring pattern.   3. The piezoelectric device according to claim 1, wherein the ground pad and the frame-like wiring pattern are electrically connected by a wiring pattern having a shortest distance.

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