JP5643040B2 - Piezoelectric oscillator - Google Patents

Piezoelectric oscillator Download PDF

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JP5643040B2
JP5643040B2 JP2010215996A JP2010215996A JP5643040B2 JP 5643040 B2 JP5643040 B2 JP 5643040B2 JP 2010215996 A JP2010215996 A JP 2010215996A JP 2010215996 A JP2010215996 A JP 2010215996A JP 5643040 B2 JP5643040 B2 JP 5643040B2
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integrated circuit
circuit element
element mounting
main surface
wiring pattern
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JP2012074774A (en
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友治 恩田
友治 恩田
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Kyocera Crystal Device Corp
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本発明は、電子機器等に用いられる圧電発振器に関する。  The present invention relates to a piezoelectric oscillator used in an electronic device or the like.

従来より、携帯用の電子機器には、各種圧電発振器が用いられている。
図６及び図７に示すように、従来の圧電発振器２００は、素子搭載部材２１０、圧電振動素子２２０、集積回路素子２３０、蓋部材２５０から主に構成されている。素子搭載部材２１０は、基板部２１１と、第一の枠部２１２と、第二の枠部２１３で構成される。素子搭載部材２１０を構成する基板部２１１と第一の枠部２１２と第二の枠部２１３は、例えば、ガラス−セラミックス、アルミナセラミックス等のセラミック材料からなる。
また、基板部２１１は、一方の主面に圧電振動素子２２０を搭載するための圧電振動素子搭載パッド２１７が配置され、他方の主面に集積回路素子２３０を搭載するための集積回路素子搭載パッド２１８と集積回路素子搭載パッド２１８に接続される配線パターン２１４が配置されている。また、基板部２１１の内部には、内層配線（図示せず）が設けられ、圧電振動素子搭載パッド２１７と集積回路素子搭載パッド２１８とが内層配線（図示せず）を介して接続されている。 Conventionally, various piezoelectric oscillators have been used in portable electronic devices.
As shown in FIGS. 6 and 7, the conventional piezoelectric oscillator 200 is mainly composed of an element mounting member 210, a piezoelectric vibration element 220, an integrated circuit element 230, and a lid member 250. The element mounting member 210 includes a substrate part 211, a first frame part 212, and a second frame part 213. The substrate part 211, the first frame part 212, and the second frame part 213 constituting the element mounting member 210 are made of a ceramic material such as glass-ceramics or alumina ceramics, for example.
Also, the substrate section 211 has a piezoelectric vibration element mounting pad 217 for mounting the piezoelectric vibration element 220 on one main surface, and an integrated circuit element mounting pad for mounting the integrated circuit element 230 on the other main surface. A wiring pattern 214 connected to 218 and the integrated circuit element mounting pad 218 is disposed. Further, an inner layer wiring (not shown) is provided inside the substrate portion 211, and the piezoelectric vibration element mounting pad 217 and the integrated circuit element mounting pad 218 are connected via an inner layer wiring (not shown). .

また、基板部２１１の一方の主面には、第一の枠部２１２が形成され、基板部２１１と第一の枠部２１２とで第一の凹部Ｋ１が形成される。また、第一の凹部Ｋ１には、圧電振動素子２２０が収容される。圧電振動素子２２０が収容される第一の凹部Ｋ１は、第一の枠部２１２と蓋部材２５０とで気密封止されている。
また、基板部２１１の他方の主面には、第二の枠部２１３が形成され、基板部２１１と第二の枠部２１３とで第二の凹部Ｋ２が形成される。また、第二の凹部Ｋ２には、集積回路素子２３０が収容される。また、第二の枠部２１３の四隅は、外部接続用電極端子２１６を備える構成となっている。外部接続用電極端子２１６は、第二の枠部２１３の内部に設けられたビアホール導体２１９と配線パターン２１４を介して集積回路素子搭載パッド２１８と接続されている。 The first frame portion 212 is formed on one main surface of the substrate portion 211, and the first recess K <b> 1 is formed by the substrate portion 211 and the first frame portion 212. In addition, the piezoelectric vibration element 220 is accommodated in the first recess K1. The first recess K1 in which the piezoelectric vibration element 220 is accommodated is hermetically sealed with the first frame portion 212 and the lid member 250.
Further, a second frame portion 213 is formed on the other main surface of the substrate portion 211, and a second recess K <b> 2 is formed by the substrate portion 211 and the second frame portion 213. Further, the integrated circuit element 230 is accommodated in the second recess K2. In addition, the four corners of the second frame portion 213 are configured to include external connection electrode terminals 216. The external connection electrode terminal 216 is connected to the integrated circuit element mounting pad 218 via a via hole conductor 219 and a wiring pattern 214 provided inside the second frame portion 213.

蓋部材２５０は、基板部２１１と第一の枠部２１２で形成された第一の凹部Ｋ１を気密封止している。また、蓋部材２５０の材質は、４２アロイやコバール、リン青銅等からなる。
圧電振動素子２２０は、圧電素板の両主面に励振用電極（図示せず）と接続用電極（図示せず）を備える構造となっている。また、圧電振動素子２２０の接続用電極（図示せず）は、導電性接着剤２２１を介して素子搭載部材２１０に配置された圧電振動素子搭載パッド２１７に接続されている。
集積回路素子２３０は、回路が形成された面に電極パッド２３４が形成されている。また、図６に示すように、集積回路素子２３０の電極パッド２３４は、金バンプ２３１と半田２３２が固着されている。集積回路素子２３０の電極パッド２３４に固着された金バンプ２３１と半田２３２は、加熱工程で溶融し、冷却固化することで、素子搭載部材２１０に配置された集積回路素子搭載パッド２１８と接合される。
また、集積回路素子２３０の電極パッド２３４と、素子搭載部材２１０に配置された集積回路素子搭載パッド２１８との間には、集積回路素子２３０の回路形成面を保護するための樹脂２４０が充填されている（例えば、特許文献１参照）。 The lid member 250 hermetically seals the first recess K <b> 1 formed by the substrate portion 211 and the first frame portion 212. The material of the lid member 250 is 42 alloy, Kovar, phosphor bronze, or the like.
The piezoelectric vibration element 220 has a structure including excitation electrodes (not shown) and connection electrodes (not shown) on both main surfaces of the piezoelectric element plate. In addition, a connection electrode (not shown) of the piezoelectric vibration element 220 is connected to a piezoelectric vibration element mounting pad 217 disposed on the element mounting member 210 via a conductive adhesive 221.
In the integrated circuit element 230, an electrode pad 234 is formed on a surface on which a circuit is formed. Further, as shown in FIG. 6, the gold bump 231 and the solder 232 are fixed to the electrode pad 234 of the integrated circuit element 230. The gold bumps 231 and the solder 232 fixed to the electrode pads 234 of the integrated circuit element 230 are melted in the heating process and solidified by cooling, so that they are joined to the integrated circuit element mounting pads 218 disposed on the element mounting member 210. .
A resin 240 for protecting the circuit formation surface of the integrated circuit element 230 is filled between the electrode pad 234 of the integrated circuit element 230 and the integrated circuit element mounting pad 218 disposed on the element mounting member 210. (For example, refer to Patent Document 1).

特許第３４０６８４５号公報Japanese Patent No. 3406845

しかしながら、従来の圧電発振器２００は、外部の実装基板からの発熱が外部接続用電極端子２１６から素子搭載部材２１０の内部に熱伝導される。このとき、素子搭載部材２１０に設けられる外部接続用電極端子２１６から圧電振動素子２２０が接続される圧電振動素子搭載パッド２１７までの距離と、外部接続用電極端子２１６から集積回路素子２３０が接続される集積回路素子搭載パッド２１８までの距離とでは、集積回路素子搭載パッド２１８までの距離が長く形成される。そのため、外部接続用電極端子２１６からの熱到達時間は、圧電振動素子２２０に比べ、集積回路素子２３０への熱到達時間が遅くなる。その結果、集積回路素子２３０に熱が到達するまでの間は、圧電振動素子２２０の感知する温度が高く集積回路素子２３０の感知する温度が低くなるために、圧電振動素子２２０の温度特性の温度補償を集積回路素子２３０で正確に行えない場合があった。   However, in the conventional piezoelectric oscillator 200, heat generated from the external mounting substrate is thermally conducted from the external connection electrode terminal 216 to the inside of the element mounting member 210. At this time, the distance from the external connection electrode terminal 216 provided on the element mounting member 210 to the piezoelectric vibration element mounting pad 217 to which the piezoelectric vibration element 220 is connected, and the integrated circuit element 230 are connected from the external connection electrode terminal 216. The distance to the integrated circuit element mounting pad 218 is formed so that the distance to the integrated circuit element mounting pad 218 is long. Therefore, the heat arrival time from the external connection electrode terminal 216 is slower than the piezoelectric vibration element 220 in terms of heat arrival time to the integrated circuit element 230. As a result, until the heat reaches the integrated circuit element 230, the temperature sensed by the piezoelectric vibration element 220 is high and the temperature sensed by the integrated circuit element 230 is low. In some cases, compensation could not be performed accurately by the integrated circuit element 230.

そこで、本発明は、上述の問題に鑑みてなされたものであり、外部の実装基板の発熱による外部接続用電極端子から圧電振動素子と集積回路素子への熱到達時間の差を小さくし、圧電振動素子の温度特性の温度補償を集積回路素子で正確に行うことができる圧電発振器を提供することを課題とする。   Therefore, the present invention has been made in view of the above-described problems, and reduces the difference in heat arrival time from the external connection electrode terminal to the piezoelectric vibration element and the integrated circuit element due to heat generated by the external mounting substrate. It is an object of the present invention to provide a piezoelectric oscillator that can accurately perform temperature compensation of temperature characteristics of a vibration element with an integrated circuit element.

本発明の圧電発振器は、基板部と第一の枠部によって基板部の一方の主面に形成された第１の凹部と、前記基板部と第二の枠部によって前記基板部の他方の主面に形成された第２の凹部が設けられた素子搭載部材と、前記第１の凹部内に露出した基板部の一方の主面に設けられた２個一対の圧電振動素子搭載パッドに搭載されている圧電振動素子と、前記第２の凹部内に露出した基板部の他方の主面に設けられた集積回路素子搭載パッドに搭載されている集積回路素子と、前記集積回路素子搭載パッドに接続されている前記基板部の他方の主面に設けられた配線パターンと、前記配線パターンの一部の配線パターンと接続されている前記第二の枠部の内部に設けられたビアホール導体と、前記ビアホール導体と接続されている前記第二の枠部の四隅に形成された外部接続用電極端子と、前記第１の凹部を気密封止する蓋体とを備え、前記集積回路素子搭載パッドに接続されている配線パターンのうち、前記ビアホール導体を介して前記外部接続用電極端子と接続されているすべての配線パターンの幅が、他の配線パターンの幅に比べて大きくなるように形成されていることを特徴とするものである。 The piezoelectric oscillator of the present invention includes a first concave portion formed on one main surface of the substrate portion by the substrate portion and the first frame portion, and the other main portion of the substrate portion by the substrate portion and the second frame portion. Mounted on a pair of piezoelectric vibration element mounting pads provided on one main surface of the substrate portion exposed in the first recess, and an element mounting member provided with a second recess formed on the surface. A piezoelectric vibration element, an integrated circuit element mounted on an integrated circuit element mounting pad provided on the other main surface of the substrate portion exposed in the second recess, and connected to the integrated circuit element mounting pad A wiring pattern provided on the other main surface of the substrate part, a via hole conductor provided in the second frame part connected to a part of the wiring pattern, The second frame portion connected to the via-hole conductor Out of the wiring patterns connected to the integrated circuit element mounting pads, the external connection electrode terminals formed at the four corners and the lid for hermetically sealing the first recess are provided via the via hole conductors. The width of all the wiring patterns connected to the external connection electrode terminal is formed to be larger than the widths of the other wiring patterns.

本発明の圧電発振器は、基板部の他方の主面に設けられた集積回路素子搭載パッドに接続されている配線パターンのうち、ビアホール導体を介して外部接続用電極端子と接続されているすべての配線パターンの幅を、他の配線パターンの幅に比べて大きくなるように形成したことで、熱の伝わる時間を従来よりも短くすることができる。これにより、本発明の圧電発振器は、外部接続用電極端子から基板部の一方の主面に設けられた２個一対の圧電振動素子搭載パッドへの熱到達時間と、外部接続用電極端子から基板部の他方の主面に設けられた集積回路素子搭載パッドへの熱到達時間の差が小さくなり、圧電振動素子と集積回路素子の感知する温度差が小さくなるために集積回路素子で圧電振動素子の正確な温度補償を行うことができる。 The piezoelectric oscillator according to the present invention includes all the wiring patterns connected to the external connection electrode terminals through the via-hole conductors among the wiring patterns connected to the integrated circuit element mounting pads provided on the other main surface of the substrate portion . By forming the width of the wiring pattern so as to be larger than the width of the other wiring patterns, the time during which heat is transmitted can be made shorter than before. As a result, the piezoelectric oscillator of the present invention has the heat arrival time from the external connection electrode terminal to the two piezoelectric vibration element mounting pads provided on one main surface of the substrate portion, and the external connection electrode terminal to the substrate. The difference in heat arrival time to the integrated circuit element mounting pad provided on the other main surface of the portion is reduced, and the temperature difference sensed by the piezoelectric vibration element and the integrated circuit element is reduced, so that the piezoelectric vibration element is used in the integrated circuit element. Accurate temperature compensation can be performed.

本発明の実施形態に係る圧電発振器の一例を示した断面図である。It is sectional drawing which showed an example of the piezoelectric oscillator which concerns on embodiment of this invention. 本発明の圧電発振器の基板部の他方の主面を示した平面図である。It is the top view which showed the other main surface of the board | substrate part of the piezoelectric oscillator of this invention. 本発明の圧電発振器の第１の変形例を示す基板部の他方の主面を示した平面図である。It is the top view which showed the other main surface of the board | substrate part which shows the 1st modification of the piezoelectric oscillator of this invention. 本発明の圧電発振器の第２の変形例を示す基板部の他方の主面を示した平面図である。It is the top view which showed the other main surface of the board | substrate part which shows the 2nd modification of the piezoelectric oscillator of this invention. 本発明の圧電発振器の第３の変形例を示す基板部の他方の主面を示した平面図である。It is the top view which showed the other main surface of the board | substrate part which shows the 3rd modification of the piezoelectric oscillator of this invention. 従来の圧電発振器を示した断面図である。It is sectional drawing which showed the conventional piezoelectric oscillator. 従来の圧電発振器の基板部の他方の主面を示した平面図である。It is the top view which showed the other main surface of the board | substrate part of the conventional piezoelectric oscillator.

以下、本発明の圧電発振器を、添付図面に基づいて詳細に説明する。図１は、本発明の実施形態に係る圧電発振器１００の一例を示した断面図である。図１に示すように、圧電発振器１００は、素子搭載部材１１０、圧電振動素子１２０、集積回路素子１３０、蓋部材１５０とで主に構成されている。   Hereinafter, a piezoelectric oscillator of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an example of a piezoelectric oscillator 100 according to an embodiment of the present invention. As shown in FIG. 1, the piezoelectric oscillator 100 mainly includes an element mounting member 110, a piezoelectric vibration element 120, an integrated circuit element 130, and a lid member 150.

素子搭載部材１１０は、基板部１１１、第一の枠部１１２、第二の枠部１１３とから主に構成される。
素子搭載部材１１０を構成する基板部１１１と、第一の枠部１１２と、第二の枠部１１３は、例えば、ガラス−セラミックス、アルミナセラミックス等のセラミック材料からなる。 The element mounting member 110 is mainly composed of a substrate part 111, a first frame part 112, and a second frame part 113.
The substrate part 111, the first frame part 112, and the second frame part 113 constituting the element mounting member 110 are made of a ceramic material such as glass-ceramics or alumina ceramics.

また、基板部１１１は、一方の主面に圧電振動素子１２０を搭載するための２個一対の圧電振動素子搭載パッド１１７が配置され、他方の主面に集積回路素子１３０を搭載するための集積回路素子搭載パッド１１８と集積回路素子搭載パッド１１８と接続される配線パターン１１４が配置されている。基板部１１１の両主面に配置されている圧電振動素子搭載パッド１１７と、集積回路素子搭載パッド１１８と、配線パターン１１４は、例えば、モリブデンメタライズ上にニッケルメッキ、金メッキが施されて形成されている。
また、基板部１１１の他方の主面の集積回路素子搭載パッド１１８は、例えば５行２列に１０個配置されている。図１では、例えば、集積回路素子搭載パッド１１８の１列５個分の断面図を示している。素子搭載部材１１０に配置された集積回路素子搭載パッド１１８は、後述する集積回路素子１３０の電極パッド１３４が金バンプ１３１と半田１３２を介して接合される。また、基板部１１１の内部には、内層配線（図示せず）が設けられ、圧電振動素子搭載パッド１１７と集積回路素子搭載パッド１１８とが内層配線（図示せず）を介して接続されている。また、集積回路素子搭載パッド１１８の1０個のうちの4個は、配線パターン１１４と第二の枠部１１３の内部に設けられたビアホール導体１１９を介して第二の枠部１１３の四隅に形成された外部接続用電極端子１１６と接続されている。 Further, the substrate unit 111 has two pairs of piezoelectric vibration element mounting pads 117 for mounting the piezoelectric vibration element 120 on one main surface, and an integrated circuit element 130 for mounting the integrated circuit element 130 on the other main surface. A wiring pattern 114 connected to the circuit element mounting pad 118 and the integrated circuit element mounting pad 118 is disposed. The piezoelectric vibration element mounting pads 117, the integrated circuit element mounting pads 118, and the wiring patterns 114 disposed on both main surfaces of the substrate portion 111 are formed by, for example, nickel plating or gold plating on molybdenum metallization. Yes.
Further, ten integrated circuit element mounting pads 118 on the other main surface of the substrate unit 111 are arranged, for example, in 5 rows and 2 columns. FIG. 1 shows, for example, a cross-sectional view of five integrated circuit element mounting pads 118 for one row. An integrated circuit element mounting pad 118 disposed on the element mounting member 110 is bonded to an electrode pad 134 of an integrated circuit element 130 described later via a gold bump 131 and solder 132. In addition, an inner layer wiring (not shown) is provided inside the substrate unit 111, and the piezoelectric vibration element mounting pad 117 and the integrated circuit element mounting pad 118 are connected via an inner layer wiring (not shown). . Four of the 10 integrated circuit element mounting pads 118 are formed at the four corners of the second frame portion 113 via the wiring pattern 114 and the via-hole conductor 119 provided inside the second frame portion 113. The external connection electrode terminal 116 is connected.

また、基板部１１１の一方の主面には、第一の枠部１１２が形成され、基板部１１１と第一の枠部１１２とで第一の凹部Ｋ１が形成される。また、第一の凹部Ｋ１には、圧電振動素子１２０が収容される。圧電振動素子１２０が収容される第一の凹部Ｋ１は、第一の枠部１１２と蓋部材１５０とで気密封止されている。   Further, the first frame portion 112 is formed on one main surface of the substrate portion 111, and the first recess K <b> 1 is formed by the substrate portion 111 and the first frame portion 112. In addition, the piezoelectric vibration element 120 is accommodated in the first recess K1. The first concave portion K1 in which the piezoelectric vibration element 120 is accommodated is hermetically sealed with the first frame portion 112 and the lid member 150.

また、基板部１１１の他方の主面には、第二の枠部１１３が形成され、基板部１１１と第二の枠部１１３とで第二の凹部Ｋ２が形成される。また、第二の凹部Ｋ２には、集積回路素子１３０が収容される。また、第二の枠部１１３の四隅は、外部接続用電極端子１１６を備える構成となっている。また、第二の枠部１１３の四隅に形成された外部接続用電極端子１１６は、それぞれＶＣＣ端子、ＶＣＯＮ端子、ＯＵＴ端子、グランド端子として機能している。   Further, a second frame portion 113 is formed on the other main surface of the substrate portion 111, and a second recess K <b> 2 is formed by the substrate portion 111 and the second frame portion 113. Further, the integrated circuit element 130 is accommodated in the second recess K2. In addition, the four corners of the second frame 113 are configured to include external connection electrode terminals 116. The external connection electrode terminals 116 formed at the four corners of the second frame portion 113 function as a VCC terminal, a VCON terminal, an OUT terminal, and a ground terminal, respectively.


蓋部材１５０は、基板部１１１と第一の枠部１１２で形成された第一の凹部Ｋ１を気密封止している。また、蓋部材１５０の材質は、４２アロイやコバール、リン青銅等からなる。
The lid member 150 hermetically seals the first concave portion K <b> 1 formed by the substrate portion 111 and the first frame portion 112. The lid member 150 is made of 42 alloy, kovar, phosphor bronze, or the like.

圧電振動素子１２０は、圧電素板の両主面に励振用電極（図示せず）と接続用電極（図示せず）を備える構造となっている。また、圧電振動素子１２０の接続用電極（図示せず）は、導電性接着剤１２１を介して素子搭載部材１１０に配置された圧電振動素子搭載パッド１１７に接続されている。また、圧電振動素子１２０は、所定の結晶軸でカットした圧電素板に外部からの変動電圧が一対の接続用電極と励振用電極を介して圧電素板に印加されると、所定の周波数で厚みすべり振動を起こすようになっている。また、圧電素板としては、例えば水晶が用いられる。   The piezoelectric vibration element 120 has a structure including excitation electrodes (not shown) and connection electrodes (not shown) on both main surfaces of the piezoelectric element plate. In addition, a connection electrode (not shown) of the piezoelectric vibration element 120 is connected to a piezoelectric vibration element mounting pad 117 disposed on the element mounting member 110 via a conductive adhesive 121. The piezoelectric vibration element 120 has a predetermined frequency when a fluctuation voltage from the outside is applied to the piezoelectric element plate cut through a predetermined crystal axis via a pair of connection electrodes and excitation electrodes. Thickness sliding vibration is caused. As the piezoelectric element plate, for example, quartz is used.

集積回路素子１３０は、少なくとも発振回路を備える構成となっている。また、集積回路素子１３０は、回路が形成された面に電極パッド１３４が形成されている。電極パッド１３４は、素子搭載部材１１０に配置された集積回路素子搭載パッド１１８に、半田１３２と金バンプ１３１を介して接合されている。また、集積回路素子１３０の電極パッド１３４は、集積回路素子１３０の回路が形成された面に、例えば５行２列に１０個配置されている。尚、図１では、集積回路素子１３０の電極パッド１３４の１列５個分の断面図を示している。また、集積回路素子１３０の電極パッド１３４と、素子搭載部材１１０に配置された集積回路素子搭載パッド１１８と配線パターン１１４の間には、樹脂１４０が充填されている。   The integrated circuit element 130 includes at least an oscillation circuit. In the integrated circuit element 130, an electrode pad 134 is formed on the surface on which the circuit is formed. The electrode pad 134 is bonded to the integrated circuit element mounting pad 118 disposed on the element mounting member 110 via solder 132 and gold bumps 131. Further, ten electrode pads 134 of the integrated circuit element 130 are arranged, for example, in five rows and two columns on the surface on which the circuit of the integrated circuit element 130 is formed. FIG. 1 shows a cross-sectional view of one row and five electrode pads 134 of the integrated circuit element 130. In addition, a resin 140 is filled between the electrode pads 134 of the integrated circuit element 130, the integrated circuit element mounting pad 118 disposed on the element mounting member 110, and the wiring pattern 114.

ここで本発明は、集積回路素子１３０が搭載される基板部１１１の他方の主面の集積回路素子搭載パッド１１８と接続される配線パターン１１４のうち、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続されている配線パターン１１４の幅を、他の配線パターン１１４の幅に比べて大きく形成している。ここで、他の配線パターン１１４とは、第二の枠部１１３の内部に設けられたビアホール導体１１９に接続されていない配線パターン１１４のことをいう。具体的には、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続されている配線パターン１１４が、隣接する集積回路素子搭載パッド１１８や配線パターン１１４とショート等の電気的影響がないように、例えば１００μｍ程度の間隔で形成されている。その実施例を図２に示す。ここで、図２に示すように、本発明の圧電発振器１００は基板部１１１の他方の主面の集積回路素子搭載パッド１１８に接続される配線パターン１１４のうち、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して第二の枠部１１３の四隅に形成された外部接続用電極端子１１６に接続されている配線パターン１１４の４個全ての幅を大きくしている。図２に示すように、本発明の圧電発振器１００の配線パターン１１４は、一方を基板部１１１の他方の主面の集積回路素子１３０を搭載するための集積回路素子搭載パッド１１８と、他方を第二の枠部１１３の内部に形成されるビアホール導体１１９に接続されている。また、図７に示すように、従来の圧電発振器の２００の配線パターン２１４は、一方を基板部２１１の他方の主面の集積回路素子２３０を搭載するための集積回路素子搭載パッド２１８と、他方を第二の枠部２１３の内部に形成されるビアホール導体２１９に接続されている。図７に示す従来例では、例えば、集積回路素子搭載パッド２１８の幅が概略２００μｍ程度であり、配線パターン２１４の幅が概略１５０μｍ程度である。   Here, the present invention is provided inside the second frame 113 in the wiring pattern 114 connected to the integrated circuit element mounting pad 118 on the other main surface of the substrate part 111 on which the integrated circuit element 130 is mounted. The width of the wiring pattern 114 connected to the external connection electrode terminal 116 via the via hole conductor 119 is formed larger than the width of the other wiring patterns 114. Here, the other wiring pattern 114 means a wiring pattern 114 that is not connected to the via-hole conductor 119 provided in the second frame portion 113. Specifically, the wiring pattern 114 connected to the external connection electrode terminal 116 via the via-hole conductor 119 provided inside the second frame portion 113 is connected to the adjacent integrated circuit element mounting pad 118 or the wiring pattern. In order to avoid electrical influences such as a short circuit from 114, for example, it is formed at an interval of about 100 μm. An example thereof is shown in FIG. Here, as shown in FIG. 2, the piezoelectric oscillator 100 according to the present invention includes an internal portion of the second frame portion 113 in the wiring pattern 114 connected to the integrated circuit element mounting pad 118 on the other main surface of the substrate portion 111. The widths of all four wiring patterns 114 connected to the external connection electrode terminals 116 formed at the four corners of the second frame portion 113 through the via-hole conductors 119 provided in the second frame 113 are increased. As shown in FIG. 2, the wiring pattern 114 of the piezoelectric oscillator 100 of the present invention includes an integrated circuit element mounting pad 118 for mounting the integrated circuit element 130 on the other main surface of the substrate portion 111 and the other one. It is connected to a via-hole conductor 119 formed inside the second frame 113. Further, as shown in FIG. 7, the wiring pattern 214 of the conventional piezoelectric oscillator 200 includes an integrated circuit element mounting pad 218 for mounting an integrated circuit element 230 on the other main surface of the substrate portion 211, and the other Is connected to a via-hole conductor 219 formed inside the second frame portion 213. In the conventional example shown in FIG. 7, for example, the width of the integrated circuit element mounting pad 218 is approximately 200 μm, and the width of the wiring pattern 214 is approximately 150 μm.

本発明の圧電発振器１００は、図２に示すように、基板部１１１の他方の主面の集積回路素子搭載パッド１１８に接続される配線パターン１１４のうち、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して第二の枠部１１３の四隅に形成された外部接続用電極端子１１６に接続されている配線パターン１１４の幅を他の配線パターン１１４の幅に比べて大きく形成したことで、外部接続用電極端子１１６から集積回路素子搭載パッド１１８までの熱到達時間を短くすることができる。即ち、従来の場合の図７は、第二の枠部２１３の内部に設けられたビアホール導体２１９から基板部２１１の他方の主面の配線パターン２１４を経由して集積回路素子搭載パッド２１８への熱経路が曲がった経路になっている。これに対し、本発明の図２は、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続されている基板部１１１の他方の主面の配線パターン１１４の幅を他の配線パターン１１４の幅に比べて大きくすることで、ビアホール導体１１９から集積回路素子搭載パッド１１８への熱経路を最短経路になるようにしている。よって、図２の配線パターン１１４は、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続されている基板部１１１の他方の主面の配線パターン１１４の幅を大きくすることで、第二の枠部１１３の内部に設けられたビアホール導体１１９から集積回路素子搭載パッド１１８への熱経路が従来の図７の配線パターン２１４に比べ短くなっている。   As shown in FIG. 2, the piezoelectric oscillator 100 of the present invention is provided inside the second frame portion 113 of the wiring pattern 114 connected to the integrated circuit element mounting pad 118 on the other main surface of the substrate portion 111. The width of the wiring pattern 114 connected to the external connection electrode terminals 116 formed at the four corners of the second frame portion 113 through the formed via-hole conductor 119 is formed larger than the width of the other wiring patterns 114. Thus, the heat arrival time from the external connection electrode terminal 116 to the integrated circuit element mounting pad 118 can be shortened. That is, in FIG. 7 in the conventional case, the via-hole conductor 219 provided in the second frame portion 213 is connected to the integrated circuit element mounting pad 218 via the wiring pattern 214 on the other main surface of the substrate portion 211. The heat path is a curved path. On the other hand, FIG. 2 of the present invention shows the wiring on the other main surface of the substrate part 111 connected to the external connection electrode terminal 116 via the via-hole conductor 119 provided inside the second frame part 113. By making the width of the pattern 114 larger than the width of the other wiring pattern 114, the heat path from the via-hole conductor 119 to the integrated circuit element mounting pad 118 is made the shortest path. Therefore, the wiring pattern 114 in FIG. 2 is the wiring pattern on the other main surface of the substrate portion 111 connected to the external connection electrode terminal 116 via the via-hole conductor 119 provided in the second frame portion 113. By increasing the width of 114, the heat path from the via-hole conductor 119 provided in the second frame 113 to the integrated circuit element mounting pad 118 is shorter than the conventional wiring pattern 214 of FIG. .

次に、本発明の第１の変形例について説明する。図３に示すように、本発明の第１の変形例は、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続される基板部１１１の他方の主面の４個の配線パターン１１４のうち、３個の配線パターン１１４の幅を大きくした場合である。これにより、外部接続用電極端子１１６に接続されている３個の配線パターン１１４は、外部接続用電極端子１１６から第二の枠部１１３の内部に設けられたビアホール導体１１９を介して基板部１１１の他方の主面の集積回路素子搭載パッド１１８までの熱到達時間を短くすることができる。また、前述の外部接続用電極端子１１６に接続されている３個の配線パターン１１４は、図３の配置に限定されない。例えば図３は、基板部１１１の他方の主面の右上の配線パターン１１４を図７の従来例の配線パターン２１４と同一にしているが、これに代えて図３の右下を従来例の図７と同一にしてもよい。図３に示す第１の変形例においても、本発明の実施形態と同様の効果を奏する。   Next, a first modification of the present invention will be described. As shown in FIG. 3, the first modification of the present invention is the other of the substrate part 111 connected to the external connection electrode terminal 116 via a via-hole conductor 119 provided in the second frame part 113. This is a case where the width of the three wiring patterns 114 is increased among the four wiring patterns 114 on the main surface. Thus, the three wiring patterns 114 connected to the external connection electrode terminal 116 are connected to the substrate portion 111 from the external connection electrode terminal 116 via the via hole conductor 119 provided in the second frame portion 113. It is possible to shorten the heat arrival time to the integrated circuit element mounting pad 118 on the other main surface. Further, the three wiring patterns 114 connected to the aforementioned external connection electrode terminals 116 are not limited to the arrangement shown in FIG. For example, in FIG. 3, the upper right wiring pattern 114 on the other main surface of the substrate unit 111 is the same as the wiring pattern 214 of the conventional example of FIG. 7, but instead the lower right of FIG. 7 may be the same. The first modification shown in FIG. 3 also has the same effect as the embodiment of the present invention.

また、本発明の第２の変形例について説明する。図４に示すように、本発明の第２の変形例は、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続される基板部１１１の他方の主面の４個の配線パターン１１４のうち、２個の配線パターン１１４の幅を大きくした場合である。これにより、外部接続用電極端子１１６に接続されている２個の配線パターン１１４は、外部接続用電極端子１１６から第二の枠部１１３の内部に設けられたビアホール導体１１９を介して基板部１１１の他方の主面の集積回路素子搭載パッド１１８までの熱到達時間を短くすることができる。また、前述の外部接続用電極端子１１６に接続されている２個の配線パターン１１４は、図４の配置に限定されない。例えば図４は、基板部１１１の他方の主面の右側の２個の配線パターン１１４を図７の従来例の配線パターン２１４と同一にしているが、これに代えて図４の左側の２個の配線パターン１１４を従来例の図７と同一にしてもよい。図４に示す第２の変形例においても、本発明の実施形態と同様の効果を奏する。   A second modification of the present invention will be described. As shown in FIG. 4, the second modification of the present invention is the other of the substrate part 111 connected to the external connection electrode terminal 116 via the via-hole conductor 119 provided in the second frame part 113. This is a case where the width of two wiring patterns 114 is increased among the four wiring patterns 114 on the main surface. As a result, the two wiring patterns 114 connected to the external connection electrode terminal 116 are connected to the substrate portion 111 from the external connection electrode terminal 116 via the via-hole conductor 119 provided inside the second frame portion 113. It is possible to shorten the heat arrival time to the integrated circuit element mounting pad 118 on the other main surface. Further, the two wiring patterns 114 connected to the aforementioned external connection electrode terminals 116 are not limited to the arrangement shown in FIG. For example, in FIG. 4, the two wiring patterns 114 on the right side of the other main surface of the substrate unit 111 are the same as the wiring pattern 214 of the conventional example of FIG. 7, but instead, the two wiring patterns 114 on the left side of FIG. The wiring pattern 114 may be the same as that in FIG. The second modification shown in FIG. 4 also has the same effect as that of the embodiment of the present invention.

また、本発明の第３の変形例について説明する。図５に示すように、本発明の第３の変形例は、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続される基板部１１１の他方の主面の４個の配線パターン１１４のうち、１個の配線パターン１１４の幅を大きくした場合である。これにより、外部接続用電極端子１１６に接続されている１個の配線パターン１１４は、外部接続用電極端子１１６から第二の枠部１１３の内部に設けられたビアホール導体１１９を介して基板部１１１の他方の主面の集積回路素子搭載パッド１１８までの熱到達時間を短くすることができる。また、前述の外部接続用電極端子１１６に接続されている１個の配線パターン１１４は、図５の配置に限定されない。例えば図５は、基板部１１１の他方の主面の左上の配線パターン１１４を大きくしているが、これに代えて図５の左下の配線パターン１１４を大きくしてもよい。図５に示す第３の変形例においても、本発明の実施形態と同様の効果を奏する。   A third modification of the present invention will be described. As shown in FIG. 5, the third modification of the present invention is the other of the substrate part 111 connected to the external connection electrode terminal 116 via the via-hole conductor 119 provided in the second frame part 113. This is a case where the width of one wiring pattern 114 is increased among the four wiring patterns 114 on the main surface. Accordingly, one wiring pattern 114 connected to the external connection electrode terminal 116 is connected to the substrate portion 111 from the external connection electrode terminal 116 via the via hole conductor 119 provided in the second frame portion 113. It is possible to shorten the heat arrival time to the integrated circuit element mounting pad 118 on the other main surface. Further, the single wiring pattern 114 connected to the above-described external connection electrode terminal 116 is not limited to the arrangement shown in FIG. For example, although the upper left wiring pattern 114 on the other main surface of the substrate unit 111 is enlarged in FIG. 5, the lower left wiring pattern 114 in FIG. 5 may be enlarged instead. The third modification shown in FIG. 5 also has the same effect as that of the embodiment of the present invention.

本発明における図２〜図５と従来例の図７を比較すると、図２〜図５は、第二の枠部１１３の内部に設けられたビアホール導体１１９を介して外部接続用電極端子１１６に接続される基板部１１１の他方の主面の配線パターン１１４の幅を大きくすることで、第二の枠部１１３の内部に設けられたビアホール導体１１９から基板部１１１の他方の主面の配線パターン１１４の集積回路素子搭載パッド１１８への熱経路が短くなっている。即ち、従来の場合の図７は、第二の枠部２１３の内部に設けられたビアホール導体２１９から基板部２１１の他方の主面の配線パターン２１４の集積回路素子搭載パッド２１８への熱経路が曲がった熱経路になっている。そのため、従来の配線パターン２１４は、外部接続用電極端子２１６から第二の枠部２１３の内部に設けられたビアホール導体２１９を介して基板部２１１の他方の主面の集積回路素子搭載パッド２１８への熱到達時間が長くなる構造となっている。よって、本発明の配線パターン１１４は、従来の配線パターン２１４に比べ、外部接続用電極端子１１６から第二の枠部１１３の内部に設けられたビアホール導体１１９を介して基板部１１１の他方の主面の集積回路素子搭載パッド１１８への熱経路を短くできる。これにより、本発明の圧電発振器１００は、外部接続用電極端子１１６から第二の枠部１１３の内部に設けられたビアホール導体１１９を介して集積回路素子搭載パッド１１８までの熱到達時間を短縮することができる。   2 to FIG. 5 in the present invention and FIG. 7 of the conventional example, FIG. 2 to FIG. 5 are connected to the external connection electrode terminal 116 via the via-hole conductor 119 provided inside the second frame portion 113. By increasing the width of the wiring pattern 114 on the other main surface of the substrate part 111 to be connected, the wiring pattern on the other main surface of the substrate part 111 from the via-hole conductor 119 provided inside the second frame part 113. The heat path to 114 of the integrated circuit element mounting pad 118 is shortened. That is, in FIG. 7 in the conventional case, the heat path from the via-hole conductor 219 provided inside the second frame portion 213 to the integrated circuit element mounting pad 218 of the wiring pattern 214 on the other main surface of the substrate portion 211 is shown. It has a curved heat path. Therefore, the conventional wiring pattern 214 is connected from the external connection electrode terminal 216 to the integrated circuit element mounting pad 218 on the other main surface of the substrate portion 211 via the via-hole conductor 219 provided inside the second frame portion 213. It has a structure in which the heat arrival time is long. Therefore, the wiring pattern 114 of the present invention is different from the conventional wiring pattern 214 in that the other main part of the substrate part 111 is connected to the other main electrode part 116 from the external connection electrode terminal 116 via the via-hole conductor 119 provided inside the second frame part 113. The heat path to the integrated circuit element mounting pad 118 on the surface can be shortened. Thereby, the piezoelectric oscillator 100 of the present invention shortens the heat arrival time from the external connection electrode terminal 116 to the integrated circuit element mounting pad 118 via the via-hole conductor 119 provided in the second frame portion 113. be able to.

さらに、本発明の圧電発振器１００は、ビアホール導体１１９を介して外部接続用電極端子１１６に接続される配線パターン１１４の幅を大きくすることで、外部接続用電極端子１１６から配線パターン１１４を伝わる熱量を大きくできる。これにより、本発明の圧電発振器１００の配線パターン１１４は、外部接続用電極端子１１６からビアホール導体１１９を介して、集積回路素子搭載パッド１１８への伝熱量を従来の配線パターン２１４に比べ大きくできる。よって、本発明の圧電発振器１００は、外部接続用電極端子１１６から第二の枠部１１３の内部に設けられたビアホール導体１１９を介して集積回路素子搭載パッド１１８までの熱到達時間を短縮することができる。   Furthermore, the piezoelectric oscillator 100 according to the present invention increases the width of the wiring pattern 114 connected to the external connection electrode terminal 116 via the via-hole conductor 119, so that the amount of heat transmitted from the external connection electrode terminal 116 to the wiring pattern 114. Can be increased. As a result, the wiring pattern 114 of the piezoelectric oscillator 100 of the present invention can increase the amount of heat transferred from the external connection electrode terminal 116 to the integrated circuit element mounting pad 118 via the via-hole conductor 119 as compared with the conventional wiring pattern 214. Therefore, the piezoelectric oscillator 100 of the present invention can shorten the heat arrival time from the external connection electrode terminal 116 to the integrated circuit element mounting pad 118 via the via-hole conductor 119 provided in the second frame 113. Can do.

以上より、本発明の圧電発振器１００は、基板部１１１の他方の主面に設けられた集積回路素子搭載パッド１１８に接続されている配線パターン１１４のうち、ビアホール導体１１９を介して外部接続用電極端子１１６と接続されている配線パターン１１４の幅を、他の配線パターン１１４の幅に比べて大きくなるように形成したことで、外部接続用電極端子１１６から基板部１１１の一方の主面に設けられた２個一対の圧電振動素子搭載パッド１１７への熱到達時間と、外部接続用電極端子１１６から基板部１１１の他方の主面に設けられた集積回路素子搭載パッド１１８への熱到達時間の差が小さくなり、圧電振動素子１２０と集積回路素子１３０の感知する温度差が小さくなるために集積回路素子１３０で圧電振動素子１２０の正確な温度補償を行うことができる。   As described above, the piezoelectric oscillator 100 according to the present invention includes the electrode for external connection via the via-hole conductor 119 in the wiring pattern 114 connected to the integrated circuit element mounting pad 118 provided on the other main surface of the substrate portion 111. Since the width of the wiring pattern 114 connected to the terminal 116 is formed so as to be larger than the width of the other wiring pattern 114, the wiring pattern 114 is provided on one main surface of the substrate portion 111 from the external connection electrode terminal 116. The heat arrival time to the two pairs of piezoelectric vibration element mounting pads 117 and the heat arrival time from the external connection electrode terminal 116 to the integrated circuit element mounting pad 118 provided on the other main surface of the substrate portion 111 Since the difference becomes smaller and the temperature difference between the piezoelectric vibrating element 120 and the integrated circuit element 130 becomes smaller, the integrated circuit element 130 can accurately detect the piezoelectric vibrating element 120. It is possible to perform the time compensation.

また、前記した実施形態以外にも、本発明の要旨を逸脱しない範囲において種々の変更、改良等が可能である。例えば、前記実施形態に示した圧電発振器１００の第一の凹部Ｋ１に搭載される圧電振動素子１２０は、平面視矩形状の圧電素板の両主面に励振用電極と接続用電極を備える構造を示したが、これに限定することなく、例えば、平面視形状が円形や、音叉形の圧電素板に各種電極を設けた形態の圧電振動素子でもよく、又圧電振動素子に変えて弾性表面波素子を用いても構わない。   In addition to the above-described embodiments, various changes and improvements can be made without departing from the scope of the present invention. For example, the piezoelectric vibration element 120 mounted in the first concave portion K1 of the piezoelectric oscillator 100 shown in the above embodiment has a structure in which excitation electrodes and connection electrodes are provided on both main surfaces of a piezoelectric base plate having a rectangular shape in plan view. However, the present invention is not limited to this, and for example, a piezoelectric vibration element having a circular shape in plan view, or a piezoelectric vibration element in which various electrodes are provided on a tuning fork-shaped piezoelectric element plate may be used. A wave element may be used.

１００・・・圧電発振器
１１０・・・素子搭載部材
１１１・・・基板部
１１２・・・第一の枠部
１１３・・・第二の枠部
１１４・・・配線パターン
１１６・・・外部接続用電極端子
１１７・・・圧電振動素子搭載パッド
１１８・・・集積回路素子搭載パッド
１１９・・・ビアホール導体
１２０・・・圧電振動素子
１２１・・・導電性接着剤
１３０・・・集積回路素子
１３１・・・金バンプ
１３２・・・半田
１３４・・・電極パッド
１４０・・・樹脂
１５０・・・蓋部材
Ｋ１・・・第一の凹部
Ｋ２・・・第二の凹部 DESCRIPTION OF SYMBOLS 100 ... Piezoelectric oscillator 110 ... Element mounting member 111 ... Substrate part 112 ... First frame part 113 ... Second frame part 114 ... Wiring pattern 116 ... For external connection Electrode terminal 117... Piezoelectric vibration element mounting pad 118... Integrated circuit element mounting pad 119... Via-hole conductor 120 ... Piezoelectric vibration element 121 ... Conductive adhesive 130 ... Integrated circuit element 131. ..Gold bump 132 ... solder 134 ... electrode pad 140 ... resin 150 ... lid member K1 ... first recess K2 ... second recess

Claims (1)

基板部と第一の枠部によって基板部の一方の主面に形成された第１の凹部と、前記基板部と第二の枠部によって前記基板部の他方の主面に形成された第２の凹部が設けられた素子搭載部材と、
前記第１の凹部内に露出した基板部の一方の主面に設けられた２個一対の圧電振動素子搭載パッドに搭載されている圧電振動素子と、
前記第２の凹部内に露出した基板部の他方の主面に設けられた集積回路素子搭載パッドに搭載されている集積回路素子と、
前記集積回路素子搭載パッドに接続されている前記基板部の他方の主面に設けられた配線パターンと、
前記配線パターンの一部の配線パターンと接続されている前記第二の枠部の内部に設けられたビアホール導体と、
前記ビアホール導体と接続されている前記第二の枠部の四隅に形成された外部接続用電極端子と、
前記第１の凹部を気密封止する蓋体とを備え、
前記集積回路素子搭載パッドに接続されている配線パターンのうち、前記ビアホール導体を介して前記外部接続用電極端子と接続されているすべての配線パターンの幅が、他の配線パターンの幅に比べて大きくなるように形成されている
ことを特徴とする圧電発振器。 A first recess formed on one main surface of the substrate portion by the substrate portion and the first frame portion, and a second formed on the other main surface of the substrate portion by the substrate portion and the second frame portion. An element mounting member provided with a recess of
A piezoelectric vibration element mounted on two pairs of piezoelectric vibration element mounting pads provided on one main surface of the substrate portion exposed in the first recess;
An integrated circuit element mounted on an integrated circuit element mounting pad provided on the other main surface of the substrate portion exposed in the second recess;
A wiring pattern provided on the other main surface of the substrate portion connected to the integrated circuit element mounting pad;
A via-hole conductor provided inside the second frame portion connected to a part of the wiring pattern of the wiring pattern;
External connection electrode terminals formed at the four corners of the second frame portion connected to the via-hole conductor,
A lid for hermetically sealing the first recess,
Of the wiring patterns connected to the integrated circuit element mounting pad, the widths of all the wiring patterns connected to the external connection electrode terminals via the via-hole conductors are larger than the widths of other wiring patterns. A piezoelectric oscillator characterized by being formed to be large.
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