JP2014116927A5 - - Google Patents

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Publication number
JP2014116927A5
JP2014116927A5 JP2013211733A JP2013211733A JP2014116927A5 JP 2014116927 A5 JP2014116927 A5 JP 2014116927A5 JP 2013211733 A JP2013211733 A JP 2013211733A JP 2013211733 A JP2013211733 A JP 2013211733A JP 2014116927 A5 JP2014116927 A5 JP 2014116927A5
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JP
Japan
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codeword
operable
data processing
processing system
circuit
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JP2013211733A
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English (en)
Japanese (ja)
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JP2014116927A (ja
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Priority claimed from US13/708,941 external-priority patent/US8996969B2/en
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Publication of JP2014116927A publication Critical patent/JP2014116927A/ja
Publication of JP2014116927A5 publication Critical patent/JP2014116927A5/ja
Pending legal-status Critical Current

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JP2013211733A 2012-12-08 2013-10-09 誤訂正ハンドリング処理を伴う低密度パリティ検査復号化器 Pending JP2014116927A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/708,941 US8996969B2 (en) 2012-12-08 2012-12-08 Low density parity check decoder with miscorrection handling
US13/708,941 2012-12-08

Publications (2)

Publication Number Publication Date
JP2014116927A JP2014116927A (ja) 2014-06-26
JP2014116927A5 true JP2014116927A5 (enExample) 2016-11-04

Family

ID=49301287

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Application Number Title Priority Date Filing Date
JP2013211733A Pending JP2014116927A (ja) 2012-12-08 2013-10-09 誤訂正ハンドリング処理を伴う低密度パリティ検査復号化器

Country Status (6)

Country Link
US (1) US8996969B2 (enExample)
EP (1) EP2741421A1 (enExample)
JP (1) JP2014116927A (enExample)
KR (1) KR20140074814A (enExample)
CN (1) CN103873069A (enExample)
TW (1) TWI604698B (enExample)

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