KR20140074814A - 오정정을 처리하는 저밀도 패리티 검사 디코더 - Google Patents

오정정을 처리하는 저밀도 패리티 검사 디코더 Download PDF

Info

Publication number
KR20140074814A
KR20140074814A KR1020130119405A KR20130119405A KR20140074814A KR 20140074814 A KR20140074814 A KR 20140074814A KR 1020130119405 A KR1020130119405 A KR 1020130119405A KR 20130119405 A KR20130119405 A KR 20130119405A KR 20140074814 A KR20140074814 A KR 20140074814A
Authority
KR
South Korea
Prior art keywords
codeword
data
circuit
hash
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
KR1020130119405A
Other languages
English (en)
Korean (ko)
Inventor
아나톨리 에이 볼로토브
샤오후아 양
종왕 리
미카일 아이 그린척
래브 디 이바노빅
판 장
양 한
Original Assignee
엘에스아이 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘에스아이 코포레이션 filed Critical 엘에스아이 코포레이션
Publication of KR20140074814A publication Critical patent/KR20140074814A/ko
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1142—Decoding using trapping sets

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
KR1020130119405A 2012-12-08 2013-10-07 오정정을 처리하는 저밀도 패리티 검사 디코더 Abandoned KR20140074814A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/708,941 2012-12-08
US13/708,941 US8996969B2 (en) 2012-12-08 2012-12-08 Low density parity check decoder with miscorrection handling

Publications (1)

Publication Number Publication Date
KR20140074814A true KR20140074814A (ko) 2014-06-18

Family

ID=49301287

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130119405A Abandoned KR20140074814A (ko) 2012-12-08 2013-10-07 오정정을 처리하는 저밀도 패리티 검사 디코더

Country Status (6)

Country Link
US (1) US8996969B2 (enExample)
EP (1) EP2741421A1 (enExample)
JP (1) JP2014116927A (enExample)
KR (1) KR20140074814A (enExample)
CN (1) CN103873069A (enExample)
TW (1) TWI604698B (enExample)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9244685B2 (en) * 2012-11-02 2016-01-26 Avago Technologies General Ip (Singapore) Pte. Ltd. System and method for check-node unit message processing
US9300329B2 (en) 2012-11-08 2016-03-29 Sk Hynix Memory Solutions Inc. Turbo-product codes (TPC) with interleaving
US9213593B2 (en) * 2013-01-16 2015-12-15 Maxlinear, Inc. Efficient memory architecture for low density parity check decoding
US9141554B1 (en) 2013-01-18 2015-09-22 Cisco Technology, Inc. Methods and apparatus for data processing using data compression, linked lists and de-duplication techniques
JP6446730B2 (ja) * 2013-03-07 2019-01-09 マーベル ワールド トレード リミテッド データをデコードするための方法およびデコーダ
US9258112B2 (en) * 2013-03-15 2016-02-09 Accenture Global Services Limited Configurable key-based data shuffling and encryption
US9448877B2 (en) * 2013-03-15 2016-09-20 Cisco Technology, Inc. Methods and apparatus for error detection and correction in data storage systems using hash value comparisons
GB2517850B (en) * 2013-08-27 2015-08-05 Imagination Tech Ltd An improved decoder for low-density parity-check codes
KR102204394B1 (ko) * 2013-10-14 2021-01-19 삼성전자주식회사 메모리 시스템에서의 코딩 방법 및 디코딩 방법
US9602141B2 (en) 2014-04-21 2017-03-21 Sandisk Technologies Llc High-speed multi-block-row layered decoder for low density parity check (LDPC) codes
US9748973B2 (en) * 2014-04-22 2017-08-29 Sandisk Technologies Llc Interleaved layered decoder for low-density parity check codes
US9503125B2 (en) * 2014-05-08 2016-11-22 Sandisk Technologies Llc Modified trellis-based min-max decoder for non-binary low-density parity-check error-correcting codes
US9559727B1 (en) 2014-07-17 2017-01-31 Sk Hynix Memory Solutions Inc. Stopping rules for turbo product codes
US9853873B2 (en) 2015-01-10 2017-12-26 Cisco Technology, Inc. Diagnosis and throughput measurement of fibre channel ports in a storage area network environment
US9900250B2 (en) 2015-03-26 2018-02-20 Cisco Technology, Inc. Scalable handling of BGP route information in VXLAN with EVPN control plane
US10222986B2 (en) 2015-05-15 2019-03-05 Cisco Technology, Inc. Tenant-level sharding of disks with tenant-specific storage modules to enable policies per tenant in a distributed storage system
US11588783B2 (en) 2015-06-10 2023-02-21 Cisco Technology, Inc. Techniques for implementing IPV6-based distributed storage space
US10778765B2 (en) 2015-07-15 2020-09-15 Cisco Technology, Inc. Bid/ask protocol in scale-out NVMe storage
US9892075B2 (en) 2015-12-10 2018-02-13 Cisco Technology, Inc. Policy driven storage in a microserver computing environment
US20170288697A1 (en) * 2016-03-31 2017-10-05 Silicon Motion Inc. Ldpc shuffle decoder with initialization circuit comprising ordered set memory
US10140172B2 (en) 2016-05-18 2018-11-27 Cisco Technology, Inc. Network-aware storage repairs
US20170351639A1 (en) 2016-06-06 2017-12-07 Cisco Technology, Inc. Remote memory access using memory mapped addressing among multiple compute nodes
US10664169B2 (en) 2016-06-24 2020-05-26 Cisco Technology, Inc. Performance of object storage system by reconfiguring storage devices based on latency that includes identifying a number of fragments that has a particular storage device as its primary storage device and another number of fragments that has said particular storage device as its replica storage device
US11563695B2 (en) 2016-08-29 2023-01-24 Cisco Technology, Inc. Queue protection using a shared global memory reserve
EP3316486B1 (en) * 2016-10-25 2023-06-14 Université de Bretagne Sud Elementary check node-based syndrome decoding with input pre-sorting
KR102827608B1 (ko) * 2016-12-14 2025-07-03 에스케이하이닉스 주식회사 메모리 시스템 및 이의 에러 정정 방법
US10545914B2 (en) 2017-01-17 2020-01-28 Cisco Technology, Inc. Distributed object storage
US10243823B1 (en) 2017-02-24 2019-03-26 Cisco Technology, Inc. Techniques for using frame deep loopback capabilities for extended link diagnostics in fibre channel storage area networks
US10713203B2 (en) 2017-02-28 2020-07-14 Cisco Technology, Inc. Dynamic partition of PCIe disk arrays based on software configuration / policy distribution
US10254991B2 (en) 2017-03-06 2019-04-09 Cisco Technology, Inc. Storage area network based extended I/O metrics computation for deep insight into application performance
CN107276596B (zh) * 2017-07-11 2020-07-07 北京理工大学 一种基于分段Hash序列的极化码译码方法
US10303534B2 (en) 2017-07-20 2019-05-28 Cisco Technology, Inc. System and method for self-healing of application centric infrastructure fabric memory
US10404596B2 (en) 2017-10-03 2019-09-03 Cisco Technology, Inc. Dynamic route profile storage in a hardware trie routing table
US10942666B2 (en) 2017-10-13 2021-03-09 Cisco Technology, Inc. Using network device replication in distributed storage clusters
CN108170556A (zh) * 2018-01-18 2018-06-15 江苏华存电子科技有限公司 纠错码生成与校验矩阵的保护方法及矩阵存储/产生装置
KR102523059B1 (ko) * 2018-04-18 2023-04-19 에스케이하이닉스 주식회사 에러 정정 회로 및 그것을 포함하는 메모리 시스템
TWI688223B (zh) * 2019-02-11 2020-03-11 義守大學 代數幾何碼的赫米特碼之編碼及解碼方法
KR102851230B1 (ko) * 2019-02-14 2025-08-27 에스케이하이닉스 주식회사 메모리 컨트롤러
US12393485B2 (en) * 2022-01-28 2025-08-19 Pure Storage, Inc. Recover corrupted data through speculative bitflip and cross-validation
CN114666011B (zh) * 2022-03-23 2024-04-16 锐捷网络股份有限公司 一种数据处理方法、装置及电子设备
US11949430B2 (en) * 2022-09-01 2024-04-02 SK Hynix Inc. Parallel system to calculate low density parity check

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3328093B2 (ja) 1994-07-12 2002-09-24 三菱電機株式会社 エラー訂正装置
US5701314A (en) 1995-12-21 1997-12-23 Cirrus Logic, Inc. On-the-fly error correction using thermal asperity erasure pointers from a sampled amplitude read channel in a magnetic disk drive
GB2350531B (en) 1999-05-26 2001-07-11 3Com Corp High speed parallel bit error rate tester
GB2372142B (en) 1999-11-22 2003-11-12 Seagate Technology Llc Method and apparatus for data error recovery using defect threshold detector and viterbi gain
US6977930B1 (en) * 2000-02-14 2005-12-20 Cisco Technology, Inc. Pipelined packet switching and queuing architecture
US7136244B1 (en) 2002-02-22 2006-11-14 Western Digital Technologies, Inc. Disk drive employing data averaging techniques during retry operations to facilitate data recovery
KR20040093748A (ko) * 2002-04-05 2004-11-08 코닌클리케 필립스 일렉트로닉스 엔.브이. 오류정정의 추가층을 오류정정코드 내에 삽입하는 방법 및장치
US7085988B1 (en) * 2002-04-08 2006-08-01 Maxtor Corporation Hashing system utilizing error correction coding techniques
US7779268B2 (en) * 2004-12-07 2010-08-17 Mitsubishi Electric Research Laboratories, Inc. Biometric based user authentication and data encryption
US7730384B2 (en) 2005-02-28 2010-06-01 Agere Systems Inc. Method and apparatus for evaluating performance of a read channel
US7738201B2 (en) 2006-08-18 2010-06-15 Seagate Technology Llc Read error recovery using soft information
US7827461B1 (en) 2006-09-18 2010-11-02 Marvell International Ltd. Low-density parity-check decoder apparatus
US7702989B2 (en) 2006-09-27 2010-04-20 Agere Systems Inc. Systems and methods for generating erasure flags
US7971125B2 (en) 2007-01-08 2011-06-28 Agere Systems Inc. Systems and methods for prioritizing error correction data
GB2455283A (en) * 2007-10-31 2009-06-10 Hewlett Packard Development Co Error correction in data communication apparatus using toroidal-web Tanner graph
US20090154916A1 (en) * 2007-12-12 2009-06-18 Tellabs Petaluma, Inc. Method and Apparatus for GPON GEM Error Correction Implementation
US8407553B2 (en) 2008-08-15 2013-03-26 Lsi Corporation RAM list-decoding of near codewords
US20110080211A1 (en) 2008-11-20 2011-04-07 Shaohua Yang Systems and Methods for Noise Reduced Data Detection
US7990642B2 (en) 2009-04-17 2011-08-02 Lsi Corporation Systems and methods for storage channel testing
EP2285003B1 (en) * 2009-08-12 2019-11-13 Alcatel Lucent Correction of errors in a codeword
US8176404B2 (en) 2009-09-09 2012-05-08 Lsi Corporation Systems and methods for stepped data retry in a storage system
US8688873B2 (en) 2009-12-31 2014-04-01 Lsi Corporation Systems and methods for monitoring out of order data decoding
US8458555B2 (en) 2010-06-30 2013-06-04 Lsi Corporation Breaking trapping sets using targeted bit adjustment
CN102045161A (zh) * 2010-11-24 2011-05-04 上海电机学院 量子密钥协商方法
US8810940B2 (en) 2011-02-07 2014-08-19 Lsi Corporation Systems and methods for off track error recovery
US8693120B2 (en) 2011-03-17 2014-04-08 Lsi Corporation Systems and methods for sample averaging in data processing
US8886508B2 (en) * 2011-08-22 2014-11-11 Freescale Semiconductor, Inc. Circuit simulation acceleration using model caching

Also Published As

Publication number Publication date
TWI604698B (zh) 2017-11-01
US8996969B2 (en) 2015-03-31
CN103873069A (zh) 2014-06-18
US20140164866A1 (en) 2014-06-12
TW201429168A (zh) 2014-07-16
JP2014116927A (ja) 2014-06-26
EP2741421A1 (en) 2014-06-11

Similar Documents

Publication Publication Date Title
US8996969B2 (en) Low density parity check decoder with miscorrection handling
US8929009B2 (en) Irregular low density parity check decoder with low syndrome error handling
US9459956B2 (en) Data decoder with trapping set flip bit mapper
US9130590B2 (en) Non-binary layered low density parity check decoder
US9015550B2 (en) Low density parity check layer decoder for codes with overlapped circulants
US9015547B2 (en) Multi-level LDPC layered decoder with out-of-order processing
US10367526B2 (en) Irregular low density parity check processing system with non-uniform scaling
US8756478B2 (en) Multi-level LDPC layer decoder
US8739004B2 (en) Symbol flipping LDPC decoding system
US8683309B2 (en) Systems and methods for ambiguity based decode algorithm modification
US8751889B2 (en) Systems and methods for multi-pass alternate decoding
US20130139023A1 (en) Variable Sector Size Interleaver
US20080163026A1 (en) Concatenated codes for holographic storage
US20130111289A1 (en) Systems and methods for dual process data decoding
US9130589B2 (en) Low density parity check decoder with dynamic scaling
US20130139022A1 (en) Variable Sector Size LDPC Decoder
US9048867B2 (en) Shift register-based layered low density parity check decoder
US20160020783A1 (en) Low Density Parity Check Decoder With Relative Indexing
US8949696B2 (en) Systems and methods for trapping set disruption
US20140082449A1 (en) LDPC Decoder With Variable Node Hardening
US20160087653A1 (en) Decoder With Targeted Symbol Flipping Recovery Of Miscorrected Codewords
US20160191079A1 (en) Low Dynamic Power Check Node Processor For Low Density Parity Check Decoder
US9727419B2 (en) Non-binary low density parity check code column rotation
US20160277035A1 (en) Non-Binary Low Density Parity Check Decoder With Format Transforming Variable Node Processor
US8885276B2 (en) Systems and methods for shared layer data decoding

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20131007

PG1501 Laying open of application
N231 Notification of change of applicant
PN2301 Change of applicant

Patent event date: 20160510

Comment text: Notification of Change of Applicant

Patent event code: PN23011R01D

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20180907

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 20131007

Comment text: Patent Application

PN2301 Change of applicant

Patent event date: 20181005

Comment text: Notification of Change of Applicant

Patent event code: PN23011R01D

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20190329

Patent event code: PE09021S01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20190826

PC1904 Unpaid initial registration fee