CN103873069A - 具有误纠处理的低密度奇偶校验解码器 - Google Patents

具有误纠处理的低密度奇偶校验解码器 Download PDF

Info

Publication number
CN103873069A
CN103873069A CN201310447343.8A CN201310447343A CN103873069A CN 103873069 A CN103873069 A CN 103873069A CN 201310447343 A CN201310447343 A CN 201310447343A CN 103873069 A CN103873069 A CN 103873069A
Authority
CN
China
Prior art keywords
code word
mistake
data
circuit
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201310447343.8A
Other languages
English (en)
Chinese (zh)
Inventor
A·A·波罗特夫
杨少华
李宗旺
M·I·格里查克
L·D·伊万诺维克
张帆
韩洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Infineon Technologies North America Corp
Original Assignee
Infineon Technologies North America Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies North America Corp filed Critical Infineon Technologies North America Corp
Publication of CN103873069A publication Critical patent/CN103873069A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1142—Decoding using trapping sets

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
CN201310447343.8A 2012-12-08 2013-09-27 具有误纠处理的低密度奇偶校验解码器 Pending CN103873069A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/708,941 2012-12-08
US13/708,941 US8996969B2 (en) 2012-12-08 2012-12-08 Low density parity check decoder with miscorrection handling

Publications (1)

Publication Number Publication Date
CN103873069A true CN103873069A (zh) 2014-06-18

Family

ID=49301287

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310447343.8A Pending CN103873069A (zh) 2012-12-08 2013-09-27 具有误纠处理的低密度奇偶校验解码器

Country Status (6)

Country Link
US (1) US8996969B2 (enExample)
EP (1) EP2741421A1 (enExample)
JP (1) JP2014116927A (enExample)
KR (1) KR20140074814A (enExample)
CN (1) CN103873069A (enExample)
TW (1) TWI604698B (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107276596A (zh) * 2017-07-11 2017-10-20 北京理工大学 一种基于分段Hash序列的极化码译码方法
CN108170556A (zh) * 2018-01-18 2018-06-15 江苏华存电子科技有限公司 纠错码生成与校验矩阵的保护方法及矩阵存储/产生装置
CN112118014A (zh) * 2016-03-31 2020-12-22 慧荣科技股份有限公司 用于进行重组解码的低密度奇偶校验解码装置及相关方法
CN114666011A (zh) * 2022-03-23 2022-06-24 锐捷网络股份有限公司 一种数据处理方法、装置及电子设备

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9244685B2 (en) * 2012-11-02 2016-01-26 Avago Technologies General Ip (Singapore) Pte. Ltd. System and method for check-node unit message processing
US9300329B2 (en) 2012-11-08 2016-03-29 Sk Hynix Memory Solutions Inc. Turbo-product codes (TPC) with interleaving
US9213593B2 (en) * 2013-01-16 2015-12-15 Maxlinear, Inc. Efficient memory architecture for low density parity check decoding
US9141554B1 (en) 2013-01-18 2015-09-22 Cisco Technology, Inc. Methods and apparatus for data processing using data compression, linked lists and de-duplication techniques
CN105247808B (zh) * 2013-03-07 2019-03-22 马维尔国际贸易有限公司 使用后期可靠性信息进行解码的系统和方法
US9258112B2 (en) * 2013-03-15 2016-02-09 Accenture Global Services Limited Configurable key-based data shuffling and encryption
US9448877B2 (en) * 2013-03-15 2016-09-20 Cisco Technology, Inc. Methods and apparatus for error detection and correction in data storage systems using hash value comparisons
GB2510932B (en) * 2013-08-27 2015-01-21 Imagination Tech Ltd An improved decoder for low-density parity-check codes
KR102204394B1 (ko) * 2013-10-14 2021-01-19 삼성전자주식회사 메모리 시스템에서의 코딩 방법 및 디코딩 방법
US9602141B2 (en) 2014-04-21 2017-03-21 Sandisk Technologies Llc High-speed multi-block-row layered decoder for low density parity check (LDPC) codes
US9748973B2 (en) * 2014-04-22 2017-08-29 Sandisk Technologies Llc Interleaved layered decoder for low-density parity check codes
US9503125B2 (en) * 2014-05-08 2016-11-22 Sandisk Technologies Llc Modified trellis-based min-max decoder for non-binary low-density parity-check error-correcting codes
US9559727B1 (en) 2014-07-17 2017-01-31 Sk Hynix Memory Solutions Inc. Stopping rules for turbo product codes
US9853873B2 (en) 2015-01-10 2017-12-26 Cisco Technology, Inc. Diagnosis and throughput measurement of fibre channel ports in a storage area network environment
US9900250B2 (en) 2015-03-26 2018-02-20 Cisco Technology, Inc. Scalable handling of BGP route information in VXLAN with EVPN control plane
US10222986B2 (en) 2015-05-15 2019-03-05 Cisco Technology, Inc. Tenant-level sharding of disks with tenant-specific storage modules to enable policies per tenant in a distributed storage system
US11588783B2 (en) 2015-06-10 2023-02-21 Cisco Technology, Inc. Techniques for implementing IPV6-based distributed storage space
US10778765B2 (en) 2015-07-15 2020-09-15 Cisco Technology, Inc. Bid/ask protocol in scale-out NVMe storage
US9892075B2 (en) 2015-12-10 2018-02-13 Cisco Technology, Inc. Policy driven storage in a microserver computing environment
US10140172B2 (en) 2016-05-18 2018-11-27 Cisco Technology, Inc. Network-aware storage repairs
US20170351639A1 (en) 2016-06-06 2017-12-07 Cisco Technology, Inc. Remote memory access using memory mapped addressing among multiple compute nodes
US10664169B2 (en) 2016-06-24 2020-05-26 Cisco Technology, Inc. Performance of object storage system by reconfiguring storage devices based on latency that includes identifying a number of fragments that has a particular storage device as its primary storage device and another number of fragments that has said particular storage device as its replica storage device
US11563695B2 (en) 2016-08-29 2023-01-24 Cisco Technology, Inc. Queue protection using a shared global memory reserve
EP3316486B1 (en) * 2016-10-25 2023-06-14 Université de Bretagne Sud Elementary check node-based syndrome decoding with input pre-sorting
KR102827608B1 (ko) * 2016-12-14 2025-07-03 에스케이하이닉스 주식회사 메모리 시스템 및 이의 에러 정정 방법
US10545914B2 (en) 2017-01-17 2020-01-28 Cisco Technology, Inc. Distributed object storage
US10243823B1 (en) 2017-02-24 2019-03-26 Cisco Technology, Inc. Techniques for using frame deep loopback capabilities for extended link diagnostics in fibre channel storage area networks
US10713203B2 (en) 2017-02-28 2020-07-14 Cisco Technology, Inc. Dynamic partition of PCIe disk arrays based on software configuration / policy distribution
US10254991B2 (en) 2017-03-06 2019-04-09 Cisco Technology, Inc. Storage area network based extended I/O metrics computation for deep insight into application performance
US10303534B2 (en) 2017-07-20 2019-05-28 Cisco Technology, Inc. System and method for self-healing of application centric infrastructure fabric memory
US10404596B2 (en) 2017-10-03 2019-09-03 Cisco Technology, Inc. Dynamic route profile storage in a hardware trie routing table
US10942666B2 (en) 2017-10-13 2021-03-09 Cisco Technology, Inc. Using network device replication in distributed storage clusters
KR102523059B1 (ko) * 2018-04-18 2023-04-19 에스케이하이닉스 주식회사 에러 정정 회로 및 그것을 포함하는 메모리 시스템
TWI688223B (zh) * 2019-02-11 2020-03-11 義守大學 代數幾何碼的赫米特碼之編碼及解碼方法
KR102851230B1 (ko) 2019-02-14 2025-08-27 에스케이하이닉스 주식회사 메모리 컨트롤러
US12393485B2 (en) * 2022-01-28 2025-08-19 Pure Storage, Inc. Recover corrupted data through speculative bitflip and cross-validation
US11949430B2 (en) * 2022-09-01 2024-04-02 SK Hynix Inc. Parallel system to calculate low density parity check

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7085988B1 (en) * 2002-04-08 2006-08-01 Maxtor Corporation Hashing system utilizing error correction coding techniques
US7827461B1 (en) * 2006-09-18 2010-11-02 Marvell International Ltd. Low-density parity-check decoder apparatus
CN102045161A (zh) * 2010-11-24 2011-05-04 上海电机学院 量子密钥协商方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3328093B2 (ja) 1994-07-12 2002-09-24 三菱電機株式会社 エラー訂正装置
US5701314A (en) 1995-12-21 1997-12-23 Cirrus Logic, Inc. On-the-fly error correction using thermal asperity erasure pointers from a sampled amplitude read channel in a magnetic disk drive
GB2350531B (en) 1999-05-26 2001-07-11 3Com Corp High speed parallel bit error rate tester
WO2001039188A2 (en) 1999-11-22 2001-05-31 Seagate Technology Llc Method and apparatus for data error recovery using defect threshold detector and viterbi gain
US6977930B1 (en) * 2000-02-14 2005-12-20 Cisco Technology, Inc. Pipelined packet switching and queuing architecture
US7136244B1 (en) 2002-02-22 2006-11-14 Western Digital Technologies, Inc. Disk drive employing data averaging techniques during retry operations to facilitate data recovery
KR20040093748A (ko) * 2002-04-05 2004-11-08 코닌클리케 필립스 일렉트로닉스 엔.브이. 오류정정의 추가층을 오류정정코드 내에 삽입하는 방법 및장치
US7779268B2 (en) * 2004-12-07 2010-08-17 Mitsubishi Electric Research Laboratories, Inc. Biometric based user authentication and data encryption
US7730384B2 (en) 2005-02-28 2010-06-01 Agere Systems Inc. Method and apparatus for evaluating performance of a read channel
US7738201B2 (en) 2006-08-18 2010-06-15 Seagate Technology Llc Read error recovery using soft information
US7702989B2 (en) 2006-09-27 2010-04-20 Agere Systems Inc. Systems and methods for generating erasure flags
US7971125B2 (en) 2007-01-08 2011-06-28 Agere Systems Inc. Systems and methods for prioritizing error correction data
GB2455283A (en) * 2007-10-31 2009-06-10 Hewlett Packard Development Co Error correction in data communication apparatus using toroidal-web Tanner graph
US20090154916A1 (en) * 2007-12-12 2009-06-18 Tellabs Petaluma, Inc. Method and Apparatus for GPON GEM Error Correction Implementation
US8407553B2 (en) 2008-08-15 2013-03-26 Lsi Corporation RAM list-decoding of near codewords
KR20110086504A (ko) 2008-11-20 2011-07-28 엘에스아이 코포레이션 노이즈 감소 데이터 프로세싱 회로, 노이즈 감소 데이터 프로세싱 회로를 위한 시스템 및 방법
US7990642B2 (en) 2009-04-17 2011-08-02 Lsi Corporation Systems and methods for storage channel testing
EP2285003B1 (en) * 2009-08-12 2019-11-13 Alcatel Lucent Correction of errors in a codeword
US8176404B2 (en) 2009-09-09 2012-05-08 Lsi Corporation Systems and methods for stepped data retry in a storage system
US8688873B2 (en) 2009-12-31 2014-04-01 Lsi Corporation Systems and methods for monitoring out of order data decoding
US8458555B2 (en) 2010-06-30 2013-06-04 Lsi Corporation Breaking trapping sets using targeted bit adjustment
US8810940B2 (en) 2011-02-07 2014-08-19 Lsi Corporation Systems and methods for off track error recovery
US8693120B2 (en) 2011-03-17 2014-04-08 Lsi Corporation Systems and methods for sample averaging in data processing
US8886508B2 (en) * 2011-08-22 2014-11-11 Freescale Semiconductor, Inc. Circuit simulation acceleration using model caching

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7085988B1 (en) * 2002-04-08 2006-08-01 Maxtor Corporation Hashing system utilizing error correction coding techniques
US7827461B1 (en) * 2006-09-18 2010-11-02 Marvell International Ltd. Low-density parity-check decoder apparatus
CN102045161A (zh) * 2010-11-24 2011-05-04 上海电机学院 量子密钥协商方法

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
ENVER CAVUS 等: "A PERFORMANCE IMPROVEMENT AND ERROR FLOOR AVOIDANCE TECHNIQUE FOR BELIEF PROPAGATION DECODING OF LDPC CODES", 《2005 IEEE 16TH INTERNATIONAL SYMPOSIUM ON PERSONAL,INDOOR AND MOBILE RADIO COMMUNICATIONS》 *
MATHIEU CUNCHE 等: "Adding Integrity Verification Capabilities to the LDPC-Staircase Erasure Correction Codes", 《HTTPS://HAL.INRIA.FR/INRIA-00379155》 *
NATASA ZIVIC: "Strategies and Performances of Soft Input Decryption", 《INTERNATIONAL JOURNAL OF COMPUTER SCIENCE AND INFORMATION SECURITY》 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112118014A (zh) * 2016-03-31 2020-12-22 慧荣科技股份有限公司 用于进行重组解码的低密度奇偶校验解码装置及相关方法
CN112118014B (zh) * 2016-03-31 2024-03-15 慧荣科技股份有限公司 用于进行重组解码的低密度奇偶校验解码装置及相关方法
CN107276596A (zh) * 2017-07-11 2017-10-20 北京理工大学 一种基于分段Hash序列的极化码译码方法
CN107276596B (zh) * 2017-07-11 2020-07-07 北京理工大学 一种基于分段Hash序列的极化码译码方法
CN108170556A (zh) * 2018-01-18 2018-06-15 江苏华存电子科技有限公司 纠错码生成与校验矩阵的保护方法及矩阵存储/产生装置
CN114666011A (zh) * 2022-03-23 2022-06-24 锐捷网络股份有限公司 一种数据处理方法、装置及电子设备
CN114666011B (zh) * 2022-03-23 2024-04-16 锐捷网络股份有限公司 一种数据处理方法、装置及电子设备

Also Published As

Publication number Publication date
KR20140074814A (ko) 2014-06-18
US8996969B2 (en) 2015-03-31
TW201429168A (zh) 2014-07-16
US20140164866A1 (en) 2014-06-12
JP2014116927A (ja) 2014-06-26
TWI604698B (zh) 2017-11-01
EP2741421A1 (en) 2014-06-11

Similar Documents

Publication Publication Date Title
CN103873069A (zh) 具有误纠处理的低密度奇偶校验解码器
US9015550B2 (en) Low density parity check layer decoder for codes with overlapped circulants
US9015547B2 (en) Multi-level LDPC layered decoder with out-of-order processing
US8739004B2 (en) Symbol flipping LDPC decoding system
US9459956B2 (en) Data decoder with trapping set flip bit mapper
US9130590B2 (en) Non-binary layered low density parity check decoder
US8756478B2 (en) Multi-level LDPC layer decoder
US8929009B2 (en) Irregular low density parity check decoder with low syndrome error handling
US10367526B2 (en) Irregular low density parity check processing system with non-uniform scaling
US20160020783A1 (en) Low Density Parity Check Decoder With Relative Indexing
US20130139023A1 (en) Variable Sector Size Interleaver
US20130139022A1 (en) Variable Sector Size LDPC Decoder
CN104052496A (zh) 基于最小和的混合非二进制低密度奇偶校验解码器
US9048867B2 (en) Shift register-based layered low density parity check decoder
US20140082449A1 (en) LDPC Decoder With Variable Node Hardening
US8996971B2 (en) LDPC decoder trapping set identification
US20140089757A1 (en) LDPC Decoder With Fractional Local Iterations
US8949696B2 (en) Systems and methods for trapping set disruption
US20160087653A1 (en) Decoder With Targeted Symbol Flipping Recovery Of Miscorrected Codewords
CN103034556B (zh) 用于奇偶共享数据编码的系统及方法
US9727419B2 (en) Non-binary low density parity check code column rotation
US20160191079A1 (en) Low Dynamic Power Check Node Processor For Low Density Parity Check Decoder
CN103034557A (zh) 用于奇偶共享数据处理的系统及方法
US8775897B2 (en) Data processing system with failure recovery
US20140208180A1 (en) Systems and Methods for Reusing a Layered Decoder to Yield a Non-Layered Result

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20140618